Abstract: A light-emitting element includes a ?-Ga2O3 substrate, a GaN-based semiconductor layer formed on the ?-Ga2O3 substrate, and a double-hetero light-emitting layer formed on the GaN-based semiconductor layer.
Abstract: The present invention generally provides apparatus and methods for forming LED structures. In one embodiment where a sapphire substrate is selected, the growth of bulk Group III-nitrides may be deposited in a HVPE or MOCVD chamber while a separate processing chamber, such as a PVD, MOCVD, CVD, or ALD chamber, may be used to grow buffer layers on the sapphire substrate at lower growth rate. The buffer layer may be GaN, AlN, AlGaN, InGaN, or InAlGaN. In another embodiment where a silicon-based substrate is selected, the growth of bulk Group III-nitrides may be deposited in a HVPE or MOCVD chamber in which an Al-free environment is provided while a separate processing chamber with a Ga-free environment is used to grow a Ga-free buffer layer, such as Al, AlN, or SiN, on the silicon-based substrate. The separate processing chamber may be a PVD, CVD, MOCVD, a plasma assisted MOCVD, or other vapor phase deposition techniques.
Abstract: Solid state lighting (“SSL”) devices with cellular arrays and associated methods of manufacturing are disclosed herein. In one embodiment, a light emitting diode includes a semiconductor material having a first surface and a second surface opposite the first surface. The semiconductor material has an aperture extending into the semiconductor material from the first surface. The light emitting diode also includes an active region in direct contact with the semiconductor material, and at least a portion of the active region is in the aperture of the semiconductor material.
Type:
Application
Filed:
March 25, 2010
Publication date:
September 29, 2011
Applicant:
MICRON TECHNOLOGY, INC.
Inventors:
Scott Sills, Lifang Xu, Scott Schellhammer, Thomas Gehrke, Zaiyuan Ren, Anton De Villiers
Abstract: A semiconductor light emitting device has a support substrate, a light emitting element, and underfill material. The light emitting element includes a nitride-based group III-V compound semiconductor layer contacted via a bump on the support substrate. The underfill material is disposed between the support substrate and the light emitting element, the underfill material comprising a rib portion disposed outside of an end face of the light emitting element to surround the end surface of the light emitting element.
Abstract: A semiconductor light-emitting device according to the present invention includes: a GaN substrate 1 containing an n-type impurity and being made of silicon carbide or a nitride semiconductor; a multilayer structure 10 provided on a main surface of the GaN substrate 1; a p-electrode 17 formed on the multilayer structure 10; a first n-electrode 18 substantially covering the entire rear surface of the GaN substrate 1; and a second n-electrode 20 provided on the first n-electrode 18 so as to expose at least a portion of the periphery of the first n-electrode 18.
Abstract: According to one embodiment, a semiconductor light emitting device, including a light emission portion including a first semiconductor layer with a first conductive type, a light emission layer on the first semiconductor layer, a second semiconductor layer with a second conductive type on the light emission layer and a transparent electrode on the second semiconductor layer, and a plurality of light outlet holes inside the light emission portion, the plurality of light outlet holes communicating with the first semiconductor layer from a surface side of the transparent electrode, at least a part of light emitted from the light emission layer being extracted from the plurality of the outlet holes to outside.
Abstract: Provided is a method of fabricating a nitride semiconductor light emitting device, and this method can reduce degradation of a well layer during formation of a p-type gallium nitride based semiconductor region and a barrier layer. After growth of a gallium nitride based semiconductor region 13, a barrier layer 21a is grown on a substrate 11. The barrier layer 21a is formed at a growth temperature TB during a period from a time t1 to t2. The growth temperature TB (=T2) is in the range of not less than 760 Celsius degrees and not more than 800 Celsius degrees. At the time t2, the growth of the barrier layer 21a is completed. After the growth of the barrier layer 21a, a well layer 23a is grown on the substrate 11 without interruption of growth. The well layer 23a is formed at a growth temperature TW (=T2) during a period from the time t2 to t3. The growth temperature TW is the same as the growth temperature TB and can be in the range of not less than 760 Celsius degrees and not more than 800 Celsius degrees.
Abstract: A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group compound semiconductor layer on each recess portion of the substrate through a state of making a triangle in section wherein a bottom surface of the recess portion becomes a base of the triangle; laterally growing a second nitride-based III-V Group compound semiconductor layer on the substrate from the first nitride-based III-V Group compound semiconductor layer; and successively growing, on the second nitride-based III-V Group compound semiconductor layer, a third nitride-based III-V Group compound semiconductor layer of a first conduction type, an active layer, and a fourth nitride-based III-V compound semiconductor layer of a second conduction type.
Abstract: Light emitting diodes (“LEDs”) with N-polarity and associated methods of manufacturing are disclosed herein. In one embodiment, a method for forming a light emitting diode on a substrate having a substrate material includes forming a nitrogen-rich environment at least proximate a surface of the substrate without forming a nitrodizing product of the substrate material on the surface of the substrate. The method also includes forming an LED structure with a nitrogen polarity on the surface of the substrate with a nitrogen-rich environment.
Abstract: Misfit dislocations are redirected from the buffer/Si interface and propagated to the Si substrate due to the formation of bubbles in the substrate. The buffer layer growth process is generally a thermal process that also accomplishes annealing of the Si substrate so that bubbles of the implanted ion species are formed in the Si at an appropriate distance from the buffer/Si interface so that the bubbles will not migrate to the Si surface during annealing, but are close enough to the interface so that a strain field around the bubbles will be sensed by dislocations at the buffer/Si interface and dislocations are attracted by the strain field caused by the bubbles and move into the Si substrate instead of into the buffer epi-layer. Fabrication of improved integrated devices based on GaN and Si, such as continuous wave (CW) lasers and light emitting diodes, at reduced cost is thereby enabled.
Type:
Grant
Filed:
August 12, 2009
Date of Patent:
August 30, 2011
Assignee:
The Regents of The University of California
Inventors:
Zuzanna Liliental-Weber, Rogerio Luis Maltez, Hadis Morkoc, Jinqiao Xie
Abstract: Apparatus and method for growth of non-p-type GaN layers over p-type GaN layers. Embodiments include multi-junction LED film stacks, multi-junction LED devices paired into units and multi-junction LED arrays of the paired units. Epitaxial growths of p-type and non-p-type material layers are split between epitaxial chambers clustered onto a single platform to reduce p-type dopant cross-contamination. Arrayed multi-junction LED devices provide improved packing density and reduced blinking during AC operation.
Abstract: Provided is a method for manufacturing a semiconductor light emitting element, by which semiconductor light emitting elements having excellent light extraction efficiency can be manufactured at high yield.
Abstract: A light-emitting apparatus of the present invention includes: a mounting base 260 which has a wire 265; and a nitride-based semiconductor light-emitting device flip-chip mounted on the mounting base 260. The nitride-based semiconductor light-emitting device 100 includes a GaN-based substrate 10 which has an m-plane surface 12, a semiconductor multilayer structure 20 provided on the m-plane surface 12 of the GaN-based substrate 10, and an electrode 30 provided on the semiconductor multilayer structure 20. The electrode 30 includes an Mg layer 32. The Mg layer 32 is in contact with the surface of the p-type semiconductor region of the semiconductor multilayer structure 20. The electrode 30 is coupled to the wire 265.
Abstract: There are provided a vapor deposition system, a method of manufacturing a light emitting device, and a light emitting device. A vapor deposition system according to an aspect of the invention may include: a first chamber having a first susceptor and at least one gas distributor discharging a gas in a direction parallel to a substrate disposed on the first susceptor; and a second chamber having a second susceptor and at least one second gas distributor arranged above the second susceptor to discharge a gas downwards. When a vapor deposition system according to an aspect of the invention is used, a semiconductor layer being thereby grown has excellent crystalline quality, thereby improving the performance of a light emitting device. Furthermore, while the operational capability and productivity of the vapor deposition system are improved, deterioration in an apparatus can be prevented.
Type:
Application
Filed:
November 5, 2010
Publication date:
August 18, 2011
Inventors:
Dong Ju LEE, Hyun Wook Shim, Heon Ho Lee, Young Sun Kim, Sung Tae Kim
Abstract: A method for fabricating light emitting diode (LEDs) comprises providing a plurality of LEDs on a substrate wafer, each of which has an n-type and p-type layer of Group-III nitride material formed on a SiC substrate with the n-type layer sandwiched between the substrate and p-type layer. A conductive carrier is provided having a lateral surface to hold the LEDs. The LEDs are flip-chip mounted on the lateral surface of the conductive carrier. The SiC substrate is removed from the LEDs such that the n-type layer is the top-most layer. A respective contact is deposited on the n-type layer of each of the LEDs and the carrier is separated into portions such that each of the LEDs is separated from the others, with each of the LEDs mounted to a respective portion of said carrier.
Abstract: Multiple through-substrate vias (TSVs) are used to make electrical connections for an LED formed over a substrate. A first TSV extends through the substrate from a back surface of the substrate to the front surface of the substrate and includes a first TSV conductor that electrically connects to a first cladding layer of the LED. A second TSV extends through the substrate and an active layer of the LED from the back surface of the substrate to a second cladding layer or an ITO layer. The second TSV includes an isolation layer that electrically isolates a second TSV conductor from the first cladding layer and the active layer. Additionally dummy TSVs may be formed to conduct heat away from the LED optionally through a package substrate.
Abstract: A method for manufacturing a light emitting element is directed to a method for manufacturing a light emitting element of a III-V group compound semiconductor having a quantum well structure including In and N, including the steps of: forming a well layer including In and N; forming a barrier layer having a bandgap wider than a bandgap of the well layer; and supplying a gas including N and interrupting epitaxial growth after the step of forming the well layer and before the step of forming the barrier layer. In the step of interrupting epitaxial growth, the gas having decomposition efficiency higher than decomposition efficiency of decomposition from N2 and NH3 into active nitrogen at 900° C. is supplied. In addition, in the step of interrupting epitaxial growth, the gas different from a gas used as an N source of the well layer is supplied.
Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers, a light emitting portion, a multilayered structural body, and an n-side intermediate layer. The light emitting portion is provided between the semiconductor layers. The light emitting portion includes barrier layers containing GaN, and a well layer provided between the barrier layers. The well layer contains Inx1Ga1-x1N. The body is provided between the n-type semiconductor layer and the light emitting portion. The body includes: first layers containing GaN, and a second layer provided between the first layers. The second layer contains Inx2Ga1-x2N. Second In composition ratio x2 is not less than 0.6 times of first In composition ratio x1 and is lower than the first In composition x1. The intermediate layer is provided between the body and the light emitting portion and includes a third layer containing Aly1Ga1-y1N (0<y1?0.01).
Abstract: A semiconductor laser diode with a high indium content is provided with a lattice matched cladding layer or layers. One or both of the cladding layers may comprise bulk aluminum gallium indium nitride in the ratio of AlxGa1-x-yInyN and/or a short period superlattice structures of, for example, a plurality of alternating layer pairs of aluminum gallium indium nitride in the ratio of AlxGa1-x-yInyN and gallium indium nitride in the ratio of GasIn1-sN, providing a multi-quantum barrier (MQB) effect. Lattice matching of the cladding layer(s) and active layer reduce or eliminate strain, and the materials chosen for the cladding layers optimizes optical and carrier confinement. Alternatively, the lattice parameters may be selected to provide strain balanced MQBs, e.g., where the barrier layers are tensile-strained and the well layers compressed.
Type:
Grant
Filed:
November 21, 2008
Date of Patent:
August 16, 2011
Assignee:
Palo Alto Research Center Incorporated
Inventors:
David P. Bour, Christopher L. Chua, Noble M. Johnson, Zhihong Yang
Abstract: A white light emitting device is disclosed. The white light emitting device includes a blue light emitting diode (LED) including a plurality of active layers generating different peak wavelengths, and phosphors emitting yellow light when excited by light emitted from the blue LED. The white light emitting device ensures enhanced excitation efficiency of the phosphors, and high luminance.
Abstract: A semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region is grown over a porous III-nitride region. A III-nitride layer comprising InN is disposed between the light emitting layer and the porous III-nitride region. Since the III-nitride layer comprising InN is grown on the porous region, the III-nitride layer comprising InN may be at least partially relaxed, i.e. the III-nitride layer comprising InN may have an in-plane lattice constant larger than an in-plane lattice constant of a conventional GaN layer grown on sapphire.
Abstract: A nitride-based semiconductor LED includes a substrate; an n-type nitride semiconductor layer formed on the substrate; an active layer and a p-type nitride semiconductor layer that are sequentially formed on a predetermined region of the n-type nitride semiconductor layer; a transparent electrode formed on the p-type nitride semiconductor layer; a p-electrode pad formed on the transparent electrode, the p-electrode pad being spaced from the outer edge line of the p-type nitride semiconductor layer by 50 to 200 ?m; and an n-electrode pad formed on the n-type nitride semiconductor layer.
Type:
Application
Filed:
April 20, 2011
Publication date:
August 11, 2011
Applicant:
SAMSUNG LED CO., LTD.
Inventors:
Hyuk Min LEE, Hyun Kyung Kim, Dong Joon Kim, Hyoun Soo Shin
Abstract: Light emitting diodes and associated methods of manufacturing are disclosed herein. In one embodiment, a light emitting diode (LED) includes a substrate, a semiconductor material carried by the substrate, and an active region proximate to the semiconductor material. The semiconductor material has a first surface proximate to the substrate and a second surface opposite the first surface. The second surface of the semiconductor material is generally non-planar, and the active region generally conforms to the non-planar second surface of the semiconductor material.
Type:
Application
Filed:
February 10, 2010
Publication date:
August 11, 2011
Applicant:
MICRON TECHNOLOGY, INC.
Inventors:
Scott Schellhammer, Scott Sills, Lifang Xu, Thomas Gehrke, Zaiyuan Ren, Anton De Villiers
Abstract: A Group III nitride based light emitting diode includes a p-type Group III nitride based semiconductor layer, an n-type Group III nitride based semiconductor layer that forms a P-N junction with the p-type Group III nitride based semiconductor layer, and a Group III nitride based active region on the n-type Group III nitride based semiconductor layer. The active region includes a plurality of sequentially stacked Group III nitride based wells including respective well layers. The plurality of well layers includes a first well layer having a first thickness and a second well layer having a second thickness. The second well layer is between the P-N junction and the first well layer, and the second thickness is greater than the first thickness.
Type:
Application
Filed:
February 3, 2010
Publication date:
August 4, 2011
Inventors:
Michael John Bergmann, Daniel Carleton Driscoll, Ashonita Chavan, Pablo Cantu-Alejandro, James Ibbetson
Abstract: A light emitting device comprises: an LED chip array comprising a plurality of LEDs formed on a single die (monolithic chip array) and at least one discrete LED that is separate from the LED chip array connected in series with the LED chip array. In an AC-drivable device the LED chip array is AC-drivable and two or more discrete LEDs are configured to be AC-drivable. The device can further comprise a package in which the LED chip array and discrete LED(s) are mounted. The discrete LEDs are configured such that positive and negative half wave periods of an AC drive voltage are mapped onto oppositely connected LED such that oppositely connected LED chips are alternately operable on a respective half wave period.
Abstract: A III-nitride semiconductor device has a support base comprised of a III-nitride semiconductor and having a primary surface extending along a first reference plane perpendicular to a reference axis inclined at a predetermined angle ALPHA with respect to the c-axis of the III-nitride semiconductor, and an epitaxial semiconductor region provided on the primary surface of the support base. The epitaxial semiconductor region includes a plurality of GaN-based semiconductor layers. The reference axis is inclined at a first angle ALPHA1 in the range of not less than 10 degrees, and less than 80 degrees from the c-axis of the III-nitride semiconductor toward a first crystal axis, either one of the m-axis and a-axis. The reference axis is inclined at a second angle ALPHA2 in the range of not less than ?0.30 degrees and not more than +0.30 degrees from the c-axis of the III-nitride semiconductor toward a second crystal axis, the other of the m-axis and a-axis.
Abstract: Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state light device includes a light emitting diode with an N-type gallium nitride (GaN) material, a P-type GaN material spaced apart from the N-type GaN material, and an indium gallium nitride (InGaN) material directly between the N-type GaN material and the P-type GaN material. At least one of the N-type GaN, InGaN, and P-type GaN materials has a non-planar surface.
Abstract: A method according to embodiments of the invention includes providing a substrate comprising a host and a seed layer bonded to the host. The seed layer comprises a plurality of regions. A semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region is grown on the substrate. A top surface of a semiconductor layer grown on the seed layer has a lateral extent greater than each of the plurality of seed layer regions.
Abstract: Provided is a method for manufacturing a semiconductor light-emitting element having a narrow wavelength distribution and comprising a substrate and a group III compound semiconductor layer formed thereon, the substrate being made of a material different from the compound semiconductor constituting the semiconductor layer. The method for manufacturing a semiconductor light-emitting element having a group III compound semiconductor layer is characterized by comprising a semiconductor layer-forming step wherein a group III compound semiconductor layer having a total thickness of not less than 8 ?m is formed on a substrate (11) having a diameter D, a thickness and an amount of warpage H within the range of ±30 ?m. The method is also characterized in that the diameter D and the thickness d of the substrate (11) satisfy the following formula (1): 0.7×102?(D/d)?1.5×102??(1).
Abstract: Methods and systems are provided that may be used to utilize and manufacture a light sources apparatus. A first light emitting diode emits light having a first wavelength, and a second light emitting diode for emitting light having a second wavelength. Each of the first and second light emitting diodes may comprise angled facets to reflect incident light in a direct toward a top end of the first light emitting diode. The second light emitting diode comprising angled facets may reflect incident light in a direction toward a top end of the second light emitting diode. A first distributed Bragg reflector is disposed between the top end of the first light emitting diode and a bottom end of the second light emitting diode to allow light from the first light emitting diode to pass through and to reflect light from the second light emitting diode.
Type:
Grant
Filed:
October 2, 2009
Date of Patent:
July 19, 2011
Assignee:
Versitech Limited
Inventors:
Hoi Wai Choi, Kwun Nam Hui, Xianghua Wang
Abstract: A semipolar {20-21} III-nitride based laser diode employing a cavity with one or more etched facet mirrors. The etched facet mirrors provide an ability to arbitrarily control the orientation and dimensions of the cavity or stripe of the laser diode, thereby enabling control of electrical and optical properties of the laser diode.
Type:
Application
Filed:
October 20, 2010
Publication date:
July 14, 2011
Applicant:
THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
Inventors:
Anurag Tyagi, Robert M. Farrell, Chia-Yen Huang, Po Shan Hsu, Daniel A. Haeger, Kathryn M. Kelchner, Hiroaki Ohta, Shuji Nakamura, Steven P. DenBaars, James S. Speck
Abstract: The present invention provides a method for manufacturing a group III nitride semiconductor light emitting element, with which warping can be suppressed upon the formation of respective layers on the substrate, a semiconductor layer including a light emitting layer of excellent crystallinity can be formed, and excellent light emission characteristics can be obtained; such a group III nitride semiconductor light emitting element; and a lamp. Specifically disclosed is a method for manufacturing a group III nitride semiconductor light emitting element, in which an intermediate layer, an underlayer, an n-type contact layer, an n-type cladding layer, a light emitting layer, a p-type cladding layer, and a p-type contact layer are laminated in sequence on a principal plane of a substrate, wherein a substrate having a diameter of 4 inches (100 mm) or larger, with having an amount of warping H within a range from 0.
Abstract: The vertical light emitting diode includes a substrate having a plurality of penetrating via-holes, a plurality of nitride semiconductor layers formed on the substrate, a first electrode formed on the plurality of nitride semiconductor layers, and a second electrode formed to fill the plurality of via-holes thereby contacting part of the plurality of nitride semiconductor layers.
Type:
Application
Filed:
December 13, 2010
Publication date:
June 30, 2011
Inventors:
Ung Lee, So-Young Jang, Sang-Jun Jung, Hyun-Goo Kim
Abstract: A method for producing an optoelectronic semiconductor chip based on a nitride semiconductor system is specified. The method comprises the steps of: forming a semiconductor section with at least one p-doped region; and forming a covering layer disposed downstream of the semiconductor section in a growth direction of the semiconductor chip, said covering layer having at least one n-doped semiconductor layer. An activation step suitable for electrically activating the p-doped region is effected before or during the formation of the covering layer. An optoelectronic semiconductor chip which can be produced by the method is additionally specified.
Type:
Application
Filed:
January 6, 2011
Publication date:
June 30, 2011
Applicant:
OSRAM Opto Semiconductors GmbH
Inventors:
Magnus AHLSTEDT, Lutz HÖPPEL, Matthias PETER, Matthias SABATHIL, Uwe STRAUSS, Martin STRASSBURG
Abstract: In a method of producing a nitride semiconductor light-emitting device including a nitride semiconductor active layer (105) held between an n-type nitride semiconductor layer (103, 104) and a p-type nitride semiconductor layer (106 to 108) on a substrate (101), at least any one of the n-type layer, the active layer and the p-type layer includes a multilayer film structure, and a surfactant material is supplied to a crystal growth surface just before, during or after crystal growth of a layer included in the multilayer film structure.
Abstract: A wafer level LED package structure includes a light-emitting unit, a reflecting unit, a first conductive unit and a second conductive unit. The light-emitting unit has a substrate body, a light-emitting body disposed on the substrate body, a positive and a negative conductive layers formed on the light-emitting body, and a light-emitting area formed in the light-emitting body. The reflecting unit has a reflecting layer formed between the positive and the negative conductive layers and on the substrate body for covering external sides of the light-emitting body. The first conductive unit has a first positive conductive layer formed on the positive conductive layer and a first negative conductive layer formed on the negative conductive layer. The second conductive unit has a second positive conductive structure formed on the first positive conductive layer and a second negative conductive structure formed on the first negative conductive layer.
Abstract: A relaxed InGaN template employs a GaN or InGaN nucleation layer grown at low temperatures on a conventional base layer (e.g., sapphire). The nucleation layer is typically very rough and multi-crystalline. A single-crystal InGaN buffer layer is then grown at normal temperatures. Although not necessary, the buffer layer is typically undoped, and is usually grown at high pressures to encourage planarization and to improve surface smoothness. A subsequent n-doped cap layer can then be grown at low pressures to form the n-contact of a photonic or electronic device. In some cases, a wetting layer—typically low temperature AlN—is grown prior to the nucleation layer. Other templates, such as AlGaN on Si or SiC, are also produced using the method of the present invention.
Type:
Application
Filed:
December 18, 2009
Publication date:
June 23, 2011
Applicant:
Palo Alto Research Center Incorporated
Inventors:
Christopher L. Chua, Zhihong Yang, Andre Strittmatter, Mark R. Teepe
Abstract: A light emitting device includes a transparent substrate having first and second surfaces, a semiconductor layer provided on the first surface, a first light emission layer provided on the semiconductor layer and emitting first ultraviolet light including a wavelength corresponding to an energy larger than a forbidden bandwidth of a semiconductor of the semiconductor layer, a second light emission layer provided between the first light emission layer and the semiconductor layer, absorbing the first ultraviolet light emitted from the first light emission layer, and emitting second ultraviolet light including a wavelength corresponding to an energy smaller than the forbidden bandwidth of the semiconductor of the semiconductor layer, and first and second electrodes provided to apply electric power to the first light emission layer.
Abstract: A semiconductor light emitting device made of nitride III-V compound semiconductors is includes an active layer made of a first nitride III-V compound semiconductor containing In and Ga, such as InGaN; an intermediate layer made of a second nitride III-V compound semiconductor containing In and Ga and different from the first nitride III-V compound semiconductor, such as InGaN; and a cap layer made of a third nitride III-V compound semiconductor containing Al and Ga, such as p-type AlGaN, which are deposited in sequential contact.
Abstract: A nitride semiconductor-based light emitting device is provided. The nitride semiconductor-based light emitting device is formed of a nitride semiconductor having a wurtzite lattice structure with the Ga face. The device has a substrate, a buffer layer, a first p-type contact layer, a second p-type contact layer, a first hole diffusion layer, a second hole diffusion layer, a light emitting active region, a second electron diffusion layer, a first electron diffusion layer, a second n-type contact layer and a first n-type contact layer, which are sequentially stacked. Such a structure may effectively employ quasi-two-dimensional free electron and free hole gases formed at heterojunction interfaces due to the spontaneous polarization and the piezoelectric polarization in the wurtzite lattice structure with the Ga face, and thus enhances the emission uniformity and emission efficiency of the light emitting device.
Type:
Grant
Filed:
October 2, 2007
Date of Patent:
June 21, 2011
Assignee:
Electronics and Telecommunications Research Institute
Abstract: Nano-spherical group III-nitride materials and methods of forming nano-spherical group III-nitride materials are described. Also described is a 1-dimensional LED or similar device formed from a single nano-rod of a nano-spherical group III-nitride material.
Type:
Application
Filed:
December 14, 2010
Publication date:
June 16, 2011
Inventors:
Olga Kryliouk, Yuriy Melnik, Hidehiro Kojiri, Tetsuya Ishikawa
Abstract: A light emitting device comprises a light emitting layer section having a double heterostructure of an n-type cladding layer, an active layer and a p-type cladding layer, each composed of AlGaInP stacked in this order. Supposing a bonding object layer having a first main surface side as p type and a second main surface side as n type, a light extraction side electrode is formed to cover the first main surface partially. An n-type transparent device substrate composed of Group III-V compound semiconductor having greater band gap energy than the active layer is bonded to the second main surface of the bonding object layer. On one sides of the transparent device substrate and the bonding object layer, a bonding surface to the other is formed, and an InGaP intermediate layer is formed to have a high concentration Si doping layer formed on the bonding surface side.
Type:
Grant
Filed:
May 29, 2007
Date of Patent:
June 14, 2011
Assignee:
Shin-Etsu Handotai Co., Ltd.
Inventors:
Yukari Suzuki, Jun Ikeda, Jun-ya Ishizaki, Shunichi Ikeda
Abstract: A transparent-substrate light-emitting diode (10) has a light-emitting layer (133) made of a compound semiconductor, wherein the area (A) of a light-extracting surface having formed thereon a first electrode (15) and a second electrode (16) differing in polarity from the first electrode (15), the area (B) of a light-emitting layer (133) formed as approximating to the light-extracting surface and the area (C) of the back surface of a light-emitting diode falling on the side opposite the side for forming the first electrode (15) and the second electrode (16) are so related as to satisfy the relation of A>C>B. The light-emitting diode (10) of this invention, owing to the relation of the area of the light-emitting layer (133) and the area of the back surface (23) of the transparent substrate and the optimization of the shape of a side face of the transparent substrate (14), exhibits high brightness and high exoergic property never attained heretofore and fits use with an electric current of high degree.
Abstract: A layered heterostructure light emitting device comprises at least a substrate, an n-type gallium nitride-based semi-conductor cladding layer region, a p-type gallium nitride-based semiconductor cladding layer region, a p-type zinc oxide-based hole injection layer region, and an ohmic contact layer region. Alternatively, the device may also comprise a capping layer region, or may also comprise a reflective layer region and a protective capping layer region. The device may also comprise one or more buried insertion layers adjacent to the ohmic contact layer region. The ohmic contact layer region may be comprised of materials such as indium tin oxide, gallium tin oxide, or indium tin oxide material. An n-electrode pad is formed that is in electrical contact with the n-type gallium nitride based cladding layer region. A p-type pad is formed that is in electrical contact with the p-type region.
Type:
Application
Filed:
January 6, 2009
Publication date:
June 9, 2011
Inventors:
Yungryel Ryu, Tae-Seok Lee, Henry W. White
Abstract: Disclosed are a light emitting device and a light emitting device package having the same. The light emitting device includes a first conductive type semiconductor layer; an active layer including a barrier layer and a well layer alternately disposed on the first conductive type semiconductor layer; and a second conductive type semiconductor layer on the active layer. At least one well layer includes an indium cluster having a density of 1E11/cm2 or more.
Abstract: Epitaxial formation support structures and associated methods of manufacturing epitaxial formation support structures and solid state lighting devices are disclosed herein. In several embodiments, a method of manufacturing an epitaxial formation support substrate can include forming an uncured support substrate that has a first side, a second side opposite the first side, and coefficient of thermal expansion substantially similar to N-type gallium nitride. The method can further include positioning the first side of the uncured support substrate on a first surface of a first reference plate and positioning a second surface of a second reference plate on the second side to form a stack. The first and second surfaces can include uniformly flat portions. The method can also include firing the stack to sinter the uncured support substrate. At least side of the support substrate can form a planar surface that is substantially uniformly flat.
Abstract: A light emitting device includes: a laminated body including a first conductivity type layer, a light emitting layer provided on the first conductivity type layer, and a second conductivity type layer provided on the light emitting layer, the laminated body being made of InxGayAl1-x-yN (0?x?1, 0?y?1, x+y?1); a first electrode provided on the first conductivity type layer exposed to a bottom surface of a step difference provided in the laminated body; a translucent electrode provided on one portion of an upper face of the second conductivity type layer; and a second electrode provided on the translucent electrode and being smaller than the translucent electrode. A length of the other portion of the upper face of the second conductivity layer between an end portion of the translucent electrode and the side face of the step difference is 30 ?m or more along a line connecting between a center of the first electrode and a center of the second electrode.
Abstract: The present invention provides a method of manufacturing a compound semiconductor device capable of improving yield when a wafer is divided into device regions. The method of manufacturing a compound semiconductor device includes a division step. The division step includes: a first division step of dividing a wafer 30 in a first direction ? to obtain first strip wafers each having at least two rows of device portions 10 arranged in the first direction ?; a second division step of dividing the first strip wafer in a second direction ? to obtain second strip wafers each having a row of the device portions 10 arranged in the second direction ?; and a third division step of dividing the second strip wafer into the device portions 10, thereby forming compound semiconductor devices including the device portions 10.