Abstract: A multi-layer ceramic capacitor comprises dielectric sheets including a first external electrode, a first internal electrode joined to the first external electrode via an interposed dielectric portion, a second external electrode joined to the first internal electrode, and a second internal electrode joined to the first internal electrode.

Abstract: A multi-segment capacitor fabricated on a semiconductor substrate includes M×N capacitor segments arranged in a matrix of M rows and N columns. Each capacitor segment includes two groups of conductive fingers preferably made of metal wires. The metal wire fingers are distributed within multiple metal layers in such a manner that two neighboring parallel metal wire fingers within a particular metal layer are electrically insulated and connected to different terminals of the capacitor. Further, at least the longitudinal axes of the parallel metal wire fingers within two different metal layers are not parallel to each other within the same capacitor segment.

Abstract: A capacitor includes a dielectric substrate and a large number of filamentous conductors formed to penetrate through the dielectric substrate in a thickness direction thereof. An electrode is connected to only respective one ends of a plurality of filamentous conductors constituting one of groups each composed of a plurality of filamentous conductors. The electrode is disposed in at least one position on each of both surfaces of the dielectric substrate, or in at least two positions on one of the surfaces. Further, an insulating layer is formed on each of both surfaces of the dielectric substrate so as to cover regions between the electrodes, and a conductor layer is formed on the corresponding insulating layer integrally with a desired number of electrodes.

Abstract: A semiconductor ceramic comprising a donor element within the range of 0.8 to 2.0 mol relative to 100 mol of Ti element contained as a solid solution with crystal grains, a first acceptor element in an amount less than the amount of the donor element is contained as a solid solution with the crystal grains, a second acceptor element within the range of 0.3 to 1.0 mol relative to 100 mol of a Ti element is present in crystal grain boundaries, and the average grain size of the crystal grains is 1.0 ?m or less. A monolithic semiconductor ceramic capacitor is obtained by using this semiconductor ceramic. To form the semiconductor ceramic, in a first firing treatment to conduct reduction firing, a cooling treatment is conducted while the oxygen partial pressure at the time of starting the cooling is set at 1.0×104 times or more the oxygen partial pressure in the firing process.

Abstract: A three-dimensional conductive structure has a first electrode and a second electrode of a capacitor structure, and thereby defines a capacitor space. At least a signal line is further included in the capacitor space where both the first electrode and the second electrode can cross and detour round the signal line. Therefore, the signal line can go directly through the capacitor space for transferring various signals without making a detour to avoid the whole capacitor structure.

Abstract: There is disclosed a thin film capacitor and the like capable of suppressing fluctuations of a capacity, increasing a VBD, and accordingly improving a device. characteristic and reliability of a product. In electronic components 1 to 4, a capacitor 11 is formed on a flat substrate 51 as a base material including a planarization layer 52 formed on the surface thereof. The capacitor 11 has a structure in which a lower conductor 21 constituted of an underlayer conductor 21a and a conductor 21b, a dielectric film 31 made of alumina or the like, a resin layer J1 mainly formed of a novolak resin or the like, a resin layer J2 mainly formed of a polyimide resin or the like, and an upper conductor 25 constituted of an underlayer conductor 25a and a conductor 25b are formed on the planarization layer 52 of the substrate 51. The resin layer J1 has an opening K1 above the lower conductor 21, and the resin layer J2 is provided with an opening K2 opened more widely than the opening K1.

Abstract: An acoustic bandgap structure can include a stack of at least three ferroelectric layers with a top side and bottom side of each of the ferroelectric layers contacting an electrode layer, where the ferroelectric layers and the electrode layers form a substantially periodic structure in the direction normal to the ferroelectric and electrode layers and where an acoustic characteristic impedance and thickness of each layer are selected to realize an acoustic bandgap over a desired frequency band for the purpose of improving the device Q.

Abstract: An embodiment of the present invention provides a capacitor, including a solid electrode, an electrode broken into subsections with a signal bus lines connecting the subsections; and wherein the signal bus further connects the solid electrode with the electrode broken into subsections.

Abstract: A method of fabricating an integrated circuit device includes forming a plurality of lower capacitor electrodes vertically extending from a substrate. The plurality of lower capacitor electrodes respectively include an inner sidewall and an outer sidewall. At least one support pattern is formed vertically extending between ones of the plurality of lower capacitor electrodes from top portions thereof opposite the substrate and along the outer sidewalls thereof towards the substrate to a depth that is greater than a lateral distance between adjacent ones of the plurality of lower capacitor electrodes. A dielectric layer is formed on the support pattern and on outer sidewalls of the plurality of lower capacitor electrodes, and an upper capacitor electrode is formed on the dielectric layer. Related devices are also discussed.

Abstract: A capacitor structure includes an insulating layer, first conductive patterns, second conductive patterns, an insulating interlayer, third conductive patterns, and fourth conductive patterns. The first and second conductive patterns are alternately arranged on the insulating layer to be spaced apart from one another. The first and second conductive patterns have side faces where concave portions and convex portions are formed. The insulating interlayer is formed on the insulating layer to cover the first and second conductive patterns. The third and fourth conductive patterns are alternately arranged on the insulating interlayer to be spaced apart from one another. The third and fourth conductive patterns have side faces where concave portions and convex portions are formed.

Abstract: A structural capacitor includes at least one pair of electrodes comprising a positive electrode and a negative electrode, with a body of dielectric material disposed therebetween. The combination of the electrodes and dielectric has a stiffness which can be between 10 1000 GPa, and in some instances between 50 MPa-100 GPa. Failure strength of the combination can be between 1 MPa-10 GPa, and in specific instances between 10 MPa-1 GPa. The capacitor may include a plurality of electrode pairs. The dielectric may include a reinforcing material therein, and the capacitors may be configured in a variety of shapes so as to function as structural elements for articles of construction.

Abstract: Film capacitor assembly has a plurality of film capacitive layers for storing an electric charge. The plurality of film capacitive layers have a first metal contact and a second metal contact. A heat sink removes heat from the plurality of film capacitive layers. The heat sink is in thermal conductive communication with at least one of the first metal contact and the second metal contact. A dielectric material is configured to prevent a transmission of electric current through the heat sink from the plurality of film capacitor capacitive layers.

Abstract: A capacitor body includes a capacitance-forming section including an alternately arranged plurality of internal electrodes and plurality of dielectric ceramic layers and outer layer sections disposed on the upper or lower face of the capacitance-forming section (28). The outer layer sections include an outermost layer and a second layer (31) inwardly located therefrom. The second layer has a thermal expansion coefficient greater than that of the outermost layer by 1×10?6/° C. to 3×10?6/° C. The outermost layer has a thickness of 50 to 80 ?m. The second layer has a thickness of 20 to 50 ?m. The arrangement prevents cracks from being formed in a monolithic ceramic capacitor when external electrodes are formed by baking and cooling, and cracks caused by fatigue failure due to low-stress cycles such as heat cycles are prevented from reaching internal electrodes.

Abstract: The invention provides an electronic component which has an improved breakdown limit value of withstand voltage and improved insulation properties and which can be made compact and provided with a multiplicity of layers and a great capacity. The electronic component includes a first conductor having a bottom conductor formed on a substrate and a raised conductor formed to protrude from the bottom conductor, a dielectric film formed on the raised conductor, and a second conductor formed on the dielectric film to constitute a capacitor element in combination with the raised conductor and the dielectric film.

Abstract: In a sintered ceramic body including side gap portions arranged between sides of first and second internal electrodes and first and second side surfaces of the sintered ceramic body and between sides of the effective layer portion and the first and second side surfaces of the sintered ceramic body, regions of the side gap portions at least adjacent to the first and second internal electrodes are Mg-rich regions each having a Mg concentration greater than that of the effective layer portion.

Abstract: A multilayer ceramic capacitor includes first internal electrodes extending to a first end surface of a ceramic element assembly, a plurality of second internal electrodes extending to a second end surface, floating internal electrodes arranged so as to overlap the first and second internal electrodes with ceramic layers disposed therebetween to define first and second effective regions, inner conductors that are elongated from the first end surface beyond a region that overlaps the first effective region in the direction of layering, and a relationship X1<Y1<(L?E) is satisfied where L is the dimension in the longitudinal direction extending from the first end surface to the second end surface, X1 is the longitudinal-direction dimension of each of the first internal electrodes, Y1 is the distance between the first end surface and an end of each of the first internal electrodes, and E is the distance between the second end surface and an end of the second extended section.

Abstract: [Problem to be Solved] To provide a helical capacitor for controlling a high-frequency power which flows in power lines, and a manufacturing method of the helical capacitor. [Solution] A helical capacitor is constituted by helically spiraling a belt shape capacitor line 1001 which includes an internal metal body to be a helically spiraled belt-shape internal electrical conductor, a dielectric film covering the internal electrical conductor, and an electrically conductive layer covering the dielectric film. The capacitor line of belt shape 1001 can be wrapped around the internal support body 1200. Internal metal body lead terminals 1311, 1321 are respectively formed at both ends of the internal metal body, and electrically conductive layer lead terminals 1312, 1322 can be respectively formed at both ends of the electrically conductive layer.

Abstract: A multilayer structure, in particular a trench capacitor, is provided comprising a patterned layer structure comprising trenches, and a first electrode, wherein the patterned layer structure comprises a FASS-curve structure, and wherein at least parts of the first electrode are formed on the FASS-curve structure.

Abstract: A film capacitor including a pair of electrodes having multiple pores is provided. The film capacitor includes a polymer film deposited upon each of the pair of electrodes to form a dielectric layer.

Abstract: The present invention aims to provide an electronic component capable of reducing the occurrence of cracks at the joining portion with a board etc. A capacitor 1 (laminated ceramic capacitor) being one example of the electronic component of the present invention is provided with an element assembly 10 (ceramic) and a pair of external electrodes 20 formed on both side surfaces of the element assembly. In the element assembly 10, a dielectric layer 12 and an internal electrode 14 are laminated alternately. The external electrode 14 has such constitution that a first electrode layer connected with the internal electrode 14, a second electrode layer (electroconductive resin layer) including a hardened product of epoxy resin containing an epoxy compound having a molecular weight of 2000 or more and plural epoxy groups as the base compound, a third electrode layer composed of Ni and a fourth electrode layer composed of Sn are formed in this order from the element assembly side.

Abstract: The present invention relates to tunable capacitors, devices including tunable capacitors, and methods of making and using tunable capacitors and devices. One or more secondary tunable capacitors can be connected to a primary capacitor by printing a connector conducting layer or feature to obtain a desired net capacitance. Digitally printing the connector conducting layer allows the number of secondary capacitors connected into the circuit to be determined during the integrated circuit fabrication process, without the need for individual masks connecting the appropriate number of secondary capacitors. This provides an in-process or post-process trimming method to obtain the desired precision and accuracy for capacitors. Various sizes and combinations of secondary capacitors can be connected to obtain high precision capacitors and/or improved matching of capacitance values.

Abstract: A solder joint between a capacitive element and a ferrule of a filtered feedthrough assembly for an implantable medical device is formed from a solder pre-form mounted on a portion of an external surface of the capacitive element, which portion of the external surface may be overlaid with a layer including a noble metal. Another solder joint may be formed between the capacitive member and each feedthrough pin; and, for an assembly including a plurality of feedthrough pins, each of the other solder joints may be formed from a solder pre-form mounted onto the external surface of the capacitive element by inserting each pin through a corresponding ring of a plurality of rings connected together to form the solder pre-form.

Abstract: A capacitor device, an electronic circuit comprising a capacitor device, an electronic component, and a method of forming a capacitor device are described. In the capacitor device, a current-path region extends from one of two trench capacitor electrodes to a respective contact structure. The current-path region is obtainable by thinning the substrate from an original substrate thickness down to reduced substrate thickness either in a lateral substrate portion containing the capacitor region or over the complete lateral extension of the substrate before forming the first and second contact structures. The capacitor device exhibits a reduced impedance in the current-path region. This reduced impedance implies a low self-inductance and self-resistance that is caused by the current-path region.

Abstract: A surface mount type electronic component has a dielectric element body, electrodes, lead conductors, and lead wires. The dielectric element body has principal faces and side faces. One electrode is formed on one principal face, the other electrode is formed on the other principal face, and the electrodes face each other. A first portion of one lead conductor is laid on one side face. A first portion of the other lead conductor is laid on another side face. First portions of the lead wires are connected to the corresponding first portions of the lead conductors.

Abstract: A capacitor includes a lower electrode, a dielectric structure over the lower electrode, the dielectric structure including at least one crystallized zirconium oxide (ZrO2) layer and at least one amorphous aluminum oxide (Al2O3) layer, and an upper electrode formed over the dielectric structure. A method for fabricating a capacitor includes forming a lower electrode over a certain structure, forming a dielectric structure including at least one crystallized zirconium oxide (ZrO2) layer and at least one amorphous aluminum oxide (Al2O3) layer over the lower electrode, and forming an upper electrode over the dielectric structure.

Abstract: There is a provided a magnetic and dielectric composite electronic device, comprising: a first region with a plurality of magnetic material sheets being layered; a second region with a plurality of dielectric material sheets being layered; and a third region as a middle layer interposed between the first region and the second region, including a Zn—Ti based material to prevent diffusion of the materials during co-firing of the first region and the second region, and the first region, the second region and the third region are integrally formed in a single body. In accordance with the present invention, the low pass filter including the function of the varistor is realized to obtain the EMI function and the ESD control effect.

Abstract: A method of manufacturing a multilayer capacitor comprises a first layer forming step, a first electrode forming step, a second layer forming step, a second electrode forming step, a separation step, an element forming step and a terminal forming step. In the first layer forming step, a first ceramic green layer is formed on a supporting body. In the first electrode forming step, a first electrode pattern is formed on the first ceramic green layer. In the second layer forming step, a second ceramic green layer is formed laminated on the first ceramic green layer. In the second electrode forming step, a second electrode pattern is formed at the second ceramic green layer. In the separation step, the support body is separated from the laminated body. In the element forming step, elements are formed by laminating a plurality of the laminated bodies.

Abstract: Methods of producing polycrystalline and single crystal dielectrics are disclosed, including dielectrics comprising CaCu3Ti4O12 or La3Ga5SiO4. Superior single crystals are manufactured with improved crystallinity by atomic lattice constant adjustments to the dielectric and to the substrate on which it is grown. Dielectric materials made according to the disclosed methods are useful for manufacture of energy storage devices, e.g. capacitors.

Abstract: A coated substrate product is described comprising a substrate and a dielectric coating material comprising carbon, hydrogen, silicon, and oxygen. According to the method, the substrate is processed by plasma cleaning the surface and then depositing a dielectric coating by a suitable plasma process. The coating may contain one or more layers. The substrate may be a rigid material or a thin film or foil. The coated products of this invention have superior dielectric material properties and utility as substrates for the manufacture of rolled or parallel plate capacitors with high energy densities.

Abstract: The present invention relates to a ceramic laminated device including a dielectric ceramic and an Ag electrode. In a dielectric ceramic that can be sintered at low temperatures and has a high dielectric constant and Q value, reactivity between the ceramic and Ag during sintering is suppressed low and segregation of specific elements in the proximity of the electrode is controlled. Thus, a filter having a high Q value and low loss is produced stably. For this purpose, in a ceramic laminated body including at least a ceramic and a Si-containing glass, a ratio of A/B, i.e. a ratio of a Si element concentration (A) within a range at a distance of 5 ?m or smaller from the Ag electrode to a Si element concentration (B) within a range at a distance larger than 5 ?m from the Ag electrode, is set equal to or smaller than 2.

Abstract: A metal capacitor in which an electric conductivity is significantly improved by applying a metal material for an electrolyte and a manufacturing method thereof is provided.

Abstract: A multi-layer ceramic capacitor has a temperature characteristic satisfying an X8R property and has a high specific resistance under a high temperature circumstance, in which the dielectric ceramic composition forming the dielectric ceramics is expressed by a formula: BaTiO3+aMgO +bMOx+cReO3/2+dSiO2, wherein MgO represents MgO conversion, MOx represents oxide conversion for 1 atom in 1 molecule of at least one metal selected from V, Cr, and Mn, ReO3/2 represents oxide conversion for 1 atom in 1 molecule of at least one rare earth metal selected from Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Y, and SiO2 represents SiO2 conversion, and wherein 0.4?a?3.0 mol, 0.05?b?0.4 mol, 6.0?c?16.5 mol, 3.0?d?5.0 mol, 2.0?c/d?3.3, based on 100 mol of BaTiO3.

Abstract: A metal capacitor in which an electric conductivity is significantly improved by applying a metal material for an electrolyte and a manufacturing method thereof is provided.

Abstract: A multilayer ceramic capacitor 1 having dielectric layers 2 and internal electrode layers 3 formed using a conductor paste, wherein the conductor paste contains a conductive material, the conductive material is comprised of a first ingredient and second ingredient, the first ingredient includes metal elements having Ni as a main ingredient, and the second ingredient includes a metal element dissolving in the first ingredient and having a melting point of 1490° C. or more.

Abstract: A dielectric device has a first conductor and a dielectric disposed thereon. An intermediate region is formed between the first conductor and dielectric. In the intermediate region, an additive different from the first conductor and dielectric and the dielectric are mixed with each other. The additive contains at least one element of Si, Al, P, Mg, Mn, Y, V, Mo, Co, Nb, Fe, and Cr.

Abstract: An element body has first and second inner electrodes which are alternately laminated. The first inner electrode has a first main electrode, a first coupling conductor extending to a first side face of the element body while being connected to an edge part of the first main electrode, and a first lead conductor extending to a third side face while being connected to the first coupling conductor. The second inner electrode has a second main electrode, a second coupling conductor extending to the first side face of the element body while being connected to an edge part of the second main electrode, and a second lead conductor extending to a fourth side face while being connected to the second coupling conductor. The first and second lead conductors are separated from the first and second main electrodes by gaps, respectively.

Abstract: The present invention provides a dielectric film having a high permittivity and a high heat resistance. An embodiment of the present invention is a dielectric film (103) including a composite oxynitride containing an element A made of Hf, an element B made of Al or Si, and N and O, wherein mole fractions of the element A, the element B, and N expressed as B/(A+B+N) range from 0.015 to 0.095 and N/(A+B+N) equals or exceeds 0.045, and has a crystalline structure.

Abstract: A capacitor device with a capacitance is introduced. The capacitor device includes at least one capacitive element. The at least capacitive element comprises a pair of first conductive layers being opposed to each other, at least one first dielectric layer formed on a surface of at least one of the first conductive layers, and a second dielectric layer being sandwiched between the first conductive layers. The first dielectric layer has a first dielectric constant and the second dielectric layer has a second dielectric constant. The capacitance of the capacitor device depends on dielectric parameters of the first dielectric layer and the second dielectric layer. The dielectric parameters comprise the first dielectric constant and thickness of the at least one first dielectric layer and the second dielectric constant and thickness of the second dielectric layer.

Abstract: A ceramic green sheet structure has a ceramic green sheet including at least a ceramic material and a resin and a conductive layer formed on the ceramic green sheet. An electrode non-formed area has a porosity equal to or greater than 17%, and preferably, equal to or less than 25%. Moreover, an electrode formed area where the conductive layer is formed may have a smaller porosity than the electrode non-formed area where no conductive layer is formed.

Abstract: Provided is a dielectric element comprising a dielectric thin film formed of a layer of perovskite nanosheets. The dielectric element has the advantages of inherent properties and high-level texture and structure controllability of the perovskite nanosheets, therefore realizing both a high dielectric constant and good insulating properties in a nano-region.

Abstract: Devices for storing energy at a high density are described. The devices include a solid dielectric that is preformed to present a high exposed area onto which an electrode is formed. The dielectric material has a high dielectric constant (high relative permittivity) and a high breakdown voltage, allowing a high voltage difference between paired electrodes to effect a high stored energy density.

Abstract: A thin-film capacitor element having two conductive films and a dielectric film sandwiched therebetween is provided above a substrate. An inorganic protective film covering the thin-film capacitor element and having a second opening exposing at least a part of the conductive films is provided. An organic protective film covering the thin-film capacitor element from above the inorganic protective film and having a first opening therein, which is larger than the second opening and exposes the second opening, is provided. Besides, a bump connected with the conductive films via the first opening and the second opening is provided.

Abstract: In a capacitor structure and a method of manufacturing the capacitor structure, first and second conductive patterns are formed on a substrate. The first and second conductive patterns extend in a first direction. The first and second conductive patterns are alternately arranged to be spaced apart from one another in a second direction substantially perpendicular to the first direction. An insulating interlayer is formed on the substrate to cover the first and second conductive patterns. Third and fourth conductive patterns extending in a third direction lying at an angle of between about 0° and about 90° relative to the first direction are formed on the insulating interlayer. The third and fourth conductive patterns are alternately arranged to be spaced apart from one another in a fourth direction substantially perpendicular to the third direction.

Abstract: One embodiment of a dielectric material may include a metal containing cation and a polyatomic anion.

Abstract: One capacitor fabrication process including metal layer forming a metal layer on one surface of a substrate, dielectric layer forming a dielectric layer on the metal layer, metal foil forming a metal foil on the dielectric layer, separating the noble metal layer from the dielectric layer, and electrode layer forming an electrode layer on the second surface of the dielectric layer, wherein the second surface faces away from the first surface of the dielectric layer with the metal foil. Another capacitor fabrication process includes separation layer forming a separation layer on one surface of a substrate, dielectric layer forming a dielectric layer on the separation layer, metal foil forming a metal foil the dielectric layer, separating the substrate from the separation layer, and an electrode layer forming an electrode layer on the second surface of the dielectric layer, wherein the second surface faces away from the first surface of said dielectric layer with the metal foil.

Abstract: Devices for storing energy at a high density are described. The devices include carbon-containing extensions which increase the surface area between a dielectric material and one or both of the electrodes. The dielectric material may have a high dielectric constant (high permittivity) and a high breakdown voltage, allowing a high voltage difference between paired electrodes to effect a high stored energy density.

Abstract: Devices for storing energy at a high density are described. The devices include an electrode preformed to present a high exposed area onto which a dielectric is formed. The dielectric material has a high dielectric constant (high relative permittivity) and a high breakdown voltage, allowing a high voltage difference between paired electrodes to effect a high stored energy density.

Abstract: There is disclosed a low loss and high frequency lumped capacitor that is ideally constructed from LTCC dielectric material and deposited conductive layers. The capacitive plates are shaped as identical and overlapping serpentine conductive paths positioned on either side of a thin dielectric layer, with opposite ends of the conductive paths used for signal contact points. The net effect of the shape of the capacitive plates and the resulting approximately equal and opposite current flows is to cancel the majority of parasitic inductance at high frequencies, thus reducing insertion loss. Filters built using this construction of capacitor exhibit improved high frequency performance. This type of capacitor also has a simplicity of construction that allows integration into LTCC fabricated circuitry without requiring extra layers or terminals.

Abstract: A capacitor insulating film for use as an insulating film sandwiched between two electrodes is made of a crystal containing a hafnium element in a titanium site in place of a part of titanium elements contained in a crystal of a strontium titanate or barium strontium titanate.

Abstract: A thin laminate passive electrical device, such as, a capacitor, and a method of fabricating a thin laminate passive electrical device are provided. The passive electrical device includes two conductors, for example, copper foil conductors, separated by a dielectric having a first layer of a first material having a softening point temperature greater than a first temperature and a first layer of a second material having a softening point temperature less than the first temperature. The first temperature may be at least 150 degrees C. or higher. By providing a first layer having a higher softening point material, shorting across the conductors, that can be promoted by the fabrication process, is prevented. Methods of fabricating passive electrical devices are also disclosed.