Abstract: A metallized film capacitor includes a dielectric film and two metal vapor-deposition electrodes facing each other across the dielectric film. At least one of the metal vapor-deposition electrodes is made of substantially only aluminum and magnesium. This metallized film capacitor has superior leak current characteristics and moisture resistant performances, and can be used for forming a case mold type capacitor with a small size.

Abstract: There are provided a ceramic electronic component and a method for producing the ceramic electronic component, where a ground electrode layer can be directly coated with lead-free solder without lowering reliabilities. Terminal electrode 3 is provided with a ground electrode layer 21 of Cu having been formed by firing, a solder layer 22 formed of a lead-free solder based on five elements of Sn—Ag—Cu—Ni—Ge, and a diffusion layer 23 having been formed by the diffusion of Ni between the ground electrode layer 21 and the solder layer 22. Because the diffusion layer 23 of Ni is formed between the ground electrode layer 21 and the solder layer 22, the diffusion layer 23, which functions as a barrier layer, suppresses the solder leach of Cu from the ground electrode layer 21. The diffusion layer 23 of Ni can also suppress the growth of fragile intermetallic compounds of Sn—Cu. Therefore, a decrease in the bonding strength between the ground electrode layer 21 and the solder layer 22 can be prevented.

Abstract: In a laminated ceramic electronic component in which, by directly carrying out a plating process on an outer surface of a component main body, an external electrode is formed thereon, an attempt is made to improve the adhesion strength between a plated film forming the external electrode and the component main body. A brazing material containing Ti is applied to at least one portion of a surface on which external electrodes of a component main body is formed, and by baking this brazing material, a metal layer containing Ti is formed. Moreover, the external electrodes are formed by a plating process so as to coat at least the metal layer, and a heating process is then carried out so as to cause counter diffusion between the metal layer and the plated film that is to form the external electrodes.

Abstract: The capacitor material of the present invention is comprised by laminating a titanium dioxide layer and a titanate compound layer having perovskite crystals.

Abstract: A multilayer ceramic capacitor is provided. In the multilayer ceramic capacitor, a plurality of first and second inner electrodes are formed inside a ceramic sintered body. Ends of the first and second inner electrodes are alternately exposed to both ends of the ceramic sintered body. First and second outer electrodes are formed on both ends of the ceramic sintered body and connected to the first and second inner electrodes. The first and second outer electrodes include a first region having a porosity in the range of 1% to 10%, and a second region having a porosity less than that of the first region.

Abstract: A capacitor structure includes: a first electrode configured to include a plurality of openings; a second electrode formed in each center of the openings; and a dielectric layer formed to surround the second electrode and fill the openings of the first electrode.

Abstract: A method for manufacturing a TiN/Ta2O5/TiN capacitor, including the steps of depositing, on a TiN layer, a Ta2O5 layer by a plasma enhanced atomic deposition method (PEALD), within a temperature range from 200 to 250° C., by repeating the successive steps of: depositing a tantalum layer from a precursor at a partial pressure ranging between 0.05 and 10 Pa; and applying an oxygen plasma at an oxygen pressure ranging between 1 and 2000 Pa.

Abstract: A capacitor includes a ceramic capacitor body having opposite ends and comprised of a plurality of electrode layers and dielectric layers and first and second external terminals attached to the ceramic capacitor body. The internal active electrodes within the ceramic capacitor body are configured in an alternating manner. Internal electrode shields within the ceramic capacitor body are used to assist in providing resistance to arc-over. The shields may include a top internal electrode shield and an opposite bottom internal electrode shield wherein the top internal electrode shield and the opposite bottom internal electrode shield are on opposite sides of the plurality of internal active electrodes and each internal electrode shield extends inwardly to or beyond a corresponding external terminal to thereby provide shielding. Side shields are used. The capacitor provides improved resistance to arc-over, high voltage breakdown in air, and allows for small case size.

Abstract: A bulk capacitor includes a first electrode formed of a metal foil and a semi-conductive porous ceramic body formed on the metal foil. A dielectric layer is formed on the porous ceramic body for example by oxidation. A conductive medium is deposited on the porous ceramic body filling the pores of the porous ceramic body and forming a second electrode. The capacitor can then be encapsulated with various layers and can include conventional electrical terminations. A method of manufacturing a bulk capacitor includes forming a conductive porous ceramic body on a first electrode formed of a metal foil, oxidizing to form a dielectric layer and filling the porous body with a conductive medium to form a second electrode. A thin semi-conductive ceramic layer can also be disposed between the metal foil and the porous ceramic body.

Abstract: In a ceramic capacitor, first and second electrode terminals each include a bonded-to-substrate portion, a first bonded-to-electrode portion bonded to a first edge of one of first and second external electrodes, a second bonded-to-electrode portion bonded to a second edge of the one of first and second external electrodes and disposed at a distance from the first bonded-to-electrode portion in the first directions, and a connecting portion connecting the first and second bonded-to-electrode portions and the bonded-to-substrate portion. W1/W0 is about 0.3 or more, and h/L is about 0.1 or more.

Abstract: This invention relates to compositions, and the use of such compositions for protective coatings, particularly of electronic devices. The invention concerns a fired-on-foil ceramic capacitors coated with a composite encapsulant and embedded in a printed wiring board.

Abstract: There is provided a multilayer ceramic capacitor. The multilayer ceramic capacitor includes inner electrodes and dielectric layers stacked alternately with each other. When a continuity level of each of the inner electrodes is defined as B/A where A denotes a total length of the inner electrode and B denotes a length of the inner electrode excluding pores of the inner electrode, and a section of the inner electrode, having a predetermined length from each end of the inner electrode, is defined as an outer section, a section of the inner electrode excluding the outer section is defined as an inner section, and a section of the dielectric layers from each end of the inner electrode to a corresponding surface of the multilayer ceramic capacitor is defined as an edge section, a length of the outer section is 0.1 to 0.3 times that of the edge section, and the outer section of the inner electrode has a lower continuity level than that of the inner section of the inner electrode.

Abstract: In a case-molded capacitor, an electrode of a capacitor element is connected with a busbar having an electrode terminal for external connection. The capacitor element and the busbar are placed in a metal case having an upper surface opening and are resin molded. A thermally-conductive insulator layer is provided between the capacitor element and a bottom surface of the metal case, hence providing the case-molded capacitor with a heat resistance.

Abstract: One embodiment includes an apparatus that includes an implantable device housing, a capacitor disposed in the implantable device housing, the capacitor including a dielectric comprising CaCu3Ti4O12 and BaTiO3, the dielectric insulating an anode from a cathode and pulse control electronics disposed in the implantable device housing and connected to the capacitor.

Abstract: A capacitor having at least one electrode pair being separated by a dielectric component, with the dielectric component being made of a polymer such as a norbornylene-containing polymer with a dielectric constant greater than 3 and a dissipation factor less than 0.1 where the capacitor has an operating temperature greater than 100° C. and less than 170° C.

Abstract: A capacitor device prevents capacitor failure and pixel failure by preventing the capacitor from experiencing a short circuit caused by disconnection of a bridge formed between electrodes of the capacitor and a display apparatus having the capacitor device. A display device comprises a thin film transistor, a light emitting device, and the capacitor device described above.

Abstract: A thin-film device comprises a base electrode made of a metal, a first dielectric layer, a first inner electrode, a second dielectric layer, a second inner electrode, and a third dielectric layer. Letting T1 be the thickness of the lowermost first dielectric layer in contact with the base electrode in the plurality of dielectric layers, and Tmin be the thickness of the thinnest dielectric layer in the plurality of dielectric layers excluding the first dielectric layer, T1>Tmin. Making the first dielectric layer thicker than the thinnest, dielectric layer in the other dielectric layers can increase the distance between a metal part projecting from a metal surface because of the surface roughness of the base electrode and the inner electrode mounted on the lowermost dielectric layer, thereby reducing leakage currents.

Abstract: A ceramic electronic component achieves a sufficient drop resistance strength even when terminal electrodes are formed with a higher density. The ceramic electronic component includes a ceramic laminate including ceramic laminates which are laminated to each other, first terminal electrodes disposed in a peripheral portion of a bottom surface of the ceramic laminate, catch pad electrodes arranged in the ceramic laminate so as to face the respective first terminal electrodes, and sets each including at least two first via hole conductors, which electrically connect the first terminal electrodes and the respective catch pad electrodes.

Abstract: A nickel oxide that is co-doped with a first alkali metal dopant and a second metal dopant may be used, for example, to form a dielectric material in an electronic device. The dielectric material may be used, for example, in a capacitor. The second metal dopant of the nickel oxide may be, for example, tin, antimony, indium, tungsten, iridium, scandium, gallium, vanadium, chromium, gold, yttrium, lanthanum, ruthenium, rhodium, molybdenum or niobium.

Abstract: A dielectric ceramic with stable insulation properties even after calcination under a reducing atmosphere, as is preferred for a laminated ceramic capacitor, is a CaTiO3 composition containing Sn. It is preferable for the dielectric ceramic to contain, as its main component, (Ca1-xBaxSny)TiO3 (0?x<0.2, 0.01?y<0.2) with a solution of Sn at the B site.

Abstract: Embodiments of an integrated passive device include a high-aspect ratio conductive line positioned on a carrier, a substrate, and a bump that secures the high-aspect ratio conductive line to the substrate.

Abstract: A process for forming a laminate with capacitance and the laminate formed thereby. The process includes the steps of providing a substrate and laminating a conductive foil on the substrate wherein the foil has a dielectric. A conductive layer is formed on the dielectric. The conductive foil is treated to electrically isolate a region of conductive foil containing the conductive layer from additional conductive foil. A cathodic conductive couple is made between the conductive layer and a cathode trace and an anodic conductive couple is made between the conductive foil and an anode trace.

Abstract: Methods of forming an oxide are disclosed and include contacting a ruthenium-containing material with a tantalum-containing precursor and contacting the ruthenium-containing material with a vapor that includes water and optionally molecular hydrogen (H2). Articles including a first crystalline tantalum pentoxide and a second crystalline tantalum pentoxide on at least a portion of the first crystalline tantalum pentoxide, wherein the first tantalum pentoxide has a crystallographic orientation that is different than the crystallographic orientation of the second crystalline tantalum pentoxide, are also disclosed.

Abstract: An electrical multilayer component has a stack of dielectric layers and electrode layers arranged one above another. An electrically insulating stiffening element is arranged at a distance from at least one electrode layer on the same dielectric layer as the electrode layer. The stiffening element preferably has an increased flexural strength with respect to dielectric material surrounding it.

Abstract: To provide a dielectric ceramics achieving a high insulation resistance even at a low applied voltage, and minimizing insulation resistance drop when the voltage is increased, and also provide a multilayer ceramic capacitor including the dielectric ceramics as a dielectric layer, and having excellent life characteristics in a high temperature load test. The dielectric ceramics has crystal grains composed mainly of barium titanate and containing vanadium, and a grain boundary phase existing between the crystal grains. The dielectric ceramics contains 0.0005 to 0.03 moles of vanadium in terms of V2O5, with respect to 1 mole of barium constituting the barium titanate. In the X-ray diffraction chart of the dielectric ceramics, the diffraction intensity of (004) plane indicating the tetragonal system of barium titanate is larger than the diffraction intensity of (400) plane indicating the cubic system of barium titanate.

Abstract: A capacitor structure and a manufacturing method thereof. The capacitor structure includes a first conductor layer, a dielectric layer and a second conductor layer. The first conductor layer has a first metal material and a second metal material. The first metal material is formed with voids and the second metal material is filled in the voids via hot melt. Accordingly, in the first conductor layer, the second metal material is filled into the voids of the first metal material by means of hot melt to bond with the first metal material. In this case, the thermal treatment temperature can be effectively lowered and the electrical conductivity of the capacitor structure can be increased. Also, the strength of the capacitor structure is increased.

Abstract: A semiconductor device and a method of fabricating the same include an electrode having a nickel layer with impurities. The electrode having a nickel layer with impurities can be a gate electrode or a capacitor electrode. The electrode having a nickel layer with impurities may include a combination of a pure nickel layer and a nickel layer with impurities.

Abstract: The present invention is directed to a microfabricated RF capacitor. The capacitor includes two signal wirebond pads configured for being connected to an electrical current source. The capacitor further includes two backbone structures which are connected to the wirebond pads and receive electrical current from the electrical current source via the wirebond pads, each backbone structure including a first backbone portion and a second backbone portion. The capacitor further includes a plurality of protrusions which are connected to the backbone portions of the backbone structures. The protrusions are spaced apart from each other and parallel to each other. Further, the protrusions are configured for distributing current received by the backbone structures and for promoting structural stability of the capacitor. The capacitor further includes a ground wall structure which may be configured for receiving ground current from a ground current source.

Abstract: A capacitor and a method of manufacturing the capacitor are disclosed. The capacitor may include a board, a polymer layer formed on one side of the board, a circuit pattern selectively formed over the polymer layer, and a titania nanosheet corresponding with the circuit pattern. Embodiments of the invention can provide flatness in the board, and allows the copper of the board to maintain its functionality as an electrode while increasing the adhesion to the titania nanosheet. The titania nanosheet may thus be implemented on a patterned board in a desired shape, number of layers, and thickness.

Abstract: A multi-layered capacitor includes three or more capacitor layers. A first layer includes a first DC-biased, tunable capacitor. A second layer, acoustically coupled to the first layer, includes a second DC-biased, tunable capacitor. A third layer, acoustically coupled to the second layer, includes a third DC-biased, tunable capacitor. Each dielectric of the first, second, and third capacitors has a resonance of about the same frequency, within 5%, and inner electrodes of the first, second, and third capacitors have a resonance of about the same frequency, within 5%. The resonance of each layer is a function of at least thickness, density, and material. The first, second, and third layers are biased to generate destructive acoustic interference, and the multi-layer capacitor is operable at frequencies greater than 0.1 GHz.

Abstract: A multilayer ceramic capacitor includes a capacitor body in which inner electrodes and dielectric layers are alternately laminated, and a length difference rate (D) of the inner electrodes is 7% or less. The length difference rate (D) is defined by D={L?1}/L×100, where L is a maximum length of the inner electrode, and l is a minimum length of the inner electrode.

Abstract: A ceramic material has a perovskite structure and is represented by formula of (1?x)ABO3-xYZO3. In the formula, “x” is a real number that is greater than 0 and is less than 1 each of “A,” “B,” “Y,” and “Z” is one or more kinds selected from a plurality of metal ions M other than a Pb ion and alkali metal ions, “A” is bivalent, “B” is tetravalent, “Y” is trivalent or combination of trivalent metal ions, and “Z” is bivalent and/or trivalent metal ions, or a bivalent and/or pentavalent metal ions.

Abstract: An electrical component includes a ceramic base body that includes a surface that is partially ceramic, electrodes in the ceramic base body that have ends that form parts of the surface of the ceramic base body, and a bonding layer on the surface of the ceramic base body. The bonding layer has a composition such that, when the bonding layer is heated, the bonding layer is less adhesive to the ends of the electrodes than when not heated.

Abstract: Disclosed herein is a capacitative element, including: a first electrode formed on a substrate; and a second electrode provided so as to sandwich a dielectric between the first electrode and the second electrode and so as to surround the first electrode on four sides along a surface of the substrate.

Abstract: Provided is a dielectric element comprising a dielectric thin film formed of a layer of perovskite nanosheets. The dielectric element has the advantages of inherent properties and high-level texture and structure controllability of the perovskite nanosheets, therefore realizing both a high dielectric constant and good insulating properties in a nano-region.

Abstract: An organic dielectric material comprises a branched and/or hyperbranched macromolecule having delocalized electrons. Such macro-molecular organic material systems have desirable delocalized charge and optionally one or more micro-crystalline regions. Organic dielectric materials include, for example, branched polyanilines and phthalocyanines. Delocalized excitations within the macromolecular framework of the organic dielectric material may be used in various applications, such as light harvesting, nonlinear optical, quantum optical, and electronic applications, e.g., capacitors. Electrical devices may comprise such dielectric materials, including capacitors that have very high energy density, storage, and transfer. Also provided are methods of preparing such materials.

Abstract: A monolithic ceramic capacitor includes dielectric ceramic layers having a thickness of less than 1 ?m. When this thickness is t and the crystal grains of a dielectric ceramic of the layers have a mean diameter of r, a mean number N of grain boundaries satisfies 0<N?2 where N=t/r?1. The dielectric ceramic contains, as a main component, a perovskite type compound ABO3 (where A is Ba or Ba and at least one of Ca and Sr, B is Ti or Ti and at least one of Zr and Hf), and further contains Mn and V as auxiliary components. On the basis of 100 molar parts of the main component, the content of Mn is 0.05 to 0.75 molar parts, the content of V is 0.05 to 0.75 molar parts, and the total content of Mn and V is 0.10 to 0.80 molar parts.

Abstract: The present invention related to a method for forming a capacitor device, comprising steps of: providing a substrate, forming a first metal layer on the substrate, forming a dielectric on the first metal layer, applying a laser-annealing to the dielectric, and forming a second metal layer on the dielectric.

Abstract: In a method for manufacturing a monolithic ceramic electronic component, when an inner conductor is formed by printing an electrically conductive paste, a smear may be generated in an opening of the inner conductor at a side of the opening near to a position from which printing is started in a printing direction. The smear may cause an unwanted contact between the inner conductor and a via conductor, which is a conductor extending through the opening and having a potential different from that of the inner conductor, and cause a short-circuit. The inner conductor is printed in such a manner that the center of each of the via conductors is deviated from the center of the opening in the direction in which the electrically conductive paste is printed. With this structure, even if the smear is generated in the opening, the probability that the inner conductor contact the via conductor and cause a short-circuit is minimized.

Abstract: In a method of manufacturing ceramic capacitor according to the present invention, a pair of interdigitated internal electrodes are arranged perpendicularly to the surface of the substrate, subsequent to which the respective end faces of this pair of internal electrodes are exposed, and a pair of external electrodes are formed at these exposed end faces. In this method of manufacturing ceramic capacitor, formation of the external electrodes on the end faces of the respective internal electrodes, with these internal electrodes being interdigitately integrally-formed and the end faces thereof being exposed, it possible to reliably and easily form the external electrodes.

Abstract: There is provided a ceramic electronic component including a ceramic sintered body, internal conductive layers, and external electrodes. Each of the external electrodes includes a first electrode layer, a conductive resin layer covering the first electrode layer, and a second electrode layer covering the conductive resin layer and having an extension length greater than the length of the first electrode layer extending from one of the side surfaces of the ceramic sintered body to the portions of the top and bottom surfaces thereof. The distance from the top or bottom surface of the ceramic sintered body to the closest layer of the internal conductive layers is greater than or equal to the length of the first electrode layer extending from one of the side surfaces of the ceramic sintered body to the portions of the top and bottom surfaces thereof.

Abstract: Disclosed are apparatus and methodology for providing a precision laser adjustable (e.g., trimmable) thin film capacitor array. A plurality of individual capacitors are formed on a common substrate and connected together in parallel by way of fusible links. The individual capacitors are provided as laddered capacitance value capacitors such that a plurality of lower valued capacitors corresponding to the lower steps of the ladder, and lesser numbers of capacitors, including a single capacitor, for successive steps of the ladder, are provided. Precision capacitance values can be achieved by either of fusing or ablating selected of the fusible links so as to remove the selected subcomponents from the parallel connection. In-situ live-trimming of selected fusible links may be performed after placement of the capacitor array on a hosting printed circuit board.

Abstract: There is provided a dielectric ceramic composition including a base powder expressed by a composition formula of Bam(Ti1-xZrx)O3, where 0.995?m?1.010 and 0<x?0.10, and first to fifth accessory components, and a multilayer ceramic capacitor having the same. The multilayer ceramic capacitor having the dielectric ceramic composition has a high dielectric constant and superior high-temperature reliability.

Abstract: There is provided a multilayer chip capacitor including: a capacitor body including first and second capacitor units arranged in a laminated direction; and first to fourth outer electrodes formed on side surfaces of the capacitor body, respectively, wherein the first capacitor unit includes first and second inner electrodes of different polarities alternately arranged in the capacitor body to oppose each other while interposing a corresponding one of dielectric layers, the second capacitor unit includes third and fourth inner electrodes of different polarities alternately arranged in the capacitor body to oppose each other while interposing another corresponding one of the dielectric layers, the first and second capacitor units are electrically insulated from each other, and the first capacitor unit operates in a first frequency range and the second capacitor unit operates in a second frequency range lower than the first frequency range.

Abstract: Systems and methods are provided for fabricating a thin film capacitor involving depositing an electrode layer of conductive material on top of a substrate material, depositing a first layer of ferroelectric material on top of the substrate material using a metal organic deposition or chemical solution deposition process, depositing a second layer of ferroelectric material on top of the first layer using a high temperature sputter process and depositing a metal interconnect layer to provide electric connections to layers of the capacitor.

Abstract: A capacitor structure is disclosed. The capacitor structure includes at least a D1+ first-level array. The D1+ first-level array comprises three first D1+ conductive pieces and a second D1+ conductive piece. Two of the first D1+ conductive pieces are disposed in a first row of the D1+ first-level array, and the remaining first D1+ conductive piece and the second D1+ conductive piece are disposed in a second row of the D1+ first-level array from left to right. The adjacent first D1+ conductive pieces are connected to each other, and the first D1+ conductive pieces are not connected to the second D1+ conductive piece.

Abstract: A method for manufacturing a laminated electronic component includes the steps of preparing a component main body having a laminated structure, the component main body including a plurality of internal electrodes formed therein, and each of the internal electrodes being partially exposed on an external surface of the component main body, and forming an external terminal electrode on the external surface of the component main body such that the external terminal electrode is electrically connected to the internal electrodes. The step of forming the external terminal electrode includes the steps of forming a first plating layer on exposed surfaces of the internal electrodes of the component main body, applying a water repellant at least on a surface of the first plating layer and on a section in the external surface of the component main body at which an end edge of the first plating layer is located, and then forming a second plating layer on the first plating layer having the water repellant applied thereon.

Abstract: The embodiments disclosed herein are directed to fabrication methods useful for creating MEMS via microcontact printing by using small organic molecule release layers. The disclose method enables transfer of a continuous metal film onto a discontinuous platform to form a variable capacitor array. The variable capacitor array can produce mechanical motion under the application of a voltage. The methods disclosed herein eliminate masking and other traditional MEMS fabrication methodology. The methods disclosed herein can be used to form a substantially transparent MEMS having a PDMS layer interposed between an electrode and a graphene diaphragm.

Abstract: An electrical multilayer component has a stack of dielectric layers and electrode layers arranged one above another. Electrode layers of identical electrical polarity are jointly contacted to an external contact arranged at a side face of the stack. A resistor sintered to the stack and containing ceramic resistance material is arranged on an end face of the stack.

Abstract: A capacitor includes a pair of electrically conductive layers; a plurality of substantially or nearly tubular dielectric materials disposed between the pair of electrically conductive layers formed of anodic oxide of metal; first electrodes which are filled in hollow portions of the dielectric materials and connected to one of the electrically conductive layers; and a second electrode that is filled in voids between the respective dielectric materials and connected to the other electrically conductive layer.