Abstract: The present invention discloses an integrated circuit arrangement (100) comprising a data communication network comprising a plurality of connections (300), a plurality of modules (110) coupled to the data communication network via at least one network interface (120), the network interface comprising a plurality of buffers; a remote service module (150) being coupled to the data communication network via a further network interface (140), wherein each of said modules (1 10) is arranged to provide its network interface (120) with a service request (200) for the remote service module (150), said network interface being arranged to extend said service request with a first identifier (204) for establishing a network connection (300) with a remote service module (150); and a circuit portion (350) comprising a plurality of buffers (142) between the at least one network interface (120) and the remote service module (150) for storing service requests (200) from the plurality of modules (110), said circuit portion co

Abstract: The invention relates to a method for programming a wiper system (10; 10a) for vehicle windscreens, in which for operating respectively a windscreen wiper (14, 15) a wiper module (12, 13) on the driver's side is programmed as master module (36) and a wiper module (12, 13) on the passenger's side is programmed as slave module (37), wherein the wiper modules (12, 13) consist of a reversing motor (18), if applicable a gear (19), a holder (22, 23) for fastening to the body of a vehicle, and a control (20), wherein in the control (20) at least data for a program sequence (38), vehicle-specific characteristic data (39) and data for the operation of the wiper module (12, 13) as master module (36) or respectively as slave module (37) are stored, wherein at least the wiper module (12, 13) on the driver's side is connected via an on-board wiring system interface (30) and a first data communication line (32) with a vehicle control unit (28).

Abstract: An adapter for high speed multiple buffer allocation is provided. The adapter is configured with logic to search a data buffer availability vector corresponding to data buffer storage elements from low priority to high priority and from high priority to low priority in parallel thereby enabling multiple data buffers to be located in a single path and reducing the impact of pipelining.

Abstract: The present invention relates to a digital telecommunications system for creating, integrating, grouping, managing, deploying, activating and orchestrating mobile, fixed, IP, converged and next generation services and networks. Said system is called MULTI-SERVICE NETWORK CENTER (10), and includes at least one application and service orchestration server module (15), referred to as Network Browser (15), at least one administration module (13), at least network gateway module (18), at least one integration gateway module (14) and at least one database and profiling module (19). Said system includes means to be integrated to at least one core telecommunications network and means for introducing and/or management of services of complex control into said core network and in at least one of the elements thereof.

Abstract: A bus arbitration apparatus and method are provided. A plurality of masters may be classified into master types based on master characteristics, and bus arbitration may be performed. Thus, it is possible to prevent a bus from being distributed to a predetermined master, and it is possible to improve overall performance of a bus system by solving a problem of unbalanced distribution of performance between the plurality of masters.

Abstract: According to the system of the present invention, data (DQ) signals are outputted/received between a controller 100 and a memory 200 based on a data strobe signal sent out from the controller 100. The data strobe signal is independently and completely separated from a clock signal. The data strobe signal has a frequency different from a clock signal. Therefore, the memory 200 is not required to generate a read data strobe signal from the clock signal nor to send the read data strobe signal in synchronization with the clock signal.

Abstract: A super input/output (I/O) module for controlling a universal serial bus (USB) port of a computer system is provided. The super I/O module includes a USB host, a switch and a processor. The switch selectively couples the USB port of the computer system to the USB host or a controller of the computer system according to a switching signal. When a trigger event occurs, the processor provides the switching signal to control the switch, so as to couple the USB port of the computer system to the USB host and to transmit a basic input/output system (BIOS) code to a flash memory of the computer system via the switch and the USB port.

Abstract: High-speed serial communications between programmable devices connected to an I2C bus that includes a serial clock channel (SCL) and a serial data channel (SDA), having at least a logical low state and a logical high state. The programmable device determines if the SCL channel is idle, indicated by a logical high state. Determining the SCL to be idle, the programmable device holds the SCL to a logical low state. The programmable device operates high-speed serial communications using the SDA channel while holding the SCL to the low logical state. In response to completion of the high-speed communications, the programmable device releases the SCL channel and the SCL channel returns to the logical high state.

Abstract: A slave electronic device is provided, including a capture unit, at least one low-speed unit and an embedded control unit. The capture unit is coupled to a host electronic device through a transmission lane to filter out a high-frequency signal part from a control signal outputted by the host electronic device to generate a low-frequency control signal, wherein the control signal has a plurality of periods and the control signal respectively has a low-frequency signal part and the high-frequency signal part during odd periods and even periods of the periods. The low-speed unit is coupled to the capture unit to operate according to the low-frequency control signal. The embedded control unit is coupled to the transmission lane for communicating with the host electronic device using a predetermined communications protocol via the high-frequency signal part.

Abstract: A mobile device includes a docking unit for docking with an external device, and an integrated circuit chip including an impedance matching circuit for impedance matching of an internal bus outside of the integrated circuit chip, wherein activation or deactivation of the impedance matching circuit is determined based on whether the docking unit is docked.

Abstract: Methods for configuring networks and systems including nodes and switches. In one aspect, a method includes selecting a (v, b, r, k, ?) balanced incomplete block design (BIBD), wherein the BIBD includes v elements and b blocks of k elements, each element of the v elements is in r blocks of the b blocks, and each distinct pair of elements of the v elements is in ? blocks of the b blocks. Nodes are connected to switches. Each node is assigned to a different element of the BIBD. Each switch is assigned to a different block of the BIBD. For each switch, the switch is connected to the nodes assigned to the elements included in the block assigned to the switch.

Abstract: A memory module is operatable in a memory system with a memory controller. The memory module comprises a module control device to receive command signals from the memory controller and to output module command signals and module control signals. The module command signals are provided to memory devices organized in groups, each group including at least one memory device, while the module control signals are provided to a plurality of buffer circuits to control data paths in the buffer circuits. The plurality of buffer circuits are associated with respective groups of memory devices and are distributed across a surface of the memory module such that each module control signal arrives at the plurality of buffer circuits at different points in time.

Abstract: A communication channel includes a first component having a transmitter coupled to a normal signal source, and a second component having a receiver coupled to a normal signal destination. A communication link couples the first and second components. Calibration logic provides for setting an operation value for a parameter of the communication channel, such as by executing an exhaustive calibration sequence at initialization of the link. A tracking circuit, including a monitoring function, tracks drift in the parameter by monitoring a feedback signal that has a characteristic that correlates with drift in the communication channel, and updates, or indicates the need for updating of, the operation value of the parameter in response to the monitoring function.

Abstract: Methods and systems are provided to allow personal computer users to virtualize a local USB device so that they can remotely connect to a server and interact with the server as if the local USB device was physically connected to the server. They connect a remote USB target hardware device to the target system through a physical USB connection, and the device interacts with the local user's computer over a network. The target system is unaware that the USB device is not connected directly to the system through a physical connection, and the target system does not need special software to implement the remote USB device. The USB target hardware device connected to the target computer may be physically connected and disconnected.

Abstract: The present invention disclosed a Universal Serial Bus (USB) apparatus. The apparatus includes: a signal detecting unit for detecting a packet signal transmitted from a USB host and generating an acknowledgment signal according to a detection result; an error detecting unit, coupled to the signal detecting unit, for generating a control signal according to the acknowledgment signal; and a frequency generating unit, coupled to the error detecting unit, for generating an output clock signal according to the control signal.

Abstract: An apparatus for determining and/or monitoring a chemical or physical, process variable in automation technology, comprising: a superordinated control unit; and a transmitter electronics having a first interface, a second interface and a third interface. The transmitter electronics communicates with the superordinated control unit by means of the first interface via a bus protocol. The transmitter electronics can be connected with a service unit via the second interface; and the third interface has a plurality of data channels for corresponding data source components; and wherein individual data channels are addressable and tunable via the service unit as a function of the connected data source components, so that data selected from the data for the connected data source components can be transmitted at the same time in at least one telegram to the superordinated control unit.

Abstract: An MCP type semiconductor memory device having a defective cell remedy function, enables easy design and manufacture while minimizing chip area increase. The semiconductor memory device includes memory chips and a memory controller chip that designates an address of a memory chip according to an access request received from outside and controls access to the designated address. Each memory chip includes first and second storage regions and an information holder that holds address information representing associations between addresses in the first and second storage regions. The memory controller chip includes an address translating part that performs, upon receiving a request to access a specific address in the first storage region indicated by the address information, address designation by translating the specific address in the first storage region to an address in the second storage region corresponding to the specific address based on the associations represented by the address information.

Abstract: A system and method for ordering supplies, includes a portable barcode scanner configured to output data according to at least one of an HID, CDC or SPP protocol. A mobile phone device incapable of recognizing and parsing data when the data is configured according to the HID, CDC or SPP protocol is connected to the scanner using a communication connection. A scanner adapter application on the mobile phone device, which receives the output data comprising order data, is configured to parse the order data and pass it to an upload application having a current data field that receives at least part of the order data. A listener server configured to receive the at least part of the order data from the upload application processes the order information into an electronic order, and sends the electronic order to a vendor server.

Abstract: A method includes resetting an output timing adjustment circuit in each of a plurality of DRAM devices to a default output timing data value, measuring a default delay from read command to read data for each of the plurality of DRAM devices, identifying a slowest DRAM device having a maximum default delay from read command to read data among the plurality of DRAM devices, writing an output timing data value to the output timing adjustment circuit in each of the plurality of DRAM devices to set the delay from read command to read data for each respective DRAM device to an amount substantially equal to the maximum default delay, and reading data from any one of the plurality of DRAM devices with a delay from read command to read data substantially equal to the maximum default delay.

Abstract: Devices and methods for extending USB-compliant communication distances, including USB 3.0 SuperSpeed communication, are provided. In some embodiments, a host is communicatively coupled to a device that provides an upstream facing port, and a USB device is communicatively coupled to a device that provides a downstream facing port. The upstream facing port and downstream facing port are coupled via a communication channel. In some embodiments, the upstream facing port and downstream facing port generate packets to ensure that timing requirements of the USB specification are met regardless of the latency of the communication channel.

Abstract: A data transmission selection circuit and method select one of data transmission lines between a mother system and daughter systems and transmit data via the selected transmission line. The circuit includes an inputting module, an outputting module, a switching unit, and a processing unit. The inputting module receives and sends the data. to the switching unit and the outputting module. The processing unit receives a previous switching status data (indicating that one of the data transmission lines and one of the daughter systems are connected and) created by a previous data transmission selection circuit. After analyzing the previous switching status data with an algorithm, the processing unit determines a switching status data. different from the previous switching status data, such that the switching unit connects another one of the data transmission lines and another one of the daughter systems according to the switching status data.

Abstract: In one embodiment, a method includes storing, in a storage unit, a number of data transfer requests to issue for a data request signal. Data transfer requests are issued to a direct memory access (DMA) controller of a system for transfer of data to a buffer unit. The stored number of data transfer requests is determined. The issuance of data transfer requests are stopped when the stored number of data transfer requests is met.

Abstract: Embodiments disclose a docking station that may include a transmitter to send an identifier associated with the docking station to a mobile device proximate to the docking station, and a receiver to receive settings from the mobile device. The settings may be based on the identifier associated with the docking station, and the settings specify at least one of a ring volume, a ringtone, or a list of contacts. The docking station may also include a processor to interpret the settings so that the docking station performs according to the settings.

Abstract: A method including intercepting a OFR for a file issued by an application to a FS, forwarding the OFR to the FS, receiving from the FS a FD for the file, issuing a SR for the file to the FS. The further method includes receiving from the FS status information for a target device on which the file is located, where the status information includes an OID for the file, storing a mapping of FD to the OID, intercepting a first FOR for the file, making a determination the that the first FOR is one of a read request and a write request, based on the determination, making another determination that the target device supports the direct I/O protocol, and issuing a DI request to the target device using the OID for the file, where the DI request is not processed by the FS.

Abstract: The present embodiments relates to wireless adaptors. In one embodiment, a method is provided. The method may include obtaining an adaptor-device identification that identifies both a wireless adaptor and a wired device coupled with the wireless adaptor; and communicating with a network device via a wireless network using the adaptor-device identification, the wired device being distinguishable from other wired devices using the adaptor-device identification.

Abstract: A status information communication port for notifying a host apparatus of an error that has occurred during initialization of a printer engine, and a print data communication port for receiving print data sent from the host apparatus are respectively opened at appropriate timings. For example, the status information communication port is opened in response to completion of initialization of an interface, and the print data communication port is opened in response to completion of the initialization of the printer engine.

Abstract: According to one embodiment, a video sender comprises: a video processor and a communication module. The video processor creates video. The communication module is configured to communicate with a video receiver. The communication module comprises: a receiver and a transmitter. The receiver receives, from the video receiver, specific information specifying which one of a color signal and a frame rate takes precedence over the other one in transmission. The transmitter converts the video created by the video processor into video in which one of the color signal and the frame rate takes precedence over the other one in accordance with the specific information, and transmit the video thus converted to the video receiver.

Abstract: A source clock system clock domain is selected by communication of the desired clock domain from a receiver clock system through a clock line, such as through a clock differential pair. For instance, the source clock system signals available clock domains by selectively altering the polarity of a first clock line of the pair and the receiver clock system selects from the available clock domains by altering the polarity of a second clock line of the pair. Polarity is altered by selectively interfacing a resistor with the clock lines and then removing the resistor interface when the clock signal associated with the selected clock domain is sent by the source clock system.

Abstract: An image processing apparatus includes: a first storing portion storing first setting groups; and a controller including: a first receiving portion receiving designation of one of the first setting groups; a storage controlling portion storing values of priority and settings of setting items in the first setting group as a second setting group in a second storing portion; a second receiving portion receiving designation of the second setting group stored in the second storing portion; a display controlling portion making a displaying portion display the settings of the setting items in the second setting group; a third receiving portion receiving a change of at least one of the settings of the setting items displayed in the displaying portion; and an execution receiving portion receiving instruction of executing of image processing by using the settings of the setting items displayed in the displaying portion.

Abstract: A system and method for detecting an intrusion or a bug in a vehicle data transmission system. A hardware-software complex (HSC) is used to find a bug or intrusion device in a vehicle electronic system. The HSC is connected to CAN-buses in the vehicle and also scans radio waves, which can be used to transmit data to a bug. This complex is a self-teaching CAN-system used to monitor and block harmful commands in the vehicle. Each vehicle (of each model, type and settings) has its own reference bus data (parameters), which is used to detect added modules and malicious data sent over the vehicle's CAN bus.

Abstract: An intelligent serial interface circuit in accordance with one embodiment of the invention can include a first communication interface circuit for enabling a first communication protocol. The intelligent serial interface circuit can also include a second communication interface circuit for enabling a second communication protocol. Furthermore, the intelligent serial interface circuit can include a detector circuit coupled to the first communication interface circuit and the second communication interface circuit. The detector circuit can be for automatically detecting a factor that indicates automatically enabling the first communication interface circuit and automatically disabling the second communication interface circuit. The detector circuit can be for detecting a coupling of a pin of the first communication interface circuit that is not used by the second communication interface circuit.

Abstract: A multi layer data link communication system for a vehicle having a remote starter/alarm system, a vehicle computer and an OEM security interface. The system includes a multi-functional data bus interface module for sending control commands to the vehicle computer. The system also includes a transponder bypass module in communication with the OEM security interface and the multi-functional data bus interface module for transmitting and receiving authorization commands from the OEM security interface.

Abstract: A communication apparatus for carrying out communications to and from an external apparatus that includes a first interconnecting unit and a first non-transparent port and effects an interconnection for communications via the first non-transparent port is provided. The communication apparatus includes a second interconnecting unit that includes a second non-transparent port communicably connected to the first non-transparent port. The second interconnecting unit effects an interconnection for communications via the second non-transparent port. The second interconnecting unit performs, when the communication apparatus carries out communications to and from the external apparatus, address translation between an address for use by the communication apparatus and an address for use by the second non-transparent port.

Abstract: Disclosed herein are systems, apparatuses, and methods for enabling efficient reads to a local memory of a processing unit. In an embodiment, a processing unit includes an interface and a buffer. The interface is configured to (i) send a request for a portion of data in a region of a local memory of an other processing unit and (ii) receive, responsive to the request, all the data from the region. The buffer is configured to store the data from the region of the local memory of the other processing unit.

Abstract: A computer switching device is disclosed which enables switching between a local computer and a secure computer connected through a network. The device sits like a keyboard-video-mouse (KVM) and optionally audio device between the local computer and the local input/output devices, but connects to the secure computer through a network. Access to the secure computer is pre-configured in the switching device through access and security settings for a specific user to the specific secure computer. The switching device specifically prevents access to the secure computer by the local computer, printer, or storage devices such as fixed or removable media drives. Tamper detection is included to disable secure access on any tampering with the switching device.

Abstract: Various embodiments of a method [800] of distributing configuration information within a predefined set of conjoined blades of a blade partition are described. In one embodiment, a configuration rule at a database for a predefined set of conjoined blades of a blade partition is accessed, wherein conjoined blades within the blade partition are coupled with management processors [805]. A portion of the configuration rule is compared with a hardware configuration of the blade partition [810]. The portion of the configuration information is an identification of the conjoined blades [810]. When the portion of the configuration rule correlates with the hardware configuration, the configuration rule is provided to the management processors of the blade partition [815].

Abstract: An integrated circuit includes an array of memory cells and a digital flag generator circuit configured to generate a data inversion flag based on whether a number of logical zero bits contained in a data word to be transmitted from the memory cells is greater than a threshold number. The digital flag generator circuit includes a first digital stage including a first plurality of binary logic circuits. Each of the binary logic circuits is configured to receive a subset of the data word.

Abstract: An apparatus for processing and tracking the progress of coherency transactions in a computing system is disclosed. The apparatus may include a finite-element state machine, a processor, and a scoreboard circuit. The finite-element state machine may be configured to track the progress of a transaction as well as detect errors during the processing of the transaction. The processor may be configured to transmit coherence requests dependent upon the transaction. The scoreboard circuit may be configured to track the requests and associate responses.

Abstract: A processing system is disclosed. The processing system comprises a first integrated circuit. The first integrated circuit includes a processor core, a display interface and memory controller coupled to a first bus interface. The display interface is adapted to display graphical information generated by a graphics engine. A graphics engine is not on the first integrated circuit. The processing system includes a second bus interface for allowing communication with the first integrated circuit via the first bus interface. The second bus interface is adapted to allow for communication to a graphics engine.

Abstract: A method is disclosed that includes retrieving first data associated with a call from an action-object table. The method further includes retrieving second data from a resolution table based on the first data. The second data indicates a treatment type to be provided to the call. The method further includes, in response to determining that the treatment type indicates a particular treatment type, servicing the call with the particular treatment type. The particular treatment type includes routing the call to a destination associated with a call center.

Abstract: An integrated circuit (IC) includes a plurality of pads adapted to send or receive signals, and a plurality of mixed signal interface blocks, each of which is coupled to a corresponding pad in the plurality of pads. Furthermore, each mixed signal interface block in the plurality of mixed signal interface blocks is adapted to be configurable to provide selected functionality independently of the other mixed signal interface blocks.

Abstract: Protocol related data generated by a simulation application are captured. One or more protocol objects are displayed in a window on a display device based on the protocol related data. The protocol objects represent events associated with the interface protocol. In at least some embodiments, a location of the protocol objects on the display device is correlated to a simulation time. In at least some embodiments, protocol-related data are grouped according to an abstraction level of the interface protocol, and the protocol objects are displayed on the display device based on grouping. The protocol objects displayed on the display device can be associated with concurrent, interleaved protocol events, or both.

Abstract: In one embodiment, the present invention includes a method for receiving a non-coherent atomic request from a device coupled to an agent via a non-coherent link, accessing a mapping table of the agent to convert the non-coherent atomic request into a coherent atomic request, and transmitting the coherent atomic request via a coherent link to a second agent coupled to the agent to cause the second agent to be a completer of the non-coherent atomic request. Other embodiments are described and claimed.

Abstract: Whether or not allocation to router control is used up is determined. Whether or not CPU utilization allocated to the router control is used up is determined. If it is determined that the allocation for router control is used up, a sub-allocation changing process is executed for changing the CPU utilization. If it is determined that the allocation for router control is not used up, a router control allocation subtracting process is executed.

Abstract: A detection method of low frequency handshaking signal is described. The method includes the following steps of: (a) performing first impedance calibration when host device is activated for sending a first low frequency signal based on the first impedance calibration and performing a second impedance calibration when a controlled device is activated for sending a second low frequency signal based on the second impedance calibration; (b) transmitting a first high frequency training signal from the host device to the second receiver of the controlled device when the first low frequency signal and the second low frequency signal are in a predetermined condition; and (c) transmitting a second high frequency training signal from the controlled device to the first receiver of the host device wherein the frequency of the first low frequency signal and the second low frequency signal is smaller than the frequency of the first high frequency training signal and the second high frequency training signal.

Abstract: A print relay system includes a confirmation unit configured to check, in response to reception of a print instruction from a user apparatus, whether print information associated with second printer information that corresponds to a user who operates the user apparatus, of the second printer information included in printer management information, has been received from the print service, or whether a print job has been generated based on the print information. The print relay system further includes a transmission unit configured to transmit, in response to the confirmation unit confirming that the print job has been generated based on the print information associated with the second printer information that corresponds to the user, information including location information of the print job via the user apparatus to the image forming apparatus that executes the generated print job.

Abstract: A real-time traffic management system comprising a main light controller module configured to monitor and control functionality of one or more traffic lights, a master control unit server software application, a network operations control module, and a network watcher application program. The main light controller module communicates with one or more coordinating light controller modules, onsite personnel, and a network operations center. The main light controller uses a camera that detects instances of vehicle demand and provides live images for situational awareness. The main light controller module comprises a global positioning satellite receiver and a light sensor for monitoring ambient lighting conditions. The network watcher application program continuously scans incoming data, monitors performance of all components in the system, and issues alerts and alarms to notify personnel of events or conditions outside of established tolerances.

Abstract: A baseboard management controller (BMC) of a server includes a general purpose input output (GPIO) pin. An voltage level of the GPIO level determines if a BIOS of the server or the BMC uses a serial port of the server. If the BMC wants to use the serial port and the voltage level of the GPIO pin is at a high level, the serial port can be used by the BMC. If the BMC wants to use the serial port but the voltage level of the GPIO pin is not at the high level, the serial port is be used by the BIOS. If the BIOS has been initialized, the voltage level of the GPIO pin is pulled up.

Abstract: An expander including an IN port, an OUT port and expander logic circuitry. A bypass path is provided to bypass the expander logic circuitry when power to the expander is off.

Abstract: A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.