Abstract: An integrated circuit and a method of making the same. The integrated circuit includes a capacitive gas sensor on a semiconductor substrate. The gas sensor includes first and second capacitor electrodes on the substrate. The gas sensor also includes a gas sensitive material having a dielectric constant that is sensitive to a gas to be detected. The gas sensitive material at least partially surrounds the capacitor electrodes and extends between the capacitor electrodes and the substrate.

Abstract: An image sensor includes an objective lens arranged on an optical axis; a substrate including a plurality of photoelectric conversion devices; and a micro lens layer including a plurality of micro lenses corresponding to each of the plurality of photoelectric conversion devices, respectively, wherein the plurality of micro lenses includes a central micro lens corresponding to a central portion of the objective lens, and an edge micro lens corresponding to an edge portion of the objective lens, and the plurality of micro lenses are configured such that focal lengths of the micro lenses increase from the central micro lens toward the edge micro lens.

Abstract: An embodiment of the invention provides a chip package which includes: a first chip; a second chip disposed on the first chip; a hole extending from a surface of the first chip towards the second chip; a conducting layer disposed on the surface of the first chip and extending into the hole and electrically connected to a conducting region or a doped region in the first chip; and a support bulk disposed between the first chip and the second chip, wherein the support bulk substantially and/or completely covers a bottom of the hole.

Abstract: A solid state energy conversion device and method of making is disclosed for converting energy between electromagnetic and electrical energy. The solid state energy conversion device comprises a wide bandgap semiconductor material having a first doped region. A thermal energy beam is directed onto the first doped region of the wide bandgap semiconductor material in the presence of a doping gas for converting a portion of the first doped region into a second doped region in the wide bandgap semiconductor material. In one embodiment, the solid state energy conversion device operates as a light emitting device. In another embodiment, the solid state energy conversion device operates as a photovoltaic device.

Abstract: In accordance with the disclosure, a MEMS substrate is provided that includes: a central planar portion configured to support a MEMS device; and a first electrical pad coplanar with the central planar portion, the first pad being connected to the central planar portion through a first flexure, wherein the first flexure is configured to substantially mechanically isolate the first electrical pad from the central planar portion.

Abstract: The invention provides combination semiconductor and plasma devices, including transistors and phototransistors. A preferred embodiment hybrid plasma semiconductor device has active solid state semiconductor regions; and a plasma generated in proximity to the active solid state semiconductor regions. Devices of the invention are referred to as hybrid plasma-semiconductor devices, in which a plasma, preferably a microplasma, cooperates with conventional solid state semiconductor device regions to influence or perform a semiconducting function, such as that provided by a transistor. The invention provides a family of hybrid plasma electronic/photonic devices having properties previously unavailable. In transistor devices of the invention, a low temperature, glow discharge is integral to the hybrid transistor. Example preferred devices include hybrid BJT and MOSFET devices.

Abstract: An optical sensor that is a transistor which includes a gate electrode including a semiconductor material where the carrier concentration is 1.0×1014/cm3 to 1.0×1017/cm3, an active layer including a semiconductor layer to form a channel by carriers of the same type as the gate electrode, a source electrode, a drain electrode, and a gate insulating film, wherein intensity of irradiated light is detected by a change in a value of current flowing between the source electrode and the drain electrode when the light is irradiated onto a depletion layer formed in the gate electrode; an optical sensor array, an optical sensor driving method, and an optical sensor array driving method are provided.

Abstract: An acceleration sensor is formed using an etched layer sandwiched between first and second substrates. In this case, a structure including a movable portion which is displaceable in the thickness direction of the substrates, and a support frame are formed in the etched layer. In addition, first and second fixed electrodes are formed on the first and second substrates, respectively, at a position facing the movable portion. Further, a remaining sacrificial layer is provided on the substrate by leaving a portion of a second sacrificial layer when a first sacrificial layer is entirely etched away. Therefore, when the first sacrificial layer is etched away, corrosion of the structure and the support beams is prevented because the second sacrificial layer is preferentially corroded as compared to the structure.

Abstract: Gas sensor materials and methods are disclosed for preparing and using the same to produce gas sensor structures. Also disclosed are gas sensor structures and systems that employ these disclosed materials. A gas sense-enhancing metal such as platinum may be added to a gas sensitive metal oxide material in a manner that more highly disperses the added platinum than conventional methods so as to more effectively utilize the platinum at a lower concentration, thus achieving a more cost effective solution. An ink vehicle may also be used for deposition of a gas sensitive material (e.g. on the surface of integrated circuit) that is formulated to allow “burn-out” of ink vehicle components at relatively low temperatures as compared to conventional ink vehicles.

Abstract: A photoelectric conversion device provided with an electron transport layer having an excellent electron transport ability and having an excellent photoelectric conversion efficiency, and electronic equipment provided with such a photoelectric conversion device and having a high reliability are provided. A solar cell, to which the photoelectric conversion device is applied, has a first electrode provided on a substrate, a second electrode arranged opposite to the first electrode and retained on a facing substrate, an electron transport layer provided between these electrodes and positioned on the side of the first electrode, a dye layer being in contact with the electron transport layer, and an electrolyte layer provided between the electron transport layer and the second electrode and being in contact with the dye layer. The electron transport layer is constituted of a monocrystalline material of multiple oxide as a main component thereof.

Abstract: A micro-electrochemical sensor contains magnetic compounds inserted within a substrate that exert a magnetic force of attraction on paramagnetic beads held in contact with an electrode. The magnetic compounds can be contained within a fluid that is introduced into a void in the substrate. The electrode can be spaced apart from the magnetic compounds by a dielectric multi-layer membrane. During the fabrication process, different layers within the membrane-electrode structure can be tuned to have compressive or tensile stress so as to maintain structural integrity of the membrane, which is thin compared with the size of the void beneath it. During a process of forming the structure of the sensor, the tensile stress in a TiW adhesion layer can be adjusted to offset a composite net compressive stress associated with the dielectric layers of the membrane. The membrane can also be used in forming both the electrode and the void.

Abstract: A method of providing microelectromechanical structures (MEMS) that are compatible with silicon CMOS electronics is provided. The method providing for processes and manufacturing sequences limiting the maximum exposure of an integrated circuit upon which the MEMS is manufactured to below 350° C., and potentially to below 250° C., thereby allowing direct manufacturing of the MEMS devices onto electronics, such as Si CMOS circuits. The method further providing for the provisioning of MEMS devices with multiple non-conductive structural layers such as silicon carbide separated with small lateral gaps. Such silicon carbide structures offering enhanced material properties, increased environmental and chemical resilience whilst also allowing novel designs to be implemented taking advantage of the non-conductive material of the structural layer.

Abstract: A nonvolatile magnetic memory device having a magnetoresistance-effect element includes: (A) a laminated structure having a recording layer in which an axis of easy magnetization is oriented in a perpendicular direction; (B) a first wiring line electrically connected to a lower part of the laminated structure; and (C) a second wiring line electrically connected to an upper part of the laminated structure, wherein a high Young's modulus region having a Young's modulus of a higher value than that of a Young's modulus of a material forming the recording layer is provided close to a side surface of the laminated structure.

Abstract: There is provided a switching element which facilitates integration with higher density and lamination in a device, the switching element including: an insulating substrate; a first electrode provided on the insulating substrate; a second electrode provided above the first electrode; and a between-electrode gap section provided between the first electrode and the second electrode and including a nanometer-scale gap for causing a switching phenomenon of a resistor by applying a prescribed voltage between the first electrode and the second electrode.

Abstract: The present invention is a solar cell 500 comprising the substrate 510 made of a crystalline semiconductor, an i-type semiconductor layer 520a and an i-type semiconductor layer 520b each made of an amorphous semiconductor, and a first-conductivity type semiconductor layer 530 and a second-conductivity type semiconductor layer 540 each made of an amorphous semiconductor, in which by catalytic chemical vapor deposition in which catalyzers decompose raw gas when being heated by receiving an electric current, the i-type semiconductor layer 520a is formed on the principle plane 515a by the catalyzer placed at the position facing the principle plane 515a, the i-type semiconductor layer 520b is formed on the principle plane 515b by the catalyzer placed at the position facing the principle plane 515b are formed on the i-type semiconductor layer 520a and the i-type semiconductor layer 520b on the substrate 510.

Abstract: The present disclosure utilizes the MEMS (Micro Electro Mechanical Systems) process and packaging method to produce a microsystem for analyzing blood which is capable of detecting several kinds of ions. The microsystem for analyzing blood has a miniaturized reference electrode, so size of the microsystem can be greatly reduced. The microsystem further has a gate detecting area larger than a conventional planar ISE or a conventional ISFET does, so interference with signals can be avoided, and packaging difficulty and blood leakage can be reduced. Therefore, the microsystem is thin and small, reacts rapidly, and has a high accuracy, and a high compatibility with IC (integrated circuit) process. In addition, the microsystem has high stability of long-term potential, low offset-potential characteristics, low alternating current impedance, high stability of dynamic reference potential, low electrochemical noises and high reproducibility of the electrode.

Abstract: A computer implemented method for performing a user-defined function in a computer system, performed by the computer system that is programmed to perform the method includes determining by a display a display position in response to a change and a rate change in state of a user-controlled user input device, determining by a physical sensor a magnitude of change in sensed physical in response to the rate of change in the state, determining whether the magnitude of change exceeds a threshold level, determining a function to perform in response to display position when magnitude of change in sensed physical properties exceeds the threshold level, initiating performance of the function in response to the function, and inhibiting performance of the function when the magnitude of change in sensed physical properties does not exceed the threshold level.

Abstract: An electronic device manufacturing process includes depositing a bottom electrode layer. Then an electronic device is fabricated on the bottom electrode layer. Patterning of the bottom electrode layer is performed after fabricating the electronic device and in a separate process from patterning a top electrode. A first dielectric layer is then deposited on the electronic device and the bottom electrode layer followed by a top electrode layer. The top electrode is then patterned in a separate process from the bottom electrode. Separately patterning the top and bottom electrodes improves yields by reducing voids in the dielectric material between electronic devices. One electronic device the manufacturing process is well-suited for is magnetic tunnel junctions (MTJs).

Abstract: A suspended beam includes a substrate, a main body and a first metal line structure. A first end of the main body is fixed onto the substrate. A second end of the main body is suspended. The first metal line structure is embedded in the main body. The width of the first metal line structure is smaller than the width of the main body.

Abstract: A process of forming a MEMS device with a device cavity underlapping an overlying dielectric layer stack having an etchable sublayer over an etch-resistant lower portion, including: etching through at least the etchable sublayer of the overlying dielectric layer stack in an access hole to expose a lateral face of the etchable sublayer, covering exposed surfaces of the etchable sublayer by protective material, and subsequently performing a cavity etch. A cavity etch mask may cover the exposed surfaces of the etchable sublayer. Alternatively, protective sidewalls may be formed by an etchback process to cover the exposed surfaces of the etchable sublayer. Alternatively, the exposed lateral face of the etchable sublayer may be recessed by an isotropic etch, than isolated by a reflow operation which causes edges of an access hole etch mask to drop and cover the exposed lateral face of the etchable sublayer.

Abstract: Systems and methods for molecular sensing are described. Molecular sensors are described which are based on field-effect or bipolar junction transistors. These transistors have a nanopillar with a functionalized layer contacted to either the base or the gate electrode. The functional layer can bind molecules, which causes an electrical signal in the sensor.

Abstract: A device having an integrated noise shield is disclosed. The device includes a plurality of vertical shielding structures substantially surrounding a semiconductor device. The device further includes an opening above the semiconductor device substantially filled with a conductive fluid, wherein the plurality of vertical shielding structures and the conductive fluid shield the semiconductor device from ambient radiation. In some embodiments, the device further includes a conductive bottom shield below the semiconductor device shielding the semiconductor device from ambient radiation. In some embodiments, the opening is configured to allow a biological sample to be introduced into the semiconductor device. In some embodiments, the vertical shielding structures comprise a plurality of vias, wherein each of the plurality of vias connects more than one conductive layers together.

Abstract: A sensor includes a collector, an emitter and a base-region barrier formed as an inverted bipolar junction transistor having a base substrate forming a base electrode to activate the inverted bipolar junction transistor. A level surface is formed by the collector, the emitter and the base-region barrier opposite the base substrate such that when the level surface is exposed to charge, the charge is measured during operation of the bipolar junction transistor.

Abstract: Embodiments of the present invention provide an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a back side of the semiconductor die and having electrical components embodied therein, wherein the electrical components include at least one discrete passive component. The integrated circuit system also includes at least one electrical path coupling the first active layer and the second pre-fabricated layer.

Abstract: Disclosed herein is an apparatus comprising a metal shunt and a planar semiconductor material in electrical contact with the metal shunt, the metal shunt located on a surface of the semiconductor material, thereby defining a semiconductor/metal interface for passing a flow of current between the semiconductor material and the metal shunt in response to an application of an electrical bias to the apparatus, wherein a portion of that semiconductor material surface is not covered by the metal shunt, wherein the semiconductor material and the metal shunt lie in different planes that are substantially parallel planes, the semiconductor/metal interface thereby being parallel to the plane of semiconductor material, and wherein, when under the electrical bias, the semiconductor/metal interface is configured to exhibit a change in resistance thereof in response to a perturbation. Such an apparatus can be used as a sensor and deployed as an array of sensors.

Abstract: An integrated multi-axis mechanical device and integrated circuit system. The integrated system can include a silicon substrate layer, a CMOS device region, four or more mechanical devices, and a wafer level packaging (WLP) layer. The CMOS layer can form an interface region, on which any number of CMOS and mechanical devices can be configured. The mechanical devices can include MEMS devices configured for multiple axes or for at least a first direction. The CMOS layer can be deposited on the silicon substrate and can include any number of metal layers and can be provided on any type of design rule. The integrated MEMS devices can include, but not exclusively, any combination of the following types of sensors: magnetic, pressure, humidity, temperature, chemical, biological, or inertial. Furthermore, the overlying WLP layer can be configured to hermetically seal any number of these integrated devices.

Abstract: A semiconductor package having a mechanical fuse therein and methods to form a semiconductor package having a mechanical fuse therein are described. For example, a semiconductor structure includes a semiconductor package. A semiconductor die is housed in the semiconductor package. A microelectromechanical system (MEMS) device is housed in the semiconductor package. The MEMS device has a suspended portion. A mechanical fuse is housed in the semiconductor package and either coupled to, or decoupled from, the suspended portion of the MEMS device.

Abstract: Disclosed herein are MEMS resonator device designs and fabrication techniques that provide protection against electrostatic charge imbalances. In one aspect, a MEMS resonator device includes a substrate, an electrode including a first microstructure supported by the substrate, a resonant element including a second microstructure spaced from the first microstructure by a gap for resonant displacement of the second microstructure within the gap during operation, and a disabled shunt coupled to the electrode or the resonant element. The disabled shunt is disabled to enable the resonant displacement but otherwise configured to protect against damage from an electrostatic charge imbalance before the operation of the MEMS resonator device.

Abstract: A flexible substrate for a display device comprises a polymer resin, an inorganic fiber material, and an antistatic agent, and has a surface resistivity of less than 1011?. A display device includes the flexible substrate.

Abstract: A Topological INsulator-based field-effect transistor (TINFET) is disclosed. The TINFET includes a first and second gate dielectric layers separated by a topological insulator (TI) layer. A first gate contact is connected to the first gate dielectric layer on the surface that is opposite the TI layer. A second gate contact may be connected to the second gate dielectric layer on the surface that is opposite the TI layer. A first TI surface contact is connected to one surface of the TI layer, and a second TI surface contact is connected to the second surface of the TI layer.

Abstract: Disclosed is a resin composition for a protective layer of a color filter including an acrylate-based resin including a repeating unit represented by each of Chemical Formulae 1 to 3, a melamine-based resin represented by Chemical Formula 4, a thermal acid generator (TAG), and a solvent.

Abstract: A nano-oscillator magnetic wave propagation system has a group of aggregated spin-torque nano-oscillators (ASTNOs), which share a magnetic propagation material. Each of the group of ASTNOs is disposed about an emanating point in the magnetic propagation material. During a non-wave propagation state of the nano-oscillator magnetic wave propagation system, the magnetic propagation material receives a polarizing magnetic field. During a wave propagation state of the nano-oscillator magnetic wave propagation system, each of the group of ASTNOs initiates spin waves through the magnetic propagation material, such that a portion of the spin waves initiated from each of the group of ASTNOs combine to produce an aggregation of spin waves emanating from the emanating point. The aggregation of spin waves may provide a sharper wave front than wave fronts of the individual spin waves initiated from each of the group of ASTNOs.

Abstract: It is an object of the present invention to manufacture a micromachine having a plurality of structural bodies with different functions and to shorten the time required for sacrifice layer etching in a process of manufacturing the micromachine. Another object of the present invention is to prevent a structural layer from being attached to a substrate after the sacrifice layer etching. In other words, an object of the present invention is to provide an inexpensive and high-value-added micromachine by improving throughput and yield. The sacrifice layer etching is conducted in multiple steps. In the multiple steps of the sacrifice layer etching, a part of the sacrifice layer that does not overlap with the structural layer is removed by the earlier sacrifice layer etching and a part of the sacrifice layer that is under the structural layer is removed by the later sacrifice layer etching.

Abstract: A domain wall motion type MRAM has: a magnetic recording layer 10 being a ferromagnetic layer having perpendicular magnetic anisotropy; a pair of current supply terminals 14a and 14b connected to the magnetic recording layer 10 for supplying a current to the magnetic recording layer 10; and an anti-ferromagnetic layer 45 being in contact with a first region R1 of the magnetic recording layer 10. The first region R1 includes a part of a current supply region RA of the magnetic recording layer 10 that is between the pair of current supply terminals 14a and 14b.

Abstract: There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a MEMS device, and technique of fabricating or manufacturing a MEMS device, having mechanical structures encapsulated in a chamber prior to final packaging. The material that encapsulates the mechanical structures, when deposited, includes one or more of the following attributes: low tensile stress, good step coverage, maintains its integrity when subjected to subsequent processing, does not significantly and/or adversely impact the performance characteristics of the mechanical structures in the chamber (if coated with the material during deposition), and/or facilitates integration with high-performance integrated circuits. In one embodiment, the material that encapsulates the mechanical structures is, for example, silicon (polycrystalline, amorphous or porous, whether doped or undoped), silicon carbide, silicon-germanium, germanium, or gallium-arsenide.

Abstract: A top port MEMS package includes a substrate and an interposer mounted to the substrate. The interposer includes an interposer aperture and an interposer channel fluidly coupled to the interposer aperture. A MEMS electronic component is mounted to the interposer above the interposer aperture. A top port lid includes a top port and a chimney structure fluidly coupling to the top port to the interposer channel. A front volume including the top port, the flue, the interposer channel, and the interposer aperture is acoustically sealed from a relatively large back volume defined by a lid cavity of the top port lid. By acoustically sealing the front volume from the back volume and further by maximizing the back volume, the noise to signal ratio is minimized thus maximizing the sensitivity of top port MEMS microphone package as well as the range of applications.

Abstract: Disclosed herein is a solid-state image pickup device of a type wherein a pixel is configured to include a sensor unit capable of photoelectric conversion, the image pickup device including: a semiconductor substrate; a charge storage region of a first conduction type, which is formed in the semiconductor substrate and constitutes a sensor unit; a charge storage sub-region made of an impurity region of the first conduction type, which is formed, in plural layers, in the semiconductor substrate below the charge storage region serving as a main charge storage region and wherein at least one or more of the plural layers are formed entirely across a pixel; and a device isolation region that is formed in the semiconductor substrate, isolates pixels from one another, and is made of an impurity region of a second conduction type.

Abstract: Embodiments of the invention integrate carbon nanotubes on a CMOS substrate using localized heating. An embodiment can allow the CMOS substrate to be in a room-temperature environment during the carbon nanotube growth process. Specific embodiments utilize a maskless post-CMOS microelectromechanical systems (MEMS) process. The post-CMOS MEMS process according to an embodiment of the present invention provides a carbon nanotube growth process that is foundry CMOS compatible. The maskless process, according to an embodiment, eliminates the need for photomasks after the CMOS fabrication and can preserve whatever feature sizes are available in the foundry CMOS process. Embodiments integrate single-walled carbon nanotube devices into a CMOS platform.

Abstract: Disclosed is an integrated circuit comprising a substrate (10) carrying plurality of circuit elements (20); a plurality of sensing electrodes (34) over said substrate, each sensing electrode being electrically connected to at least one of said circuit elements; and a plurality of wells (50) for receiving a sample, each sensing electrode defining the bottom of one of said wells, wherein each sensing electrode comprises at least one portion (34?) extending upwardly into said well. A method of manufacturing such an IC is also disclosed.

Abstract: Disclosed is an integrated circuit comprising a substrate (10) carrying plurality of circuit elements (20); a metallization stack (30) over said substrate for providing interconnections to at least some of said circuit elements, the metallization stack comprising a plurality of patterned metal layers (31) spatially separated from each other by respective electrically insulating layers (32), at least some of said electrically insulating layers comprising conductive portions (33) that electrically interconnect portions of adjacent metal layers, wherein at least one of the patterned metallization layers comprises a plurality of ion-sensitive electrodes (34), each ion-sensitive electrode being electrically connected to at least one of said circuit elements, a plurality of sample volumes (50) extending into said metallization stack, each sample volume terminating at one of said ion-sensitive electrodes; and an ion-sensitive layer lining at least the ion-sensitive electrodes in said sample volumes.

Abstract: A method for producing a photosensitive integrated circuit including producing circuit control transistors, producing, above the control transistors, and between at least one upper electrode and at least one lower electrode, at least one photodiode, by amorphous silicon layers into which photons from incident electromagnetic radiation are absorbed, producing at least one passivation layer, between the lower electrode and the control transistors, and producing, between the control transistors and the external surface of the integrated circuit, a reflective layer capable of reflecting photons not absorbed by the amorphous silicon layers.

Abstract: A MEMS device (20) includes a proof mass (32) coupled to and surrounding an immovable structure (30). The immovable structure (30) includes fixed fingers (36, 38) extending outwardly from a body (34) of the structure (30). The proof mass (32) includes movable fingers (60), each of which is disposed between a pair (62) of the fixed fingers (36, 38). A central area (42) of the body (34) is coupled to an underlying substrate (24), with the remainder of the immovable structure (30) and the proof mass (32) being suspended above the substrate (24) to largely isolate the MEMS device (20) from package stress, Additionally, the MEMS device (20) includes isolation trenches (80) and interconnects (46, 50, 64) so that the fixed fingers (36), the fixed fingers (38), and the movable fingers (60) are electrically isolated from one another to yield a differential device configuration.

Abstract: The transparent photodetector includes a substrate; a waveguide on the substrate; a displaceable structure that can be displaced with respect to the substrate, the displaceable structure in proximity to the waveguide; and a silicon nanowire array suspended with respect to the substrate and mechanically linked to the displaceable structure, the silicon nanowire array comprising a plurality of silicon nanowires having piezoresistance. In operation, a light source propagating through the waveguide results in an optical force on the displaceable structure which further results in a strain on the nanowires to cause a change in electrical resistance of the nanowires. The substrate may be a semiconductor on insulator substrate.

Abstract: Embodiments of the present disclosure provide an apparatus including a semiconductor die having a plurality of integrated circuit devices, a pad structure electrically coupled to at least one integrated circuit device of the plurality of integrated circuit devices via an interconnect layer, an electrically insulative layer disposed on the interconnect layer, a first shielding structure disposed in the electrically insulative layer and electrically coupled to the pad structure, an under-ball metallization (UBM) structure electrically coupled to the first shielding structure, and a solder bump electrically coupled to the UBM structure, the solder bump comprising a solder bump material capable of emitting alpha particles, wherein the first shielding structure is positioned between the solder bump and the plurality of integrated circuit devices to shield the plurality of integrated circuit devices from the alpha particles. Other embodiments may be described and/or claimed.

Abstract: A micromechanical system having at least one micromechanical device, in particular a sensor device and/or an actuator device, the micromechanical system having a substrate on which at least one micromechanical device is provided, the micromechanical device having at least one structured or unstructured film adhesive on at least one side.

Abstract: A sensor module and semiconductor chip. One embodiment provides a carrier. A semiconductor chip includes a first recess and a second recess and a main surface of the semiconductor chip. The semiconductor chip is mounted to the carrier such that the first recess forms a first cavity with the carrier and the second recess forms a second cavity with the carrier. The first cavity is in fluid connection with the second cavity.

Abstract: A semiconductor gas sensor is provided that includes a semiconductor body with a passivation layer formed on a surface of thereof. A gas-sensitive control electrode is separated from a channel region by a gap or a control electrode is arranged as a first plate of a capacitor with a gap and a second plate of the capacitor is connected to a gate of the field effect transistor implemented as a Capacitively Controlled Field Effect Transistor. The control electrode has is connected to a reference voltage. A support area is provided with a first support structure and a second support structure. A contact area is provided on the surface of the semiconductor body. A first contact region has a frictional connection and an electrical connection with the control electrode and the second contact region has at least a frictional connection with the control electrode.

Abstract: A CMOS (Complementary Metal Oxide Semiconductor) pixel for sensing at least one selected from a biological, chemical, ionic, electrical, mechanical and magnetic stimulus. The CMOS pixel includes a substrate including a backside, a source coupled with the substrate to generate a background current, and a detection element electrically coupled to measure the background current. The stimulus, which is to be provided to the backside, affects a measurable change in the background current.

Abstract: A sensor for detecting intensity of radiation such as of infrared radiation includes an ROIC substrate (9) and a resistance element (1) arranged at a distance of the surface of the ROIC substrate. The resistance element comprises one more semiconducting layers such as a silicon semiconducting layer and a semiconducting layer of a silicon-germanium alloy forming a heterojunction. The semiconducting layer or layers can be doped with one or more impurity dopants, the doping level or levels selected so that the layer retains the basic crystallographic properties of the respective material such as those of monosilicon or a monocrystalline silicon-germanium alloy. The impurity dopants are selected from the elements in groups IE, IV, and V, in particular among boron, aluminium, indium, arsenic, phosphorous, antimony, germanium, carbon and tin. The doping can be abrupt so that there is an interior layer inside said semiconducting layer or layers having a significantly higher doping level.

Abstract: There is employed a lamination structure of semiconductor substrate in which light receiving part having a photoelectric converting function is formed in an inner portion, and insulating films and wirings. There are provided a wiring layer formed above semiconductor substrate and having a concave portion formed in a place corresponding to a portion disposed above light receiving part, second insulating film having a higher refractive index than insulating films and covering a side surface of the wiring layer facing the concave portion, third insulating film having a lower refractive index than second insulating film and covering the side surface of second insulating film, and fourth insulating film having a higher refractive index than third insulating film and covering the side surface of third insulating film.