Responsive To Non-electrical Signal (e.g., Chemical, Stress, Light, Or Magnetic Field Sensors) Patents (Class 257/414)
  • Patent number: 8581306
    Abstract: A nanoscale electron shuttle with two elastically mounted conductors positioned within a gap between conductors produces asymmetrical electron conduction between the conductors when the conductors receive an AC signal to provide for rectification, detection and/or power harvesting.
    Type: Grant
    Filed: February 18, 2013
    Date of Patent: November 12, 2013
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Robert H. Blick, Chulki Kim, Jonghoo Park
  • Patent number: 8574945
    Abstract: An embodiment of an array of Geiger-mode avalanche photodiodes, wherein each photodiode is formed by a body of semiconductor material, having a first conductivity type, housing a first cathode region, of the second conductivity type, and facing a surface of the body, an anode region, having the first conductivity type and a higher doping level than the body, extending inside the body, and facing the surface laterally to the first cathode region and at a distance therefrom, and an insulation region extending through the body and insulating an active area from the rest of the body, the active area housing the first cathode region and the anode region. The insulation region is formed by a mirror region of metal material, a channel-stopper region having the second conductivity type, surrounding the mirror region, and a coating region, of dielectric material, arranged between the mirror region and the channel-stopper region.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: November 5, 2013
    Assignee: STMicroelectronics S.r.l.
    Inventors: Delfo Nunziato Sanfilippo, Emilio Antonio Sciacca, Piero Giorgio Fallica, Salvatore Antonio Lombardo
  • Patent number: 8575710
    Abstract: A capacitive semiconductor pressure sensor, comprising: a bulk region of semiconductor material; a buried cavity overlying a first part of the bulk region; and a membrane suspended above said buried cavity, wherein, said bulk region and said membrane are formed in a monolithic substrate, and in that said monolithic substrate carries structures for transducing the deflection of said membrane into electrical signals, wherein said bulk region and said membrane form electrodes of a capacitive sensing element, and said transducer structures comprise contact structures in electrical contact with said membrane and with said bulk region.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: November 5, 2013
    Assignee: STMicroelectronics S.r.l.
    Inventors: Flavio Francesco Villa, Gabriele Barlocchi, Pietro Corona, Benedetto Vigna, Lorenzo Baldo
  • Patent number: 8569849
    Abstract: A semiconductor device and a method of manufacture are provided, such as a MTJ device and a method of manufacturing a MTJ device. The MTJ device may include a bottom electrode, a MTJ stack, and a top electrode, wherein the top electrode is formed using a hole-filling technique. The top electrode may have slanted sidewalls. The MTJ stack may be formed by depositing corresponding MTJ layers. A patterned mask may be formed and patterned over the MTJ layers to form an opening defining the top electrode. The opening is filled with a conductive material to form the top electrode. The top electrode is then used as a mask to pattern the MTJ layers, thereby forming a MTJ stack.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: October 29, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Hang Huang, Shih-Chang Liu, Chern-Yow Hsu, Fu-Ting Sung, Chia-Shiung Tsai
  • Patent number: 8569848
    Abstract: Disclosed are methods and devices in which certain types of nanotubes (e.g., carbon nanotubes and boron nitride nanotubes conduct heat with high efficiency and are therefore useful in electronic-type devices.
    Type: Grant
    Filed: July 20, 2009
    Date of Patent: October 29, 2013
    Assignee: The Regents of the University of California
    Inventors: Chih-Wei Chang, Alexander K. Zettl
  • Patent number: 8569615
    Abstract: Provided are solar cells and methods of forming the same. The solar cell includes an anti-reflection layer on a substrate, a first electrode on the anti-reflection layer, a photo-electro conversion layer on the first electrode, and a second electrode on the photo-electro conversion layer.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: October 29, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Mi Hee Jung, Mangu Kang
  • Patent number: 8569809
    Abstract: Sensor cells are arranged in an array in an organic semiconductor layer. Row and column select circuitry addresses the cells of the array one cell at a time to determine the presence of an object, such as a fingerprint ridge or valley, contacting or proximate to a sensing surface above each cell. Control circuitry can be provided in a companion silicon chip or in a second layer of organic semiconductor material to communicate with the array and an associated system processor. The array of sensor cells can be fabricated using a flexible polymer substrate that is peeled off and disposed of after contacts have been patterned on the organic semiconductor layer. The organic semiconductor layer can be used with a superimposed reactive interface layer to detect specific chemical substances in a test medium.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: October 29, 2013
    Assignee: STMicroelectronics, Inc.
    Inventors: Danielle A. Thomas, Bruno J. Debeurre, Peter J. Thoma
  • Patent number: 8564075
    Abstract: An improved MEMS transducer apparatus and method. The apparatus has a movable base structure including an outer surface region and an inner surface region. At least one central anchor structure can be spatially disposed within a vicinity of the inner surface region and at least one peripheral anchor structure can be spatially disposed within a vicinity of the outer surface region. Additionally, the apparatus can have at least one peripheral spring structure. The peripheral spring structure(s) can be coupled to the peripheral anchor structure(s) and at least one portion of the outer surface region. The apparatus can also have at least one central spring structure. The central spring structure(s) can be operably coupled to the central anchor structure(s) and at least one portion of the inner surface region.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: October 22, 2013
    Assignee: mCube Inc.
    Inventor: Daniel N. Koury, Jr.
  • Patent number: 8564076
    Abstract: A MEMS device is disclosed. The MEMS device comprises a MEMS substrate. The MEMS substrate includes a first semiconductor layer connected to a second semiconductor layer with a dielectric layer in between. MEMS structures are formed from the second semiconductor layer and include a plurality of first conductive pads. The MEMS device further includes a base substrate which includes a plurality of second conductive pads thereon. The second conductive pads are connected to the first conductive pads. Finally, the MEMS device includes a conductive connector formed through the dielectric layer of the MEMS substrate to provide electrical coupling between the first semiconductor layer and the second semiconductor layer. The base substrate is electrically connected to the second semiconductor layer and the first semiconductor layer.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: October 22, 2013
    Assignee: Invensense, Inc.
    Inventors: Kegang Huang, Jongwoo Shin, Martin Lim, Michael J. Daneman, Joseph Seeger
  • Patent number: 8558947
    Abstract: Disclosed herein is a solid-state image pickup element, including a plurality of pixels each having a photoelectric conversion portion for converting a quantity of incident light into an electric signal, and a plurality of pixel transistors; wiring layers formed on one surface side of a semiconductor substrate having the plurality of pixels formed therein, a light made incident from a side opposite to the one surface having the wiring layers formed thereon being received by corresponding one of the photoelectric conversion portions; a scribe line formed in a periphery of a pixel portion composed of the plurality of pixels; and square-shaped termination detecting portions each having higher hardness than that of the semiconductor substrate and formed in the scribe line; wherein each of the square-shaped termination detecting portions has a side parallel with a direction of the scribe line of the semiconductor substrate.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: October 15, 2013
    Assignee: Sony Corporation
    Inventors: Takayuki Enomoto, Keiichi Nakazawa
  • Patent number: 8558288
    Abstract: Methods and apparatus relating to very large scale FET arrays for analyte measurements. ChemFET (e.g., ISFET) arrays may be fabricated using conventional CMOS processing techniques based on improved FET pixel and array designs that increase measurement sensitivity and accuracy, and at the same time facilitate significantly small pixel sizes and dense arrays. Improved array control techniques provide for rapid data acquisition from large and dense arrays. Such arrays may be employed to detect a presence and/or concentration changes of various analyte types in a wide variety of chemical and/or biological processes. In one example, chemFET arrays facilitate DNA sequencing techniques based on monitoring changes in hydrogen ion concentration (pH), changes in other analyte concentration, and/or binding events associated with chemical processes relating to DNA synthesis.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: October 15, 2013
    Assignee: Life Technologies Corporation
    Inventors: Jonathan M. Rothberg, Wolfgang Hinz, Kim L. Johnson
  • Patent number: 8558335
    Abstract: A solid-state imaging device includes a photoelectric conversion unit that is formed on a semiconductor substrate, a reading unit that reads signal charges of the photoelectric conversion unit, a gate insulating film and an electrode disposed thereon that constitute the reading unit, a light shielding film that covers the electrode, and an antireflection film that is formed on the photoelectric conversion unit and is constituted by films of four or more layers. The film of the lower layer of the antireflection film is also used as a stopper film during patterning, and a gap between the end of the light shielding film and the semiconductor substrate which is defined by interposing a plurality of films of the lower layer of the antireflection film is set so as to be smaller than the thickness of the gate insulating film.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: October 15, 2013
    Assignee: Sony Corporation
    Inventor: Mitsuhiro Nagano
  • Patent number: 8558326
    Abstract: Semiconductor devices having integrated nanochannels confined by nanometer spaced electrodes, and VLSI (very large scale integration) planar fabrication methods for making the devices. A semiconductor device includes a bulk substrate and a first metal layer formed on the bulk substrate, wherein the first metal layer comprises a first electrode. A nanochannel is formed over the first metal layer, and extends in a longitudinal direction in parallel with a plane of the bulk substrate. A second metal layer is formed over the nanochannel, wherein the second metal layer comprises a second electrode. A top wall of the nanochannel is defined at least in part by a surface of the second electrode and a bottom wall of the nanochannel is defined by a surface of the first electrode.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: October 15, 2013
    Assignee: International Business Machines Corporation
    Inventors: Stefan Harrer, Stanislav Polonsky, Mark B. Ketchen, John A. Ott
  • Patent number: 8558327
    Abstract: A micromechanical component having a conductive substrate, a first conductive layer provided above the substrate and that forms, above a cavity provided in the substrate, an elastically deflectable diaphragm region of monocrystalline silicon and an adjacent peripheral region, a circuit trace level provided above the first conductive layer in a manner that is electrically insulated from the first conductive layer, the circuit trace level having above the diaphragm region a first electrode region and having above the peripheral region a first connection region electrically connected to the same, and a second conductive layer that is provided above the circuit trace level, the second conductive layer having above the diaphragm region a second electrode region that is electrically insulated from the first electrode region, and having above the peripheral region a second connection region electrically insulated from the second electrode region and electrically connected to the first connection region.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: October 15, 2013
    Assignee: Robert Bosch GmbH
    Inventors: Kathrin Knese, Heribert Weber, Simon Armbruster
  • Patent number: 8558328
    Abstract: A semiconductor device suitable for use in a pressure sensor is disclosed. A uniformly thin die is provided by chemically etching a back side of a wafer. Piezoelectric elements formed integrally within the die generate electrical signals in response to flexing the die. Conductive leads formed integrally within the die electrically communicate the generated electrical signals to support circuitry formed integrally within the die proximate the piezoelectric elements. In an example embodiment, the piezoresistive elements take the form of silicon resistors formed integrally via doping and diffusion in a Wheatstone bridge configuration. In one application, the die serves as a deformable diaphragm, seated atop an aperture of a threaded pressure sensor housing.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: October 15, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Timothy John Legat, Alexander Noam Teutsch, Ross Elliot Teggatz, Thomas Richard Maher
  • Publication number: 20130264660
    Abstract: At least two separate single-crystal silicon layers are formed in a micromechanical substrate which has a diaphragm in a partial region. The diaphragm has a thickness of less than 20 ?m and includes part of a first of the single-crystal silicon layers. The substrate construction also includes a heating element configured to generate a temperature of more than 650° C. in at least part of the diaphragm. The substrate includes at least one diffusion barrier layer that reduces the oxidation of the first single-crystal silicon layer.
    Type: Application
    Filed: May 23, 2011
    Publication date: October 10, 2013
    Applicant: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Maximilian Fleischer, Oliver Freudenberg, Harry Hedler, Markus Schieber, Manfred Schreiner, Karl Weidner, Kerstin Wiesner, Jörg Zapf
  • Patent number: 8552519
    Abstract: In order to collect a plurality of semiconductor elements easily from a semiconductor module where a plurality of rod-like semiconductor elements for power generation or light emission are built in and to reuse or repair them, two split modules 61 are arranged in series in a containing case 62 in a semiconductor module 60. In each split module 61, power generating semiconductor elements 1 arranged in a matrix of a plurality of rows and columns, and a conductive connection mechanism for connecting the plurality of semiconductor elements 1 in each row in series and the plurality of semiconductor elements 1 in each column in parallel are molded with transparent synthetic resin, and a connection conductor 67 is allowed to project at the end. A conductive waved spring 70 and an external terminal 76 are provided on the end side of the containing case 62, and series connection of the two split modules 61 is ensured by mechanical pressing force of the conductive waved spring 70.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: October 8, 2013
    Assignee: Kyosemi Corporation
    Inventor: Josuke Nakata
  • Publication number: 20130256813
    Abstract: The semiconductor device has a sensor unit including a sensing part, and a semiconductor substrate. The semiconductor substrate is bonded to the sensor unit through an insulation film such that the sensing part is disposed in an air-tightly sealed chamber provided between a recessed portion of the semiconductor substrate and the sensor unit. A surface of the semiconductor substrate provided on a periphery of the recessed portion includes a boundary region at a perimeter of the recessed portion and a bonding region on a periphery of the boundary region. The bonding region has an area greater than an area of the boundary region. The bonding region of the semiconductor substrate is bonded to the sensor unit through the insulation film.
    Type: Application
    Filed: March 26, 2013
    Publication date: October 3, 2013
    Applicant: DENSO CORPORATION
    Inventor: Yumi MARUYAMA
  • Patent number: 8546170
    Abstract: A method of fabricating a micro-electrical-mechanical system (MEMS) transducer comprises the steps of forming a membrane (5) on a substrate (3), and forming a back-volume in the substrate. The step of forming a back-volume in the substrate comprises the steps of forming a first back-volume portion (7a) and a second back-volume portion (7b), the first back-volume portion (7a) being separated from the second back-volume portion (7b) by a step in a sidewall of the back-volume. The cross-sectional area of the second back-volume portion (7b) can be made greater than the cross-sectional area of the membrane (5), thereby enabling the back-volume to be increased without being constrained by the cross-sectional area of the membrane (5). The back-volume may comprise a third back-volume portion. The third back-volume portion enables the effective diameter of the membrane to be formed more accurately.
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: October 1, 2013
    Assignee: Wolfson Microelectronics plc
    Inventors: Anthony Bernard Traynor, Richard Ian Laming, Tsjerk Hans Hoekstra
  • Publication number: 20130249022
    Abstract: A double-sided diaphragm micro gas-preconcentrator has a micro-gas chamber which is formed by bonding an upper silicon substrate with a lower silicon substrate. One or more suspended membranes are provided on every silicon substrate. The silicon where the suspended membrane is provided is completely removed for forming a cavity. A thin-film heater is deposited on every suspended membrane. A sorptive film is coated on an inner wall of every suspended membrane. Thus, the upper and lower sides of the preconcentrator in the present invention are suspended membranes, which improve the area of the sorptive film on the diaphragm. As a result, the preconcentrating factor is improved while keeping the small heat capacity, fast heating rate, and low power consumption features of the planar diaphragm preconcentrator.
    Type: Application
    Filed: August 9, 2012
    Publication date: September 26, 2013
    Inventors: Xiaosong Du, Ze Wu, Yi Li, Yadong Jiang, Dong Qiu
  • Patent number: 8541850
    Abstract: In accordance with one embodiment of the present disclosure, a semiconductor substrate includes complementary metal-oxide-semiconductor (CMOS) circuitry disposed outwardly from the semiconductor substrate. An electrode is disposed outwardly from the CMOS circuitry. The electrode is electrically coupled to the CMOS circuitry. A resonator is disposed outwardly from the electrode. The resonator is operable to oscillate at a resonance frequency in response to an electrostatic field propagated, at least in part, by the electrode.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: September 24, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Arun K. Gupta, Lance W. Barron, William C. McDonald
  • Patent number: 8541849
    Abstract: A device having an integrated noise shield is disclosed. The device includes a plurality of vertical shielding structures substantially surrounding a semiconductor device. The device further includes an opening above the semiconductor device substantially filled with a conductive fluid, wherein the plurality of vertical shielding structures and the conductive fluid shield the semiconductor device from ambient radiation. In some embodiments, the device further includes a conductive bottom shield below the semiconductor device shielding the semiconductor device from ambient radiation. In some embodiments, the opening is configured to allow a biological sample to be introduced into the semiconductor device. In some embodiments, the vertical shielding structures comprise a plurality of vias, wherein each of the plurality of vias connects more than one conductive layers together.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: September 24, 2013
    Assignee: Genia Technologies, Inc.
    Inventor: Roger Chen
  • Patent number: 8536626
    Abstract: A pH sensor is provided. The pH sensor comprises a substrate and an ion sensitive field effect transistor (ISFET) die comprising an ion sensing part that responds to pH, wherein the ISFET die is located over the substrate. The pH sensor also comprises a protective layer formed over at least a portion of an outer surface of the ISFET die and at least a portion of the substrate. Further, the pH sensor comprises a cover member mechanically coupled to the protective layer, wherein the cover member houses the ISFET die and the substrate, and wherein the cover member defines an opening proximate to the ion sensing part.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: September 17, 2013
    Assignee: Honeywell International Inc.
    Inventors: Gregory C. Brown, Curtis H. Rahn
  • Patent number: 8536673
    Abstract: Provided is a light receiving circuit for detecting a change in amount of light, in which an input circuit at a subsequent stage is compact and inexpensive and current consumption is low. The light receiving circuit includes: a photoelectric conversion element for supplying a current corresponding to an amount of incident light; an N-channel MOS transistor including a drain supplied with the current from the photoelectric conversion element; and a control circuit for controlling a gate voltage of the NMOS transistor via a low pass filter so that a drain voltage of the N-channel MOS transistor becomes a desired voltage.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: September 17, 2013
    Assignee: Seiko Instruments Inc.
    Inventors: Fumiyasu Utsunomiya, Taro Yamasaki, Isamu Fujii
  • Patent number: 8535967
    Abstract: A method for etching a diaphragm pressure sensor based on a hybrid anisotropic etching process. A substrate with an epitaxial etch stop layer can be etched utilizing an etching process in order to form a diaphragm at a selective portion of the substrate. The diaphragm can be oriented at an angle (e.g., 45 degree) with respect to the substrate in order to avoid an uncertain beveled portion in a stress/strain field of the diaphragm. The diaphragm can be further etched utilizing an etch finishing process to create an anisotropic edge portion on the major areas of the diaphragm and optimize the thickness and size of the diaphragm. Such an approach provides an enhanced diaphragm structure with respect to a wide range of pressure sensor applications.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: September 17, 2013
    Assignee: Honeywell International Inc.
    Inventor: Robert Higashi
  • Patent number: 8536662
    Abstract: A method is disclosed for manufacturing a semiconductor device, including providing a substrate comprising a main surface with a non flat topography, the surface comprising at least one substantial topography variation, forming a first capping layer over the main surface such that, during formation of the first capping layer, local defects in the first capping layer are introduced, the local defects being positioned at locations corresponding to the substantial topography variations and the local defects being suitable for allowing a predetermined fluid to pass through. Associated membrane layers, capping layers, and microelectronic devices are also disclosed.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: September 17, 2013
    Assignees: IMEC, Katholieke Universiteit Leuven, K.U. Leuven R&D
    Inventors: Ann Witvrouw, Luc Haspeslagh, Bin Guo, Simone Severi, Gert Claes
  • Patent number: 8536663
    Abstract: A metal mesh lid MEMS package includes a substrate, a MEMS electronic component coupled to the substrate, and a metal mesh lid coupled to the substrate with a lid adhesive. The metal mesh lid includes a polymeric lid body having a top port formed therein and a metal mesh cap coupled to the lid body. The metal mesh cap covers the top port and serves as both a particulate filter and a continuous conductive shield for EMI/RF interferences. Further, the metal mesh cap provides a locking feature for the lid adhesive to maximize the attach strength of the metal mesh lid to the substrate.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: September 17, 2013
    Assignee: Amkor Technology, Inc.
    Inventors: Bob Shih-Wei Kuo, Russell Shumway, Louis B. Troche, Jr.
  • Patent number: 8536661
    Abstract: Receptors are selectively attached by introducing blocking materials in the areas outside the active sensor surface area, and/or selectively attaching the bio receptors to one or more active sensor surface areas. Methods for selective attachment include the use of optical attachment using a patterned exposure to assist in the creation of receptor bonding to pre-selected regions of the one or more chips. Blocking agents are attached to regions where blocking the receptor attachment is beneficial. Biased conducting regions may also affect selective attachment. Such controlled blocking may be accomplished using optical patterning exposure with optical assisted bonding of the blocking molecule or lift off processes. Patterned exposure for either attachment assists or liftoff processes employs photo masks. Conducting regions outside of the active sensor gate region are biased, affecting biochemical binding or non binding, and shielding of the semiconductor region outside of the active biosensor region.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: September 17, 2013
    Assignee: University of Hawaii
    Inventor: James W. Holm-Kennedy
  • Patent number: 8530981
    Abstract: A low-cost microelectromechanical system (MEMS) device has a mass-produced carrier fabricated as a pre-molded leadframe so that the space of the leadframe center is filled with compound and a two-tier stepped recess is created in the center. The first tier is filled by an inset with a first perforation and a second perforation. An integrated circuit chip with an opening and a membrane at the end of the opening, operable as a pressure sensor, microphone, speaker, etc., is assembled on the inset so that the chip opening is aligned with the first perforation. The chip is protected by a cover transected by a vent aligned with the second inset perforation. An air channel extends from the ambient exterior through the vent and the second perforation to the second tier recess, which acts as a channel and connects to the first perforation and the chip opening to the membrane.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: September 10, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: James Richard Huckabee, Ray H. Purdom
  • Publication number: 20130228880
    Abstract: Embodiments of the present invention provide a method for manufacturing an integrated sensor structure. In one step, a semiconductor substrate having integrated readout electronics and a metallization structure is provided, the metallization structure including tungsten and being exposed on a surface of the semiconductor substrate. In another step, a sensor layer is deposited onto the surface of the semiconductor substrate, the semiconductor substrate having the integrated readout electronics and the metallization structure being exposed, when depositing the sensor layer, to a temperature which is above a maximum temperature used when generating the integrated readout electronics such that the sensor layer is connected to the integrated readout electronics via the metallization structure.
    Type: Application
    Filed: February 22, 2013
    Publication date: September 5, 2013
    Applicant: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventor: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
  • Patent number: 8525276
    Abstract: The invention provides combination semiconductor and plasma devices, including transistors and phototransistors. A preferred embodiment hybrid plasma semiconductor device has active solid state semiconductor regions; and a plasma generated in proximity to the active solid state semiconductor regions. Devices of the invention are referred to as hybrid plasma-semiconductor devices, in which a plasma, preferably a microplasma, cooperates with conventional solid state semiconductor device regions to influence or perform a semiconducting function, such as that provided by a transistor. The invention provides a family of hybrid plasma electronic/photonic devices having properties previously unavailable. In transistor devices of the invention, a low temperature, glow discharge is integral to the hybrid transistor. Example preferred devices include hybrid BJT and MOSFET devices.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: September 3, 2013
    Assignee: The Board of Trustees of the University of California
    Inventors: Paul A. Tchertchian, Clark J. Wagner, J. Gary Eden
  • Patent number: 8525389
    Abstract: A microelectromechanical system (MEMS) device and a method for fabricating the same are described. The MEMS device includes a first electrode and a second electrode. The first electrode is disposed on a substrate, and includes at least two metal layers, a first protection ring and a dielectric layer. The first protection ring connects two adjacent metal layers, so as to define an enclosed space between two adjacent metal layers. The dielectric layer is disposed in the enclosed space and connects two adjacent metal layers. The second electrode is disposed on the first electrode, wherein a cavity is formed between the first electrode and the second electrode.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: September 3, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Tzung-Han Tan, Bang-Chiang Lan, Ming-I Wang, Chien-Hsin Huang, Meng-Jia Lin
  • Patent number: 8525323
    Abstract: The present invention is: a package main body section having a hollow section; and an electronic device provided in the hollow section in the package main body section, in the package main body section, there being formed a through hole, through which the hollow section communicates with outside of the package main body section, and in the through hole, there being provided a sealing section in which a vicinity of the through hole is partly heated and a constituent material of the package main body section is melted to thereby block the through hole.
    Type: Grant
    Filed: January 28, 2009
    Date of Patent: September 3, 2013
    Assignee: NEC Corporation
    Inventors: Takao Yamazaki, Masahiko Sano, Seiji Kurashina, Yoshimichi Sogawa
  • Publication number: 20130221455
    Abstract: An embedded micro-electro-mechanical system (MEMS) (100) comprising a semiconductor chip (101) embedded in an insulating board (120), the chip having a cavity (102) including a radiation sensor MEMS (105), the opening (104) of the cavity at the chip surface covered by a plate (110) transmissive to the radiation (150) sensed by the MEMS. The plate surface remote from the cavity having a bare central area, to be exposed to the radiation sensed by the MEMS in the cavity, and a peripheral area covered by a metal film (111) touching the plate surface and a layer (112) of adhesive stacked on the metal film.
    Type: Application
    Filed: February 27, 2012
    Publication date: August 29, 2013
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Christopher D. Manack, Frank Stepniak, Sreenivasan K. Koduri
  • Publication number: 20130221452
    Abstract: A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A conductive layer can be formed over the encapsulant and the semiconductor die. A transmissive layer can be formed over the semiconductor die. An interconnect structure can be formed through the encapsulant and electrically connected to the conductive layer, whereby the interconnect structure is formed off to only one side of the semiconductor die.
    Type: Application
    Filed: March 29, 2013
    Publication date: August 29, 2013
    Applicant: Stats ChipPAC, Ltd.
    Inventor: Stats ChipPAC, Ltd.
  • Patent number: 8519490
    Abstract: A CMOS (Complementary Metal Oxide Semiconductor) pixel for sensing at least one selected from a biological, chemical, ionic, electrical, mechanical and magnetic stimulus. The CMOS pixel includes a substrate including a backside, a source coupled with the substrate to generate a background current, and a detection element electrically coupled to measure the background current. The stimulus, which is to be provided to the backside, affects a measurable change in the background current.
    Type: Grant
    Filed: August 9, 2010
    Date of Patent: August 27, 2013
    Assignee: OmniVision Technologies, Inc.
    Inventor: Manoj Bikumandla
  • Patent number: 8519447
    Abstract: An ion sensitive sensor having an EIS structure, including: a semiconductor substrate, on which a layer of a substrate oxides is produced; an adapting or matching layer, which is prepared on the substrate oxide; a chemically stable, intermediate insulator, which is deposited on the adapting or matching layer; and an ion sensitive, sensor layer, which is applied on the intermediate insulator. The adapting or matching layer differs from the intermediate insulator and the substrate oxide in its chemical composition and/or structure. The adapting or matching layer and the ion sensitive, sensor layer each have an electrical conductivity greater than that of the intermediate insulator. There is an electrically conductive connection between the adapting or matching layer and the ion sensitive, sensor layer.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: August 27, 2013
    Assignee: Endress + Hauser Conducta Gesellschaft für Mess- und Regeltechnik mbH + Co. KG
    Inventor: Hendrik Zeun
  • Patent number: 8516897
    Abstract: The present disclosure relates to pressure sensor assemblies and methods. The pressure sensor assembly may include a first substrate, a second substrate and a sense die. The first substrate may be connected to the second substrate, such that an aperture in the first substrate is in fluid communication with an aperture in the second substrate. The second substrate may be connected to the sense die, such that the aperture in the second substrate is in fluid communication with a sense diaphragm on the second substrate. The pressure sensor assembly may include a media path that extends through the aperture in the first substrate, through the aperture in the second substrate, and to the sense die. In some cases, the first substrate, the second substrate and the sense die may be connected in a manner that does not include an adhesive.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: August 27, 2013
    Assignee: Honeywell International Inc.
    Inventors: Ryan Jones, Paul Rozgo, Richard Charles Sorenson
  • Patent number: 8518562
    Abstract: A magnetic storage device stable in write characteristic is provided. A first nonmagnetic film is provided over a recording layer. A first ferromagnetic film is provided over the first nonmagnetic film and has a first magnetization and a first film thickness. A second nonmagnetic film is provided over the first ferromagnetic film. A second ferromagnetic film is provided over the second nonmagnetic film, is coupled in antiparallel with the first ferromagnetic film, and has a second magnetization and a second film thickness. An antiferromagnetic film is provided over the second ferromagnetic film. The sum of the product of the first magnetization and the first film thickness and the product of the second magnetization and the second film thickness is smaller than the product of the magnetization of the recording layer and the film thickness of the recording layer.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: August 27, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Takashi Takenaga, Takeharu Kuroiwa, Hiroshi Takada, Ryoji Matsuda, Yosuke Takeuchi
  • Patent number: 8519489
    Abstract: An embodiment relates a method comprising creating a reversible change in an electrical property by adsorption of a gas by a composition, wherein the composition comprises a noble metal-containing nanoparticle and a single walled carbon nanotube. Another embodiment relates to a method comprising forming a composition comprising a noble metal-containing nanoparticle and a single walled carbon nanotube and forming a device containing the said composition. Yet another method relates to a device comprising a composition comprising a noble metal-containing nanoparticle and a single walled carbon nanotube on a silicon wafer, wherein the composition exhibits a reversible change in an electrical property by adsorption of a gas by the composition.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: August 27, 2013
    Assignee: Indian Institute of Technology Madras
    Inventors: Pradeep Thalappil, Chandramouli Subramaniam
  • Patent number: 8513747
    Abstract: An integrated MEMS device comprises a wafer where the wafer contains two or more cavities of different depths. The MEMS device includes one movable structure within a first cavity of a first depth and a second movable structure within a second cavity of a second depth. The cavities are sealed to maintain different pressures for the different movable structures for optimal operation. MEMS stops can be formed in the same multiple cavity depth processing flow. The MEMS device can be integrated with a CMOS wafer.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: August 20, 2013
    Assignee: Invensense, Inc.
    Inventors: Kegang Huang, Martin Lim, Steven S. Nasiri
  • Patent number: 8513050
    Abstract: A Bi—Se doped with Cu, p-type semiconductor, preferably used as an absorber material in a photovoltaic device. Preferably the semiconductor has at least 20 molar percent Cu. In a preferred embodiment, the semiconductor comprises at least 28 molar percent of Cu. In one embodiment, the semiconductor comprises a molar percentage of Cu and Bi whereby the molar percentage of Cu divided by the molar percentage of Bi is greater than 1.2. In a preferred embodiment, the semiconductor is manufactured as a thin film having a thickness less than 600 nm.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: August 20, 2013
    Assignee: U.S. Department of Energy
    Inventors: Raghu Nath Bhattacharya, Sovannary Phok, Philip Anthony Parilla
  • Patent number: 8513711
    Abstract: A gas-sensitive semiconductor device having a semiconductive channel (10) which is delimited by a first (12) and a second (14) channel electrode, and having a gate electrode (16) which is associated with the channel and which cooperates with the channel in such a way that a change in conductivity of the channel (10) occurs as a response to an action of a gas. The gate electrode (16) and/or a gate insulation layer (20) which insulates the gate electrode from the channel, and/or a gate stack layer (18) which may be provided between the gate electrode and the channel have/has two surface sections (22, 24) which differ in their sensitivity to gases.
    Type: Grant
    Filed: September 23, 2010
    Date of Patent: August 20, 2013
    Assignee: Robert Bosch GmbH
    Inventors: Denis Kunz, Markus Widenmeyer, Alexander Martin
  • Patent number: 8513750
    Abstract: Methods and associated structures of forming microelectronic devices are described. Those methods may include forming a first layer of magnetic material and at least one via structure disposed in a first dielectric layer, forming a second dielectric layer disposed on the first magnetic layer, forming at least one conductive structure disposed in the second dielectric layer, forming a third layer of dielectric material disposed on the conductive structure, forming a second layer of magnetic material disposed in the third layer of dielectric material and in the second layer of dielectric material, wherein the first and second layers of the magnetic material are coupled to one another.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: August 20, 2013
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Gerhard Schrom, Peter Hazucha, Fabrice Paillet, Tanay Karnik
  • Publication number: 20130207205
    Abstract: A device having an integrated noise shield is disclosed. The device includes a plurality of vertical shielding structures substantially surrounding a semiconductor device. The device further includes an opening above the semiconductor device substantially filled with a conductive fluid, wherein the plurality of vertical shielding structures and the conductive fluid shield the semiconductor device from ambient radiation. In some embodiments, the device further includes a conductive bottom shield below the semiconductor device shielding the semiconductor device from ambient radiation. In some embodiments, the opening is configured to allow a biological sample to be introduced into the semiconductor device. In some embodiments, the vertical shielding structures comprise a plurality of vias, wherein each of the plurality of vias connects more than one conductive layers together.
    Type: Application
    Filed: February 14, 2012
    Publication date: August 15, 2013
    Applicant: GENIA TECHNOLOGIES, INC.
    Inventor: Roger Chen
  • Publication number: 20130207206
    Abstract: A method of manufacturing a biosensor semiconductor device in which copper electrodes at a major surface of the device are modified to form Au—Cu alloy electrodes. Such modification is effected by depositing a gold layer over the device, and then thermally treating the device to promote interdiffusion between the gold and the electrode copper. Alloyed gold-copper is removed from the surface of the device, leaving the exposed electrodes. The electrodes are better compatible with further processing into a biosensor device than is the case with conventional copper electrodes, and the process windows are wider than for gold capped copper electrodes. A biosensor semiconductor device having Au—Cu alloy electrodes is also disclosed.
    Type: Application
    Filed: August 7, 2012
    Publication date: August 15, 2013
    Applicant: NXP B.V.
    Inventors: David VAN STEENWINCKEL, Thomas MERELLE, Franciscus Petrus WIDDERSHOVEN, Viet Hoang NGUYEN, Dimitri SOCCOl, Jan Leo Dominique FRANSAER
  • Publication number: 20130207204
    Abstract: A method of forming a biosensor chip enables a bond pad and detector electrode to be formed of different materials (one is formed of a connection layer such as copper and the other is formed of a diffusion barrier layer such as tantalum or tantalum nitride). A single planarizing operation is used for both the bond pad and the detector electrode. By using the same processing, resist patterning on an already-planarized surface is avoided, and the cleanliness of both the bond pad and detector electrode is ensured. Self-aligned nanoelectrodes and bond pads are obtained.
    Type: Application
    Filed: February 13, 2012
    Publication date: August 15, 2013
    Applicant: NXP B.V.
    Inventor: Frans Widdershoven
  • Patent number: 8508003
    Abstract: An acceleration sensor is formed using an etched layer sandwiched between first and second substrates. In this case, a structure including a movable portion which is displaceable in the thickness direction of the substrates, and a support frame are formed in the etched layer. In addition, first and second fixed electrodes are formed on the first and second substrates, respectively, at a position facing the movable portion. Further, a remaining sacrificial layer is provided on the substrate by leaving a portion of a second sacrificial layer when a first sacrificial layer is entirely etched away. Therefore, when the first sacrificial layer is etched away, corrosion of the structure and the support beams is prevented because the second sacrificial layer is preferentially corroded as compared to the structure.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: August 13, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Junichi Yoshida
  • Patent number: 8507306
    Abstract: A MEMS device has a first member that is movable relative to a second member. At least one of the first member and the second member has exposed silicon carbide with a water contact angle of greater than about 70 degrees.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: August 13, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Li Chen, Christine H. Tsau, Thomas Kieran Nunan, Kuang L. Yang
  • Patent number: 8502277
    Abstract: A sensor capable of detecting detection targets that are necessary to be detected with high sensitivity is provided. It comprises a field-effect transistor 1A having a substrate 2, a source electrode 4 and a drain electrode 5 provided on said substrate 2, and a channel 6 forming a current path between said source electrode 4 and said drain electrode 5; wherein said field-effect transistor 1A comprises: an interaction-sensing gate 9 for immobilizing thereon a specific substance 10 that is capable of selectively interacting with the detection targets; and a gate 7 applied a voltage thereto so as to detect the interaction by the change of the characteristic of said field-effect transistor 1A.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: August 6, 2013
    Assignee: Japan Science and Technology Agency
    Inventors: Kazuhiko Matsumoto, Atsuhiko Kojima, Satoru Nagao, Masanori Katou, Yutaka Yamada, Kazuhiro Nagaike, Yasuo Ifuku, Hiroshi Mitani