Abstract: A surface emitting semiconductor laser which can perform laser oscillation in a single peak beam like that in a single lateral mode and a manufacturing method which can easily manufacture such a laser at a high yield are provided. When a surface emitting semiconductor laser having a post type mesa structure is formed on an n-type semiconductor substrate, a mesa portion is formed and up to a p-side electrode and an n-side electrode are formed. Thereafter, a voltage is applied across the p-side and n-side electrodes and the laser is subjected to a steam atmosphere while extracting output light, thereby forming an Al oxide layer onto a p-type AlwGa1-wAs layer as a top layer of a p-type DBR layer and forming refractive index distribution like that of a concave lens.

Abstract: Source and drain electrodes are each formed by an alternation of first and second layers made from a germanium and silicon compound. The first layers have a germanium concentration comprised between 0% and 10% and the second layers have a germanium concentration comprised between 10% and 50%. At least one channel connects two second layers respectively of the source electrode and drain electrode. The method comprises etching of source and drain zones, connected by a narrow zone, in a stack of layers. Then superficial thermal oxidation of said stack is performed so a to oxidize the silicon of the germanium and silicon compound having a germanium concentration comprised between 10% and 50% and to condense the germanium Ge. The oxidized silicon of the narrow zone is removed and a gate dielectric and a gate are deposited on the condensed germanium of the narrow zone.

Abstract: A photomask includes a light-blocking section that blocks light and also includes a light intensity difference section that controls the intensity of light. The light-blocking section is disposed between the light intensity difference section and a light-transmissive region transmitting light.

Abstract: This invention relates to a wafer-leveled chip packaging method, comprising the steps of: providing a wafer; attaching at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, wherein parts of the first conductive vias are electrically connected with the first chip; forming a conductive pattern layer on the surface of the first insulating layer wherein the conductive pattern layer is electrically connected with the first conductive vias; forming a plurality of through holes penetrating the wafer; filling a second insulating layer in the through holes; and forming a plurality of second conductive vias in the second insulating layer, wherein the second conductive vias are electrically connected with the first conductive vias.

Abstract: [Problem] To provide a substrate treatment apparatus capable of performing temperature control in a reaction tube with accuracy. [Means for Resolution] A substrate treatment apparatus 100 includes: a reaction tube 42 for treating a substrate 54; a heater 46 for heating the substrate 54 in the reaction tube 42; a cooling air channel 72 for circulating cooling air 70 outside the reaction tube 42; and a thermocouple 82 for detecting temperature around the reaction tube 42. The thermocouple 82 is disposed in the cooling air channel 72 for circulating cooling air 70 in a state where the thermocouple 82 is covered with a protection tube 86, and a cover 88 for intercepting flow toward the protection tube 86 of the cooling air 70 is disposed outside the protection tube 86.

Abstract: The invention provides a method for manufacturing a semiconductor device. The method for manufacturing the semiconductor device, among others, may include forming one or more layers of material within an opening in a substrate, the opening and the one or more layers forming at least a portion of an isolation structure, and subjecting at least one of the one or more layers to an energy beam treatment, the energy beam treatment configured to change a stress of the one or more layers subjected thereto, and thus change a stress in the substrate.

Abstract: A first layer (an insulating layer), a second layer (a metal layer), and a third layer (an insulating layer) are formed over a substrate. Then, a fourth layer including a semiconductor element is formed over the third layer. After applying an organic resin film covering the fourth layer, laser light is irradiated to sections of a rear surface side of the substrate. By irradiating the second layer with laser light, the state of being covered with the organic resin film can be maintained at the same time as forming a space under the organic resin film by ablating (alternatively, evaporating or breaking down) an irradiated region of the second layer, to cause a lift in the film in a periphery thereof.

Abstract: The present invention generally relates to a high resistivity CZ silicon wafer, or a high resistivity silicon structure derived therefrom, and a process for the preparation thereof. In particular, the high resistivity silicon structure comprises a large diameter CZ silicon wafer as the substrate thereof, wherein the resistivity of the substrate wafer is decoupled from the concentration of acceptor atoms (e.g., boron) therein, the resistivity of the substrate being substantially greater than the resistivity as calculated based on the concentration of said acceptor atoms therein.

Abstract: A method of manufacturing a semiconductor device includes the steps of: modifying a semiconductor film by applying a laser beam; and forming a semiconductor device on the modified semiconductor film. In the step of modifying the semiconductor film, the laser beam and the substrate are moved relative to each other in a first direction and a second direction which is opposite to the first direction, a change in an optical characteristic between an area irradiated with the laser beam and an area which is not irradiated with the laser beam in the substrate or an optical characteristic of the irradiated area is measured in each of the first and second directions, and irradiation power of the laser beam is modulated so that the difference between a measurement result in the first direction and a measurement result in the second direction lies in a predetermined range.

Abstract: A method is described for the manufacture of structured flexible metallic patterns in which a metallic layer on a flexible substrate is structured using laser ablation. The flexible patterns manufactured in this fashion may be used as interposers (strap) for RFID tags or RFID antennas.

Abstract: The number of substrates held by a substrate holder is increased compared with conventional techniques while uniformity of a heat treatment is ensured. The substrate holder holds a plurality of substrates at predetermined vertical intervals. The substrate holder is carried into a heat treating furnace. A predetermined heat treatment is performed on the substrates. The substrate holder has two holder constituting bodies. Each of the holder constituting bodies has a plurality of columns and substrate holding sections. The columns are arranged on the circumference of the same imaginary circle. The substrate holding sections hold circumferential portions of the respective substrates. One of the holder constituting bodies holds the substrates under the condition that front surfaces of the substrates face upward, while the other of the holder constituting bodies holds the substrates under the condition that back surfaces of the substrates face upward.

Abstract: A method by which solid phase crystallization (SPC) thermal budget for crystallizing an undoped (or a lightly doped) amorphous Si (a-Si) is significantly reduced. First, a composite layer structure consisting of an undoped (or a lightly doped) a-Si layer and a heavily doped (either p-type or n-type) a-Si layer is formed and it is subsequently annealed at an elevated temperature. The solid phase crystallization starts from the heavily doped amorphous silicon layer at a substantially reduced thermal budget and proceeds to crystallize the undoped amorphous silicon layer in contact with the heavily doped film at reduced thermal budget. The method can be applied to form poly silicon thin film transistor at reduced thermal budgets.

Abstract: Apparatus for and methods of thermally processing undoped or lightly doped semiconductor wafers (30) that typically are not very absorptive of an annealing radiation beam (14) are disclosed. The apparatus (10) uses a relatively low power activating radiation beam (240) with a photon energy greater than the bandgap energy of the semiconductor substrate in order to generate free carriers (315) at and near the substrate surface (32). The free carriers so generated enhance the absorption by the substrate surface of the longer wavelength annealing radiation beam. The annealing radiation beam is thus able to rapidly heat the substrate surface and permit subsequent rapid cooling to obtain, for example, a high level of electrical activity (activation) of dopants (310) formed therein. The invention obviates the need to pre-heat the substrate in order to increase absorption of the annealing radiation beam when performing thermal processing.

Abstract: The present invention is a method for producing an annealed wafer, wherein, at least, when a boat in which a semiconductor wafer is placed is inserted into a furnace tube, the boat is inserted along with introducing an inert gas into the furnace, so that entirety of the semiconductor wafer to be a product reaches a thermally uniform portion, then an insertion rate of the boat in which the semiconductor wafer is placed is decelerated and/or suspended, so that an interval between the furnace tube and the shutter is maintained for a predetermined time, and then the furnace tube is blocked in with the shutter. Thereby, there can be provided a method for producing an annealed wafer by which during the heat treatment, it can be more certainly prevented that the wafer is contaminated with conductive impurities and that thereby resistivity of the wafer is changed before and after the heat treatment.

Abstract: To provide a laser apparatus and a laser annealing method with which a crystalline semiconductor film with a larger crystal grain size is obtained and which are low in their running cost. A solid state laser easy to maintenance and high in durability is used as a laser, and laser light emitted therefrom is linearized to increase the throughput and to reduce the production cost as a whole. Further, both the front side and the back side of an amorphous semiconductor film is irradiated with such laser light to obtain the crystalline semiconductor film with a larger crystal grain size.

Abstract: An ion implantation device and a method of manufacturing a semiconductor device is described, wherein ionized carborane cluster ions are implanted into semiconductor substrates to perform doping of the substrate. The carborane cluster ions have the chemical form C2B10Hx+, C2B8Hx+ and C4B18Hx+and are formed from carborane cluster molecules of the form C2B10H12 ,C2B8H10 and C4B18H22 The use of such carborane molecular clusters results in higher doping concentrations at lower implant energy to provide high dose low energy implants. In accordance with one aspect of the invention, the carborane cluster molecules may be ionized by direct electron impact ionization or by way of a plasma.

Abstract: Some embodiments of the present invention provide semiconductor devices including a gate trench in an active region of a semiconductor substrate and a gate electrode in the gate trench. A low-concentration impurity region is provided in the active region adjacent to a sidewall of the gate trench. A high-concentration impurity region is provided between the low-concentration impurity region and the sidewall of the gate trench and along the sidewall of the gate trench. Related methods of fabricating semiconductor devices are also provided herein.

Abstract: A semiconductor integrated circuit includes at least one first circuit portion and at least one second circuit portion. The first circuit portion includes a first interconnect or a diffusion layer formed by exposure using a high-precision mask. The second circuit portion includes a second interconnect or a diffusion layer formed by exposure using a first low-precision mask having a lower precision than the high-precision mask.

Abstract: A method for manufacturing a semiconductor device including a first conductive type impurity region formed by introducing a first conductive type impurities in a first region of a semiconductor region and heating the first region, a second conductive type impurity region formed by introducing a second conductive type impurities in a second region of the semiconductor region and heating the second region, the method including covering the second region with a mask and then introducing the first conductive type impurities in a surface of the first region, removing the mask by a process using gas including oxygen while forming an oxide film on the surface of the first region by the processing using the gas including the oxygen, and introducing the second conductive type impurities in a surface of the second region by using the oxide film as a mask.

Abstract: A method is disclosed for doping a target area of a semiconductor substrate, such as a source or drain region of a transistor, with an electronically active dopant (such as an N-type dopant used to create active areas in NMOS devices, or a P-type dopant used to create active areas in PMOS devices) having a well-controlled placement profile and strong activation. The method comprises placing a carbon-containing diffusion suppressant in the target area at approximately 50% of the concentration of the dopant, and activating the dopant by an approximately 1,040 degree Celsius thermal anneal. In many cases, a thermal anneal at such a high temperature induces excessive diffusion of the dopant out of the target area, but this relative concentration of carbon produces a heretofore unexpected reduction in dopant diffusion during such a high-temperature thermal anneal.

Abstract: An apparatus for annealing a substrate includes a substrate stage having a substrate mounting portion configured to mount the substrate; a heat source having a plurality of heaters disposed under the substrate mounting portion, the heaters individually preheating a plurality areas defined laterally in the substrate through a bottom surface of the substrate; and a light source facing a top surface of the substrate, configured to irradiate a pulsed light at a pulse width of about 0.1 ms to about 100 ms on the entire top surface of the substrate.

Abstract: This invention provides processing steps, methods and materials strategies for making patterns of structures for electronic, optical and optoelectronic devices. Processing methods of the present invention are capable of making micro- and nano-scale electronic structures, such as T-gates, gamma gates, and shifted T-gates, having a selected non-uniform cross-sectional geometry. The present invention provides lithographic processing strategies for sub-pixel patterning in a single layer of photoresist useful for making and integrating device components comprising dielectric, conducting, metal or semiconductor structures having non-uniform cross-sectional geometries. Processing methods of the present invention are complementary to conventional microfabrication and nanofabrication platforms, and can be effectively integrated into existing photolithographic, etching and thin film deposition patterning strategies, systems and infrastructure.

Abstract: The invention provides a standard component for calibration that enables a calibration position to be easily specified in order to calibrate accurately a scale factor in the electron-beam system, and provides an electron-beam system using it. High-accuracy metrology calibration capable of specifying a calibration position can be realized by forming a mark pattern or labeled material for identifying the calibration position in proximity of a superlattice pattern of the standard component for system calibration. The standard component for calibration is one that calibrates a scale factor of an electron-beam system based on a signal of secondary charged particles detected by irradiation of a primary electron beam emitted from the electron-beam system on a substrate having a cross section of a superlattice of a multi-layer structure in which different materials are deposited alternately.

Abstract: A manufacturing method, remanufacturing method and reshipping method for a semiconductor memory device capable of preventing the charge hold characteristic from deteriorating even if information data is repeatedly written and erased. The manufacturing method is for a semiconductor memory device having a plurality of memory cells in an FET structure formed on a semiconductor substrate, wherein each of the plurality of memory cells is to store a unit bit and hold information data. Preparing a plurality of memory cells, bits of the information data are written to the memory cells. After writing the information data bits to the memory cells, the memory cells are allowed to stand at a predetermined ambient temperature for a predetermined time. Thereafter, bits of the information data are written to the memory cells.

Abstract: A synthesis route to grow textured thin film of gallium nitride on amorphous quartz substrates and on single crystalline substrates such as c-sapphire and polycrystalline substrates such as pyrolytic boron nitride (PBN), alumina and quartz using the dissolution of atomic nitrogen rather than molecular nitrogen to allow for growth at subatmospheric pressure.

Abstract: A method for reducing STI processing induced stress on a substrate during fabrication of a MOSFET. The method includes providing a substrate, wells (including dopants), and STIs in an upper layer of the substrate. A layer of an oxide substance is formed on a top surface of the upper layer of the substrate covering the STIs. A layer of a nitride substance is formed over the oxide layer. The substrate is annealed using temperatures greater than 1000° C. to activate the dopants in the wells which results in less stress on the STIs and hence less stress in the channels because of the nitride substance layer. The nitride and oxide substance layers are then stripped off the substrate, and CMOS fabrication is continued. The low stress remains in the channels if the thermal budget in following processes are low by using low temperature RTA and/or laser anneal.

Abstract: Methods for implanting ions into a substrate by a plasma immersion ion implanting process are provided. In one embodiment, a method for implanting ions into a substrate includes providing a substrate into a processing chamber, generating a plasma from a gas mixture including a reacting gas and a etching gas in the chamber, adjusting the ratio between the reacting gas and the etching gas in the supplied gas mixture and implanting ions from the plasma into the substrate. In another embodiment, the method includes providing a substrate into a processing chamber, supplying a gas mixture including reacting gas and a halogen containing reducing gas into the chamber, forming a plasma from the gas mixture, gradually increasing the ratio of the etching gas in the gas mixture, and implanting ions from the gas mixture into the substrate.

Abstract: A second laser light of a continuous wave oscillation is irradiated to a region melted by a first laser light of a pulsed oscillation having a harmonic. Specifically, the first laser light has a wavelength not longer than that of visible light (830 nm, preferably not more than 780 nm). The absorption coefficient of the second laser light to a semiconductor film considerably increases because the semiconductor film is melted by the first laser light, and therefore the second laser light becomes easy to be absorbed in the semiconductor film.

Abstract: A chamber for exposing a workpiece to charged particles includes a charged particle source for generating a stream of charged particles, a collimator configured to collimate and direct the stream of charged particles from the charged particle source along an axis, a beam digitizer downstream of the collimator configured to create a digital beam including groups of at least one charged particle by adjusting longitudinal spacing between the charged particles along the axis, a deflector downstream of the beam digitizer including a series of deflection stages disposed longitudinally along the axis to deflect the digital beams, and a workpiece stage downstream of the deflector configured to hold the workpiece.

Abstract: An optical sensor is provided, comprising (a) a silicon nanowire of finite length having an electrical contact pad at each end thereof; and (b) a plurality of self-assembled molecules on a surface of the silicon nanowire, the molecules serving to modulate electrical conductivity of the silicon nanowire by either a reversible change in dipole moment of the molecules or by a reversible molecule-assisted electron/energy transfer from the molecules onto the silicon nanowire. Further, a method of making the optical sensor is provided. The concept of molecular self-assembly is applied in attaching functional molecules onto silicon nanowire surfaces, and the requirement of molecule modification (hydroxy group in molecules) is minimal from the point view of synthetic difficulty and compatibility. Self-assembly will produce well-ordered ultra-thin films with strong chemical bonding on a surface that cannot be easily achieved by other conventional methods.

Abstract: Method and apparatus for removing and neutralizing charges. The method includes loading a structure into a chamber. The structure includes a first surface and a plurality of charges away from the first surface. Additionally, the method includes supplying a first ionized gas to the first surface of the structure, and radiating the structure with a first ultraviolate light. The supplying a first ionized gas and the radiating the structure with a first ultraviolate light are performed simultaneously for a first period of time.

Abstract: Continuous wave laser apparatus with enhanced processing efficiency is provided as well as a method of manufacturing a semiconductor device using the laser apparatus. The laser apparatus has: a laser oscillator; a unit for rotating a process object; a unit for moving the center of the rotation along a straight line; and an optical system for processing laser light that is outputted from the laser oscillator to irradiate with the laser light a certain region within the moving range of the process object. The laser apparatus is characterized in that the certain region is on a line extended from the straight line and that the position at which the certain region overlaps the process object is moved by rotating the process object while moving the center of the rotation along the straight line.

Abstract: The invention relates to a manufacturing method for an insulated gate semiconductor device cell, comprising the steps of forming a cell window (3) in a layered structure that is located on top of a semiconductor substrate (1), forming at least one process mask that partially covers the cell window (3). In forming the cell window (3), at least one strip (41, 42) of the layered structure is left to remain inside the cell window (3) and at least one strip (41, 42) is used to serve as an edge for the at least one process mask (51, 52). The invention further relates to an insulated gate semiconductor device, comprising a semiconductor substrate (1) having an essentially planar top surface and an insulated gate formed on the top surface by a layered structure (2) that comprises at least one electrically insulating layer (22), wherein at least one strip (41, 42) of the layered structure (2) is disposed on a third area of the top surface between an edge of the insulated gate and a first main contact (6).

Abstract: A method of fabricating a dielectric film comprising atoms of Si, C, O and H (hereinafter SiCOH) that has improved insulating properties as compared with prior art dielectric films, including prior art SiCOH dielectric films that are not subjected to the inventive deep ultra-violet (DUV) is disclosed. The improved properties include reduced current leakage which is achieved without adversely affecting (increasing) the dielectric constant of the SiCOH dielectric film. In accordance with the present invention, a SiCOH dielectric film exhibiting reduced current leakage and improved reliability is obtained by subjecting an as deposited SiCOH dielectric film to a DUV laser anneal. The DUV laser anneal step of the present invention likely removes the weakly bonded C from the film, thus improving leakage current.

Abstract: A method of processing a substrate comprising depositing a layer comprising amorphous carbon on the substrate and then laser annealing the substrate is provided. Optionally, the layer further comprises a dopant selected from the group consisting of nitrogen, boron, phosphorus, fluorine, and combinations thereof. In one aspect, the layer comprising amorphous carbon is an anti-reflective coating and an absorber layer that absorbs electromagnetic radiation emitted by the laser and anneals a top surface layer of the substrate.

Abstract: An annealing furnace, includes a processing chamber configured to store a substrate; a susceptor located in the processing chamber so as to load the substrate and having an auxiliary heater for heating the substrate at 650° C. or less, the susceptor having a surface being made of quartz; a gas supply system configured to supply a gas required for a thermal processing on the substrate in parallel to a surface of the substrate; a transparent window located on an upper part of the processing chamber facing the susceptor; and a main heater configured to irradiate a pulsed light on the surface of the substrate to heat the substrate from the transparent window, the pulsed light having a pulse duration of approximately 0.1 ms to 200 ms and having a plurality of emission wavelengths.

Abstract: It is an object to provide techniques for forming a field emission device of a field emission display device with the use of an inexpensive large-sized substrate according to the process that enables improving productivity. A field emission device according to the present invention includes a cathode electrode formed on an insulating surface of a substrate and a convex electron emission portion formed at a surface of the cathode electrode, and the cathode electrode and the electron emission portion include the same semiconductor film. The electron emission portion has a conical shape or a whiskers shape.