Fault Recovery Patents (Class 714/2)
  • Patent number: 8214855
    Abstract: In one embodiment, a method includes receiving a program stream from a program source on a first channel. The method also includes detecting an unrecoverable error in the program stream, and receiving a standalone decodable repair stream from an error repair source on a second channel. The repair stream refers to a portion of the program stream, where the portion corresponds to the unrecoverable error. The method also includes combining the repair stream and the program stream to produce a presentable stream for user viewing.
    Type: Grant
    Filed: December 6, 2007
    Date of Patent: July 3, 2012
    Assignee: Cisco Technology, Inc.
    Inventors: John Pickens, William C. VerSteeg
  • Publication number: 20120166864
    Abstract: A system and method detects errors occurring in a computing device. The computing device includes a central processing unit (CPU) and a memory. The method sets an interruption tag for the computing device and initializes the interruption tag as zero, and detects a general purpose input output (GPIO) signal output from the CPU through a GPIO interface. The method further determines whether the GPIO signal is in a first voltage level at every time interval, and adds one to the interruption tag when the GPIO signal is switched from the first voltage level to a second voltage level. In addition, the method determines that inter errors occur in the CPU if the interruption tag is equal to one, and determines that multi-bit errors occur in the memory if the interruption tag is greater than one.
    Type: Application
    Filed: July 25, 2011
    Publication date: June 28, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD
    Inventor: YU-GANG ZHANG
  • Patent number: 8209683
    Abstract: A system, method, and computer-usable medium for probing hypervisor tasks in an asynchronous environment. According to an embodiment of the invention, the partition firmware sends a request for data to the hypervisor. When the hypervisor receives the request for data, the hypervisor returns a taskID that identifies the task allocated to handle the request. Partition firmware records the taskID and a timestamp, which indicates the time in which the hypervisor received the request. A timer is set to measure the amount of time elapsed since the task ID was received by a requesting partition firmware. If the hypervisor has not provided the partition firmware with the requested data after a predetermined time period measured by the timer has elapsed, the partition firmware inquires about the status of the task associated with the taskID. If the task is still running, the partition firmware returns control of the partition to the operating system.
    Type: Grant
    Filed: April 17, 2007
    Date of Patent: June 26, 2012
    Assignee: International Business Machines Corporation
    Inventors: Christopher H. Austen, David A. Larson, James A. Lindeman, Gary L. Ruzek
  • Patent number: 8209566
    Abstract: A system includes an input device having first and second input members configured to be activated by a user. The input device is configured to generate activation signals associated with activation of the first and second input members, and each of the first and second input members are associated with an input function. A processor is coupled to the input device and configured to receive the activation signals. A memory coupled to the processor, and includes a reconfiguration module configured to store the input functions assigned to the first and second input members and, upon execution of the processor, to reconfigure the input functions assigned to the input members when the first input member is inoperable.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: June 26, 2012
    Assignee: Honeywell International Inc.
    Inventors: Jeff Lancaster, Robert E. De Mers
  • Patent number: 8209700
    Abstract: The present invention is directed to a method, system, and computer program product for providing local load balancing for high-availability servers. In particular, the present invention is based on the use of an HACMP cluster of servers (for high availability) each running an instance of a TCP splitter (for load balancing). A cluster of servers is provided, wherein a Transport Control Protocol (TCP) splitter runs on each of the servers. Each TCP splitter is configured to split an incoming data stream to a respective server among a plurality of the servers for processing. Each server in the cluster has a different routable Internet Protocol (IP) address. Upon a failure of a server, the IP address of the failed server is reassigned to another server in the cluster.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: June 26, 2012
    Assignee: International Business Machines Corporation
    Inventors: Dmitry Andreev, Thomas M. Dauffenbach, Galina Grunin, Gregory Vilshansky
  • Patent number: 8209282
    Abstract: Provided are a system and article of manufacture for mirroring data. A mirror policy indicating volumes in a first storage system is processed to mirror to volumes in a second storage system and volumes in the second storage system to mirror to volumes in a third storage system. The third storage system is at a first geographical location remote with respect to a second geographical location including the first and second storage systems. A command is transmitted to cause the copying of updates to the volumes in the first storage system to corresponding volumes in the second storage system indicated in the mirror policy. Upon an occurrence of an event, the causing the suspension of the copying of updates to the volumes in the first storage system indicated in the mirroring policy to the volumes in the second storage system.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: June 26, 2012
    Assignee: International Business Machines Corporation
    Inventors: Robert Frederic Kern, William Frank Micka, Gail Andrea Spear, David B. Petersen
  • Patent number: 8205112
    Abstract: The present invention provides a data migration management apparatus that can easily create a re-execution task for re-executing an error-terminated data migration task, and also can increase the possibility of the re-execution task being successful. In a case where a data migration from a migration-source volume to a migration-destination volume fails, the management apparatus uses the information of the failed task to create a re-execution task. The management apparatus changes the configuration of a volume pair as necessary. The management apparatus manages the failed task in association with the re-execution task.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: June 19, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Akihiko Sakaguchi, Hiroshi Yamakawa
  • Patent number: 8201169
    Abstract: In a computer system running a primary virtual machine (VM) on virtualization software on a primary virtualized computer system (VCS) and running a secondary VM on virtualization software on a secondary VCS, a method for the secondary VM to provide quasi-lockstep fault tolerance for the primary VM includes: as the primary VM is executing a workload, virtualization software in the primary VCS is: (a) causing predetermined events to be recorded in an event log, (b) keeping output associated with the predetermined events pending, and (c) sending the log entries to the virtualization software in the secondary VCS; as the secondary VM is replaying the workload, virtualization software in the secondary VCS is: (a) sending acknowledgements indicating that log entries have been received; (b) when the virtualization software encounters one of the predetermined events, searching the log entries to determine whether a log entry corresponding to the same event was received from the primary VCS, and if so, comparing data
    Type: Grant
    Filed: June 15, 2009
    Date of Patent: June 12, 2012
    Assignee: VMware, Inc.
    Inventors: Ganesh Venkitachalam, Rohit Jain, Boris Weissman, Daniel J. Scales, Vyacheslav Malyugin, Jeffrey W. Sheldon, Min Xu
  • Patent number: 8200802
    Abstract: A disclosed example method involves at a network management module, receiving a request for logical circuit data associated with a network circuit. In addition, the example method involves requesting the logical circuit data from a legacy logical element in communication with a network device of the network circuit. The logical circuit data is received from the legacy logical element. The logical circuit data is indicative of whether the network circuit has failed.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: June 12, 2012
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: William Scott Taylor, Thad June
  • Patent number: 8199914
    Abstract: An undesired change of encrypted data words of a stored encrypted dataset may be concluded from the fact that redundancy information is associated with the data words of a dataset prior to encryption, wherein the redundancy information is also encrypted and stored at least partially together with the encrypted data words of the encrypted dataset as an encrypted redundancy data word. The change of the stored encrypted data words may be concluded from the fact that the decrypted data words resulting from decrypting the encrypted data words are used to form a new redundancy data word which is encrypted into a new encrypted redundancy data word. A comparison of the new encrypted redundancy data word to the encrypted redundancy data word enables to examine whether the encrypted data was changed.
    Type: Grant
    Filed: July 6, 2006
    Date of Patent: June 12, 2012
    Assignee: Infineon Technologie AG
    Inventor: Steffen Marc Sonnekalb
  • Publication number: 20120144226
    Abstract: A method, computer readable medium and apparatus for performing session establishment management. For example, the method detects an evolved packet system establishment success rate that is measured over a predefined period of time falling below a predefined threshold, and performs, via a rule management server, an analysis on a bearer portion. The method then associates, via the rule management server, a root cause that contributed to the evolved packet system establishment success rate falling below the predefined threshold.
    Type: Application
    Filed: December 1, 2010
    Publication date: June 7, 2012
    Inventors: CHEN-YUI YANG, Paritosh Bajpay, David H. Lu, Anthony Mark Srdar, Fang Wu
  • Publication number: 20120144227
    Abstract: An approach to detection and repair of application level semantic errors in deployed software includes inferring aspects of correct operation of a program. For instance, a suite of examples of operations that are known or assumed to be correct are used to infer correct operation. Further operation of the program can be compared to results found during correct operation and the logic of the program can be augmented to ensure that aspects of further examples of operation of the program are sufficiently similar to the examples in the correct suite. In some examples, the similarity is based on identifying invariants that are satisfied at certain points in the program execution, and augmenting (e.g., “patching”) the logic includes adding tests to confirm that the invariants are satisfied in the new examples. In some examples, the logic invokes an automatic or semi-automatic error handling procedure if the test is not satisfied.
    Type: Application
    Filed: December 7, 2010
    Publication date: June 7, 2012
    Applicants: BAE Systems Information Solutions, Inc., Massachusetts Institute of Technology
    Inventors: Jeff Herbert Perkins, Stylianos Sidiroglou, Martin Conway Rinard, Eric Patrick Lahtinen, Paolo Mario Piselli, Basil C. Krikeles, Timothy Alan Anderson, Greg Timothy Sullivan
  • Publication number: 20120137162
    Abstract: A network device for building up a network connection via a high-definition multimedia interface, includes a scrambler, a descrambler, a comparator and a control unit. The scrambler is utilized for generating a transmission signal according to a first seed. The descrambler is for decoding a receiving signal to generate a second seed. The comparator is for generating a comparing result according to the first seed and the second seed. The control unit is for controlling the network connection according to the comparing result.
    Type: Application
    Filed: November 28, 2011
    Publication date: May 31, 2012
    Inventors: Liang-Wei Huang, Shieh-Hsing Kuo, Chun-Hung Liu, Kai-Wen Cheng
  • Publication number: 20120137172
    Abstract: A system and method are disclosed for balancing the requirements of high availability achieved by redundant active components and power saving achieved by less active components. The requirement for high availability can be expressed by the recovery time objective (RTO) which specifies the amount of time it takes to recover from a failure in the system. Based on the configured RTO, the system configures the most appropriate power mode.
    Type: Application
    Filed: June 28, 2011
    Publication date: May 31, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas GARDELEGEN, Nils HAUSTEIN, Peter KIMMEL
  • Patent number: 8189458
    Abstract: A monitored device in a monitoring system sends a notification indicating device ID of a real computer and a real-MAC address thereof in advance to a monitoring device. The monitored device determines the real-MAC address corresponding to the computer in advance on the basis of the real-MAC address and an IP address of the computer and, when a failure occurs in any of the computers, also sends a notification indicating failure information including the virtual-MAC address and the IP address to the monitoring device. The monitoring device in the monitoring system obtains the real-MAC address on the basis of the IP address and the virtual-MAC address in the failure information, groups the failure information on the basis of the obtained real-MAC address, correlates the grouped failure information with the device ID, and outputs the correlated ID.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: May 29, 2012
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Kimura, Ikuko Tachibana, Toshiaki Hayashi, Takashi Tanifuji, Yasutaka Tanikawa
  • Patent number: 8190812
    Abstract: A memory system includes a volatile first storing unit, a nonvolatile second storing unit in which a plurality of memory cells that can store multi-value data are arranged, the memory cells having a plurality of pages, and a controller that performs data transfer between a host apparatus and the second storing unit via the first storing unit. The controller includes a save processing unit that backs up, when, before data is written in the second storing unit in a write-once manner, data is written in a lower order page of a memory cell same as that of a page in which the data is written, the data of the lower order page and a broken-information-restoration processing unit that restores, when the data in the lower order page is broken, the broken data using the backed-up data.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: May 29, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junji Yano, Hidenori Matsuzaki, Kosuke Hatsuda
  • Patent number: 8190805
    Abstract: The method for reconfiguring an information processing apparatus includes: transmitting, by the system management unit, a register setting request to set a register included in the control unit to a predetermined value to all of the system boards within the information processing apparatus, when a system board is added to or removed from any of the partitions; setting, by the system board that receives the register setting request, a register of a control unit of the local system board to the predetermined value, if a partition to which the local system board belongs includes the system board to be added or removed; and ignoring, by the system board that receives the register setting request, the register setting request if the partition to which the local system board belongs does not include the system board to be added or removed.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: May 29, 2012
    Assignee: Fujitsu Limited
    Inventors: Jin Takahashi, Toshikazu Ueki
  • Publication number: 20120131382
    Abstract: A information processing system comprises a memory module having a plurality of unit memory regions, a memory controller, connected to the memory module via memory interface, configured to control access to the memory module, an error detector, which is in the memory controller, configured to perform an error detection on data read from the memory module, a failure inspection controller configured to switch a mode of the memory controller from a normal mode to a failure inspection mode, read data from an address, where data was written, to be inspected for each of the plurality of unit memory regions, causes the error detector to detect an error in the read data and perform a failure inspection and a determining unit configured to determine a memory failure or a transmission path failure on the basis of the state of the error detected from the unit memory regions.
    Type: Application
    Filed: September 7, 2011
    Publication date: May 24, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Masanori HIGETA
  • Publication number: 20120131375
    Abstract: A method, including receiving, by a user space driver framework (UDF) library executing from a user space of a memory over a monolithic operating system kernel, a kernel application programming interface (API) call from a device driver executing from the user space. The UDF library then performs an operation corresponding to the kernel API call.
    Type: Application
    Filed: November 18, 2010
    Publication date: May 24, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael Adda, Dan Aloni, Avner Braverman
  • Patent number: 8185777
    Abstract: A network storage appliance is disclosed. The appliance includes a chassis enclosing a backplane, and a server enclosed in the chassis and coupled to the backplane. The appliance also includes storage controllers enclosed in the chassis, each coupled to the backplane, which control transfer of data between the server and storage devices coupled to the storage controllers. The storage controllers also control transfer of data between the storage devices and computers networked to the appliance and external to the appliance. The storage controllers and the server comprise a plurality of hot-replaceable blades. Any one of the plurality of blades may be replaced during operation of the appliance without loss of access to the storage devices by the computers. In one embodiment, the server executes storage application software, such as backup software for backing up data on the storage devices, such as to a tape device networked to the server.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: May 22, 2012
    Assignee: Dot Hill Systems Corporation
    Inventors: Ian Robert Davies, Victor Key Pecone, George Alexander Kalwitz
  • Patent number: 8185753
    Abstract: A power consumption monitor device monitors power consumption of one or more devices through a network. The monitor device includes a storage unit, a load information collecting unit and a power consumption estimation unit. The storage unit stores power consumption estimation information indicating a relation between power consumption and processing load of the one or more devices. The load information collecting unit collects load information indicating the processing load of the one or more devices through the network to the monitor device. The power consumption estimation unit estimates power consumption of the one or more device based on the collected load information and the power consumption estimation information.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: May 22, 2012
    Assignee: Fujitsu Limited
    Inventors: Kazuichi Oe, Tatsuo Kumano, Yasuo Noguchi, Yoshihiro Tsuchiya, Kazutaka Ogihara, Masahisa Tamura, Tetsutaro Maruyama, Takashi Watanabe, Minoru Kamoshida, Shigeyuki Miyamoto
  • Patent number: 8185912
    Abstract: A method, system, and medium are provided for re-routing messages from a particular parallel queue instance that is experiencing below normal message throughput by lowering the priority setting of the particular queue instance. The messages are re-routed to the other parallel queue instances by a load balancing algorithm that transfers messages to queue instances having a higher priority setting. A series of determinations are made, prior to lowering the priority setting, to confirm that lowering the priority setting for the queue instance is the preferred response to the decreased throughput for the queue instance.
    Type: Grant
    Filed: October 3, 2008
    Date of Patent: May 22, 2012
    Assignee: Sprint Communications Company L.P.
    Inventor: Mark Leonard
  • Publication number: 20120124410
    Abstract: Provided are a system and a method for self-healing in a critical system. The present invention monitors a current situation of the critical system, determines whether a system has an error by analyzing the monitoring result, judges whether to perform self-healing in a current state or drive safety software which provides a minimum basic service according to self-healing of the system error or not when the system error occurs, and evaluates self-healing performance after healing the system error. According to exemplary embodiments of the present invention, it is possible to continuously provide a software service and further improve the reliability of the self-healing system through the evaluation of the self-healing performance.
    Type: Application
    Filed: August 22, 2011
    Publication date: May 17, 2012
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: In Geol Chun, Won Tae Kim, Seung Min Park
  • Publication number: 20120124411
    Abstract: The invention relates to a method for fault identification in a System-on-Chip (SoC) consisting of a number of IP cores, wherein each IP core is a fault containment unit, and where the IP cores communicate with one another by means of messages via a Network-on-Chip, and wherein an excellent IP core provides a TRM (Trusted Resource Monitor), wherein a faulty control message which is sent from one non-privileged IP core to another non-privileged IP core is identified and projected by an (independent) fault container unit, as a result of which this faulty control message cannot cause any failure of the message receiver.
    Type: Application
    Filed: July 7, 2010
    Publication date: May 17, 2012
    Inventor: Stefan Poledna
  • Patent number: 8174966
    Abstract: When a switching unit of each of first DB servers receives a transaction-stop instruction request from a second DB server, the switching unit performs a transaction-stop instruction process. When a transaction processing unit of each of the first DB servers receives a transaction stop instruction from the switching unit, the transaction processing unit performs a transaction stop process. In the same manner, a transaction processing unit of the second DB server performs a transaction stop process. Each of the transaction processing units of the first and second DB servers determines whether a transaction is to be stopped depending on a processing attribute and a processing state of an SQL included in the transaction and then performs the transaction stop process depending on a determination result of the processing attribute and the processing state.
    Type: Grant
    Filed: October 8, 2009
    Date of Patent: May 8, 2012
    Assignee: Fujitsu Limited
    Inventors: Kazuhiro Taniguchi, Teruyuki Goto, Yoshiaki Teruta
  • Patent number: 8176355
    Abstract: A mechanism is provided for recovering from a data scan error. A service processor determines the nature of the data scan error and, depending on the nature of the error, performs one of a plurality of data scan error recovery procedures.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: May 8, 2012
    Assignee: International Business Machines Corporation
    Inventors: Daniel M. Crowell, Alongkorn Kitamorn, Kevin F. Reick, Thi N. Tran
  • Publication number: 20120106320
    Abstract: A method, apparatus and computer program product for performing Routed Split Multi-Link Trunking Resiliency for Wireless Local Area Network split-plane environments is presented. A first network switch learns first data associated with a second network switch and the first network switch terminates an Access Tunnel (AT). The said second network switch learns second data associated with said first network switch. The first and second data are synchronized between the first network switch and the second network switch. The first network switch and the second network load sharing tunnel data packets. The second network switch forwards tunnel control packets received by the second network switch to the first network. A failure relating to said first network switch is detected and a new AT is established with the second network switch.
    Type: Application
    Filed: November 1, 2010
    Publication date: May 3, 2012
    Applicant: AVAYA INC.
    Inventors: Alexandros Moisiadis, Mohnish Anumala, Debin Zhang, Lawrence James DiBurro, Shu Ching Shieh
  • Publication number: 20120110370
    Abstract: A method and system to provide a highly available file system in a directly attached storage (DAS). The storage is directly attached to a computer system that has an inactive operating system. A hardware module in the computer system receives a network command to access the file system. The hardware module determines a physical location of data blocks to be accessed in the storage. According to the network command, the hardware module accesses the data blocks in the storage.
    Type: Application
    Filed: October 27, 2010
    Publication date: May 3, 2012
    Applicant: Red Hat Israel, Ltd.
    Inventors: Shahar Havivi, Amos Benari
  • Publication number: 20120110369
    Abstract: A method for recovering data when corrupted data from a source is detected includes identifying data corrupted as a result of using the corrupted data by tracing propagation of the corrupted data to provide identified corrupted data, and repairing the identified corrupted data to provide repaired data. The propagation of the corrupted data is traced from one domain to another. Data in both domains is repaired. A wrapper is provided for the source. Calls into and out of the source are intercepted by the wrapper. Calls of a plurality of different domains are intercepted by the wrapper. A wrapper is provided for a process. External service calls of the process are intercepted by the wrapper. The wrapper recreates a process flow followed by the process in accordance with the corrupted data. A wrapper is provided for a database. Accesses of the database are intercepted by the wrapper.
    Type: Application
    Filed: October 27, 2010
    Publication date: May 3, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Marcus A. Tylutki
  • Patent number: 8171475
    Abstract: Method for issuing and monitoring a remote batch job, method for processing a batch job, and system for processing a remote batch job. The method for issuing and monitoring a remote batch job includes formatting a command to be sent to a remote server to include a sequence identification composed of an issuing server identification and a time stamp, forwarding the command from the issuing server to the remote server for processing, and determining success or failure of the processing of the command at the remote server. When the failure of the processing of the command at the remote server is determined, the method further includes instructing the remote server to retry the command processing.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: May 1, 2012
    Assignee: International Business Machines Corporation
    Inventor: Tsunehiro Kajita
  • Patent number: 8171336
    Abstract: A method for protecting a secured real time clock module, the method includes: locking multiple input ports of the secured real time clock module if the multiple input ports of the secured real time clock module are idle during at least a first duration; unlocking the multiple input ports of the secured real time clock module if a predefined high frequency code is received over a control input port of the secured real time clock module; and providing a secured real time clock signal when the multiple input ports of the secured real time clock module are locked and when the multiple input ports of the secured real time clock module are unlocked; wherein changes in a supply voltage results in a supply voltage induced changes of an input signal provided to an input port of the secured real time clock module; wherein a maximal frequency of the supply voltage induced changes of the input signal is lower than the high frequency of the predefined high frequency code.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: May 1, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Michael Priel, Dan Kuzmin, Amir Zaltzman
  • Patent number: 8166285
    Abstract: Provided are a booting method of updating software components installed in a system and recovering from an error that occurs in an update, a method and system for automatically updating the software and recovering from the error, and a computer readable recording medium storing the method. The master boot record and the backup boot record are used to stably update a kernel and effectively recover from an update error. The component configuration database is used to update a plurality of software components including a kernel in a transaction, and perfectly recover from an update error.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: April 24, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jong-suk Lee
  • Patent number: 8165743
    Abstract: A high-reliability controller for inverter is provided with a simple configuration. The controller for inverter includes a CPU 14 controlling energy of a vehicle, a CPU 15 controlling a power generation amount or an assist amount of a first motor 26, a CPU 16 controlling a power generation amount or an assist amount of a second motor 27, a regulator 8 generating power supplied to the CPUs 14, 15 and 16, a first inverter 23 controlled by the CPU 15, a second inverter 24 controlled by the CPU 16, and a communication line 17 that connects the CPUs 14 to 16. The first inverter 23 and the second inverter 24 are controlled in a cooperative or an independent manner.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: April 24, 2012
    Assignee: Hitachi, Ltd.
    Inventor: Katsuya Oyama
  • Patent number: 8161316
    Abstract: A method is used in managing loop interface instability. It is determined that a loop has excessive intermittent failures. It is determined, based on whether the intermittent failures are detectable on another loop, whether the cause of the excessive intermittent failures is within a specific category of components. A search procedure is executed that is directed to the specific category of components, to isolate the cause of the excessive intermittent failures.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: April 17, 2012
    Assignee: EMC Corporation
    Inventors: Michael Manning, Ashok Tamilarasan, Naizhong Chiu
  • Patent number: 8161311
    Abstract: An apparatus and method for fault-tolerant and spread spectrum clocking. In one embodiment a master clock synthesizer circuit generates an output clock signal of varying frequency within a predetermined range of frequencies. A slave clock synthesizer circuit is provided to track the output clock signal generated by the master clock synthesizer circuit. If the master clock synthesizer circuit fails or generates an invalid output clock signal, the slave clock synthesizer circuit takes over and functions as the master clock synthesizer circuit. In one embodiment a method of fault-tolerant spread spectrum clocking includes generating a first digital data stream; receiving the first digital data stream, a first input reference signal and a first clock signal in a master clock synthesizer circuit; generating an first output clock signal of varying frequency by the master clock synthesizer circuit in response to the first digital data stream and the first clock signal.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: April 17, 2012
    Assignee: Stratus Technologies Bermuda Ltd
    Inventor: Garth Dylan Wiebe
  • Publication number: 20120089861
    Abstract: An approach to detecting processor failure in a multi-processor environment is disclosed. The approach may include having each CPU in the system responsible for monitoring another CPU in the system. A CPUn reads a timestampn+1 created by CPUn+1 which CPUn is monitoring from a shared memory location. The CPUn reads its own timestampn and compares the two timestamps to calculate a delta value. If the delta value is above a threshold, the CPUn determines that CPUn+1 has failed and initiates error handling for the CPUs in the system. One CPU may be designated a master CPU, and be responsible for beginning the error handling process. In such embodiments, the CPUn may initiate error handling by notifying the master CPU that CPUn+1 has failed. If CPUn+1 is the master CPU, the CPUn may take additional steps to initiate error handling, and may broadcast a non-critical interrupt to all CPUs, triggering error handling.
    Type: Application
    Filed: October 12, 2010
    Publication date: April 12, 2012
    Applicant: International Business Machines Corporation
    Inventors: Charles S. Cardinell, Roger G. Hathorn, Bernhard Laubli, Timothy J. Van Patten
  • Publication number: 20120089862
    Abstract: Provided are techniques for determining a recovery time for a resource in a heterogeneous computing environment comprising interdependent resources. A graph for the resource representing all sequence dependencies and all group relations are created. The recovery time may be a cumulative startup time or a cumulative shutdown time of the resource considering interdependencies of the resource to other resources. The recovery time for all support resources having sequence dependencies with the resource is calculated and each node representing the support resources are removed from the graph. Then the recovery time for all member resources left in the graph that have group relations with the resource is calculated per a group type of the resource. The recovery time for the resource is a sum of the recovery time of all support resources, the recovery time of all member resources, and a unit recovery time of the resource.
    Type: Application
    Filed: October 10, 2011
    Publication date: April 12, 2012
    Applicant: International Business Machines Corporation
    Inventors: Thomas Lumpp, David B. Peterson, Wolfgang Schaeberle, Juergen Schneider, Isabell Schwertle
  • Publication number: 20120089860
    Abstract: A method of analyzing an occurrence of an error in a computer program executing on a data processing system includes receiving data that are associated with an execution leg of the computer program at the time of the error and restricting access to at least a portion of the data associated with the execution leg of the computer program based on an identification of the portion of the data associated with the execution leg of the computer program as being sensitive information.
    Type: Application
    Filed: October 11, 2010
    Publication date: April 12, 2012
    Inventors: Arthur Zaifman, John Mocenigo
  • Patent number: 8156392
    Abstract: An apparatus, system, and method are disclosed for bad block remapping. A bad block identifier module identifies one or more data blocks on a solid-state storage element as bad blocks. A log update module writes at least a location of each bad block identified by the bad block identifier module into each of two or more redundant bad block logs. A bad block mapping module accesses at least one bad block log during a start-up operation to create in memory a bad block map. The bad block map includes a mapping between the bad block locations in the bad block log and a corresponding location of a replacement block for each bad block location. Data is stored in each replacement block instead of the corresponding bad block. The bad block mapping module creates the bad block map using one of a replacement block location and a bad block mapping algorithm.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: April 10, 2012
    Assignee: Fusion-IO, Inc.
    Inventors: David Flynn, John Strasser, Jonathan Thatcher, David Atkisson, Michael Zappe, Joshua Aune, Kevin Vigor
  • Patent number: 8156082
    Abstract: System and methods for temporary data management in shared disk cluster configurations is described. In one embodiment, a method for managing temporary data storage comprises: creating a global temporary database accessible to all nodes of the cluster on shared storage; creating a local temporary database accessible to only a single node (owner node) of the cluster; providing failure recovery for the global temporary database without providing failure recovery for the local temporary database, so that changes to the global temporary database are transactionally recovered upon failure of a node; binding an application or database login to the local temporary database on the owner node for providing the application with local temporary storage when connected to the owner node; and storing temporary data used by the application or database login in the local temporary database without requiring use of write ahead logging for transactional recovery of the temporary data.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: April 10, 2012
    Assignee: Sybase, Inc.
    Inventors: Ajay Kumar Srivastava, Raj K. Rathee, Yanhong Wang
  • Patent number: 8156393
    Abstract: To provide a memory system which determines a memory state such as an exhaustion level and allows a memory to be efficiently used. The memory system includes a NAND type flash memory 1 in which data can be electrically written/erased, a nonvolatile memory 2 which counts the number of erase operations of the NAND type flash memory 1 and retains the number of erase operations and a maximum number of erase operations, and a controller 3 which has a connection interface 31 to be given a self-diagnosis command from a computer 4, and retrieves the number of erase operations and the maximum number of erase operations from the nonvolatile memory 2 based on the self-diagnosis command and outputs the number of erase operations and the maximum number of erase operations to the computer 4 through the connection interface 31.
    Type: Grant
    Filed: November 28, 2007
    Date of Patent: April 10, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasushi Nagadomi, Daisaburo Takashima, Kosuke Hatsuda, Shinichi Kanno
  • Patent number: 8156319
    Abstract: A method and apparatus for self-monitoring to identify an occurrence of a threshold and rebooting in response to the occurrence of the threshold is provided. In an embodiment, a data processing apparatus comprises one or more processors; logic coupled to the one or more processors and comprising one or more stored sequences of instructions which, when executed by one or more processors, cause the one or more processors to obtain a threshold associated with the apparatus; self-monitor the apparatus to identify an occurrence of the threshold; and self-reboot the apparatus responsive to the occurrence of the threshold.
    Type: Grant
    Filed: August 13, 2008
    Date of Patent: April 10, 2012
    Assignee: Cisco Technology, Inc.
    Inventors: Alexander Clemm, Junekang Yang, Steve Chen-Lin Chang, Jiabin Zhao, Shyyunn Sheran Lin
  • Patent number: 8156414
    Abstract: Disclosed are systems and methods for reconstructing a string comprising characters given multiple strings that may contain one or more errors. In embodiments, pairwise comparisons of strings within a set of candidate strings that may contain errors is performed so that measures related to similarity between the strings in each pair may be calculated. In embodiments, an alignment and voting method using at least some of the similarity measures may be employed to generate a reconstructed string. In embodiments, the reconstructed string may be validated, and in embodiments, its characters may be converted to another encoding, if necessary.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: April 10, 2012
    Assignee: Seiko Epson Corporation
    Inventors: Ali Zandifar, Jing Xiao
  • Publication number: 20120084596
    Abstract: A monitoring circuit monitors for the occurrence of a failure event on a data bus. The monitoring circuit includes a failure detection circuit for detecting the occurrence of the failure event within a device coupled to the data bus. An isolation circuit isolates the device from the data bus in response to the occurrence of the failure event.
    Type: Application
    Filed: May 11, 2011
    Publication date: April 5, 2012
    Applicant: EMC CORPORATION
    Inventor: Sherman Shan Chen
  • Publication number: 20120084595
    Abstract: A method, article of manufacture, and apparatus for restoring data. In some embodiments, this includes determining an object to be recovered, determining a representation of the object, and requesting the representation of the object from a data resource system. In some embodiments, the representation of the object is a hash value of the object. In some embodiments, the representation of the object is a segment of the object.
    Type: Application
    Filed: September 30, 2010
    Publication date: April 5, 2012
    Applicant: EMC CORPORATION
    Inventors: Michael John DUTCH, Christopher Hercules CLAUDATOS, Mandavilli Navneeth RAO
  • Patent number: 8149691
    Abstract: A multi-chassis network device sends state information to internal consumers within the multi-chassis device via a hierarchical distribution. As one example, a primary master routing engine within a control node of a multi-chassis router forwards state information to local routing engines within other chassis, which in turn distribute the state information to consumers on each chassis. Each local routing engine defers sending acknowledgement to the master routing engine until acknowledgements have been received from all consumers serviced by the local routing engine. Embodiments of the invention may reduce control plane data traffic and convergence times associated with distribution of state updates in the multi-chassis network device.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: April 3, 2012
    Assignee: Juniper Networks, Inc.
    Inventors: Bharani Chadalavada, Umesh Krishnaswamy, Raj Tuplur
  • Patent number: 8151147
    Abstract: In accordance with at least some embodiments, a system comprises a plurality of partitions, each partition having its own error handler. The system further comprises a plurality of resources assignable to the plurality of partitions. The system further comprises management logic coupled to the plurality of partitions and the plurality of resources. The management logic comprises an error management tool that synchronizes operation of the error handlers in response to an error.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: April 3, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Anurupa Rajkumari, Andrew C. Walton, Howard Calkin
  • Patent number: 8151122
    Abstract: In a method for managing power budgets among a plurality of electronic components having respective power budgets, at least part of the power budget of an electronic component that has failed is dynamically re-allocated to at least one of the other plurality of electronic components, to thereby increase performance of the plurality of electronic components.
    Type: Grant
    Filed: July 5, 2007
    Date of Patent: April 3, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Parthasarathy Ranganathan, Nidhi Aggarwal, Norman Paul Jouppi
  • Patent number: 8145936
    Abstract: A system and method for automatic disaster recovery of a computing appliance including reconstruction of its previous operational state. A configuration bundle that includes configuration data, software revision level and a list of system updates is used to recover the device's operation state. The system and method can also be utilized to recover a not fully functional member of a clustered computing system from the configuration information stored on other members of the cluster.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: March 27, 2012
    Assignee: McAfee, Inc.
    Inventors: David Seelig, Stephen Czeck
  • Patent number: 8145336
    Abstract: Real-time assembly and part validation (or “containment”) and auto-disposition in a manufacturing environment. Validation and auto-disposition are performed in a real-time, proactive manner where the validation and auto-disposition processing are not coupled to the installation process. Validation problems or issues may therefore be identified and resolved before an assembly or part is needed for installation.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: March 27, 2012
    Assignee: International Business Machines Corporation
    Inventors: Ivory W. Knipfer, Fraser A. Syme, Matthew H. Zemke