Abstract: An encoder creates an (p,k,n) n-state codeword with p n-state symbols of which k n-state symbols are data symbols, an n-state symbol being represented by a signal with n>2, p>2 and k>(p?k). Intermediate states of an encoder in forward and in reverse direction are provided in a comparative n-state expression and implemented on a processor. A plurality of signals representing a codeword with at least one n-state symbol in error is processed by the processor by evaluating the comparative n-state expression. A partial result of an expression is determined after a symbol has been received. An error location and an error magnitude or error value are determined. The error is corrected by the processor.

Abstract: A method of transmitting an information sequence in a message includes embedding a first information sequence into an original payload of the message to produce an augmented payload and generating an original error check code using the augmented payload, the original error check code derived from the first information sequence. The method also includes transmitting the message, the message including the original payload and the original error check code.

Abstract: A method of data classification for use in a wireless communication system includes obtaining decoder metrics from a decoder. The decoder metrics correspond to data generated by the decoder. The decoder metrics include a symbol error rate (SER) and an energy metric (EM). The method also includes classifying the data into a first category if the data fails a cyclic redundancy check (CRC) check, into a second category if the data passes the CRC check and is determined to be unreliable, or into a third category if the data passes the CRC check and is determined to be reliable. A reliability of the data is determined based on the decoder metrics and an EM threshold.

Abstract: An electronic device may utilize or support adaptive use of forward error correction (FEC) in a resource-constrained network. The adaptive FEC use may comprise determining whether use of FEC encoding in transmissions from another electronic device to the electronic device is necessary, desirable, and/or feasible, and when use of FEC encoding is deemed feasible and either necessary or desirable, instructing the another electronic device to utilize FEC encoding when transmitting signals destined for the electronic device. Use of FEC encoding may be determined to be feasible, necessary and/or desirable based on power loss associated with the communications from the another electronic device; based on determination of latency associated with the communications from the another electronic device; and/or based on power and/or processing related resources in the electronic device. The electronic device may separately and selectively apply FEC encoding to transmissions to the another electronic device.

Abstract: The present invention is a device for detecting short burst errors. The device includes a first signal input, wherein the first signal input is configured to receive a first signal. The device includes a second signal input, wherein the second signal input is configured to receive a second signal. The device includes a logic gate, wherein the logic gat is operable for receiving the first signal vial the first signal input, receiving the second signal via the second signal input, and generating a logic output gate signal based on the received first signal and the second signal. Furthermore, the device includes a filter, wherein the filter is configured for receiving the logic output gate signal from the logic gate and generates a filter output signal based upon the received logic output gate signal, wherein the filter output signal is operable for flagging errors.

Abstract: A method and apparatus for transmitting in a communication/broadcasting system is provided. The method includes determining to use an additional parity technique, generating an Nth parity check matrix, where N is an integer, performing Low Density Parity Check (LDPC) encoding using the Nth parity-check matrix, modulating a codeword corresponding to the Nth parity-check matrix, and transmitting the modulated codeword.

Abstract: A data transmission system includes at least one transmission line. A sender is configured to send data frames to the at least one transmission line and a recipient is configured to receive the data frames from the at least one transmission line. The sender and the recipient are both configured to determine a check sum based on a plurality of corresponding data frames that are sent to and, respectively, received from the at least one transmission line. A check sum comparing unit is configured to receive and to compare the check sum determined by the sender and the corresponding check sum determined by the recipient. The check sum comparing unit is also configured to signal a transmission error or initiate a safety function when the check sums compared are not equal.

Abstract: According to embodiments, an error correction decoder carrying out iterative decoding for coded data based on LDPC code. The decoder comprises a generation unit and an inversion, control unit. The generation unit is configured to generate an inversion node list listing variable nodes connected to check nodes not satisfying a parity check when a code word cannot be obtained after carrying out the iterative decoding a first number of iterations. The inversion control unit is configured to choose a variable node which is a target for inversion from among the variable nodes listed in the inversion node list, and to carry out inversion processing which includes updating an input likelihood of the variable node which is the target for inversion temporarily by inverting a sign of an a posteriori likelihood of the variable node which is the target for inversion.

Abstract: Disclosed a method for validating a data packet by a network processor supporting a first, network protocol and a second network protocol and utilizing shared hardware. The network processor receives a data packet: identities a network packet protocol for the data packet; and processes the data packet according to the network packet protocol comprising: updating a first register with a first partial packet length specific to the first network protocol; updating a second register with a second partial packet length specific to the second network protocol; and updating a third register with a first checksum computed from fields independent of the network protocol. The method produces a second checksum utilizing a function that combines values from the first register, the second register, and the third register. The method validates the data packet by comparing the data packet checksum to the second checksum.

Abstract: An approach for reliably communicating over a satellite in support of a communication service including, for example, as direct broadcast satellite and data service, is disclosed. An input message is encoded, yielding a structured Low Density Parity Check (LDPC) coded message. The coded message is modulated according to a high order modulation scheme that has a signal constellation representing more than two symbols per signaling point—e.g., 8-PSK (Phase Shift Keying) and 16-QAM (Quadrature Amplitude Modulation). The system includes a transmitter configured to propagate the modulated signal over the satellite. The above approach is particularly applicable to bandwidth constrained communication systems requiring high data rates.

Abstract: A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a plurality of first data blocks, respectively, each of the first data blocks containing one of the data items and a corresponding detecting code, a second correcting code generators configured to generate a second correcting code to correct errors in a second data block, the second data block containing the first data blocks, and a semiconductor memory configured to nonvolatilely store the second data block, the first correcting codes, and the second correcting code.

Abstract: An object of the invention of the present patent application is to provide a frame synchronization technique that will not be prone to enter a frame asynchronization state even if a bit error occurs over a transmission path and the technique serves to convert a received optical signal into an electric signal, correct an error of the electric signal so as to cause a frame synchronization establishment state to occur, count the successive number of synchronization words that have bit errors in excess of an allowable value in an error-correction-coded electric signal after the frame synchronization establishment state has occurred, and determine that a frame asynchronization state has occurred when the successive number reaches a predetermined number.

Abstract: A semiconductor apparatus includes a bus inversion information (DBI) processing unit configured to, when receiving multi-bit data, calculating DBI information of the data, and outputting a plurality of DBI flag signals, generate the plurality of DBI flag signals such that each DBI flag signal reflects DBI information of predetermined bits of the data, a first CRC processing unit configured to calculate cyclic redundancy check (CRC) information using the multi-bit data and partial DBI flag signals calculated among the plurality of DBI flag signals and output a plurality of CRC signals, and a second CRC processing unit configured to output CRC codes using the plurality of CRC signals and remaining DBI flag signals calculated among the plurality of the DBI flag signals.

Abstract: A wireless dual tire pressure monitor and equalizer apparatus is adapted to install on a vehicle dual wheel and connect to the two tire valve stems. The apparatus includes capabilities of monitoring individual tire pressure and transmitting tire data to be received by a remote receiver, equalizing pressure in the two tires when pressure is above a selected level, isolating the two tires when pressure is below the selected level, and transmitting warning signals upon detection of low pressure and air leaks. The apparatus further includes capability to integrate with available tire inflation systems for providing tire pressure monitoring and equalizing functionalities.

Abstract: A decoder performs forward error correction based on quasi-cyclic regular column-partition low density parity check codes. A method for designing the parity check matrix reduces the number of short-cycles of the matrix to increase performance. An adaptive quantization post-processing technique further improves performance by eliminating error floors associated with the decoding. A parallel decoder architecture performs iterative decoding using a parallel pipelined architecture.

Abstract: Various embodiments include apparatus, methods, and systems that operate to extend the processes of reading, modifying, and writing data stored in or being provided to a memory array without interrupting a continual stream of data to be written into the memory array. Embodiments may include an apparatus comprising a memory array, and an error code module coupled to the memory array with a data buffer having a plurality of data burst registers operable to receive a plurality of data bursts to be written to the memory array on a corresponding plurality of consecutive clock cycles. The error code module is operable to perform a read/modify/write process on each of the plurality of data bursts within a time period no longer than a period of two consecutive cycles of the plurality of consecutive clock cycles.

Abstract: A method includes accepting input including at least part of a codeword that has been encoded by an ECC defined by a set of parity check equations. The codeword includes data bits and parity bits. A decoding process is applied to the codeword using the data bits and only a first partial subset of parity bits in the input, and using only a second partial subset of equations. Upon a failure to decode the codeword using the partial subsets, the codeword is re-decoded using the data bits and all parity bits in the input, and using all equations. The set of parity check equations is defined such that any parity bit in the codeword appears in multiple equations, and any parity bit in the first partial subset of the parity bits appears in a plurality of equations in the second partial subset of the equations.

Abstract: A memory system and method of operating the same is described, where the memory system is used to store data in a RAIDed manner. The stored data may be retrieved, including the parity data so that the stored data is recovered when the first of either the stored data without the parity data, or the stored data from all but one memory module and the parity data, has been received. The writing of data, for low write data loads, is managed such that only one of the memory modules of a RAID stripe is being written to, or erased, during a time interval.

Abstract: A memory device is configured to generate a signal having a temperature compensation function. The device includes a mode register configured to store error detection and correction (EDC) mode data, and an EDC pattern generator configured to receive pattern information and period information included in the mode data and to generate an EDC pattern signal based on the pattern information and the period information. The EDC pattern signal is a periodic signal obtained by repeating a signal pattern based on the pattern information at a periodic rate corresponding to a signal period based on the period information. In some cases, the EDC pattern signal may be disabled during a portion of the signal period.

Abstract: A method and an apparatus for are provided. In a method for transmitting signaling information in a digital broadcasting system, a transmitter transmits signaling information, and an information bit stream is received. The received information bit stream is encoded and a parity bit is added. The parity bit is punctured such that parity bits of different patterns are formed between adjacent frames.

Abstract: According to one embodiment, a data storage device includes a read module, an ECC module, and a controller. The read module is configured to read data to be accessed and designation data designating the data, from nonvolatile memories. The ECC module is configured to perform an error check and correction process on the data and designation data read by the read module. The controller is configured to correct the designation data if the ECC module cannot correct the designation data and to perform an error detection process based on the designation data corrected.

Abstract: Methods and systems for soft-decision non-binary low-density parity-check (LDPC) coding for ultra-long-haul optical transoceanic transmissions are provided. A receiver includes one or more maximum a posteriori (MAP) equalizers configured to decode one or more symbols of an encoded input stream to provide one or more symbol log-likelihood ratios (LLRs). One or more LLR estimators are configured to estimate the log-likelihood ratios of the one or more symbol LLRs to provide one or more bit LLRs. One or more non-binary LDPC decoders are configured to decode the input stream using the one or more bit LLRs to recover an original input stream.

Abstract: A dual redundant process controller is provided. The controller comprises a first processor, memory, and instance of a process control application stored in the first memory. The controller further comprises a second processor, memory, and instance of the process control application stored in the second memory.

Abstract: A data storage system includes a data storage array configured for de-duplication of duplicate data therein by: identification of a plurality of portions of data; a comparison of each portion of the data to identify duplicate data and identification of a link associated with each duplicate data; a determination of whether a Hamming link-separation-distance of the identified link is greater than twice a Hamming radius of an error correction code in the data storage system; and replacement of the duplicate data with the identified link when it is determined that the Hamming link-separation-distance is greater than twice the Hamming radius.

Abstract: A dual redundant process controller is provided. The controller comprises a process control application that executes on a first and a second module. When executed by the first module, a first application instance writes a first synchronization information to the second module, reads a second synchronization information from the first module, and, when the second disagrees with the first synchronization information after passage of a time-out interval, performs a resynchronization function; and wherein, when executed by the second module, the second application instance writes the second synchronization information to the first module, reads the first synchronization information from the second module, and, when the first disagrees with the second synchronization information after passage of the time-out interval, performs the resynchronization function.

Abstract: Cooperative concatenated coding techniques are provided for wireless communications between at least two users and a base station. A network system employing cooperative concatenated coding includes cooperating user devices each configured to encode and transmit at least a portion of a joint message. The joint message includes at least a portion of a first message from a first cooperating user device and at least a portion of a second message from a second cooperating user device. An embodiment includes encoding a first message from a first cooperating user, receiving a second message from a second cooperating user and decoding the second message. The methodology also includes re-encoding at least a portion of the decoded message with at least a portion of the first message to form a combined message, and then transmitting at least a portion of the combined message.

Abstract: An error correction method and device and a communication system using them, including an LDPC code generation method capable of adjusting an encoding rate of an LDPC code in a variable manner while leaving the length of the code constant by use of an efficient encoding method or mechanism supporting a variable encoding rate, so that the encoding rate of the LDPC code can be adjusted without changing the code length. An error correction method includes a row dividing to divide each of a part or all of rows into two or more rows based on one parity check matrix, and a code construction to construct a plurality of LDPC codes with arbitrary code rates, respectively.

Abstract: According to one embodiment, an error correcting decoder includes a first error correction decoding module, an interleaving module, a delay module, a second error correction decoding module, and a corrector. The first error correction decoding module performs a first error correction decoding to a received signal in accordance with a broadcasting system. The interleaving module rearranges a data array of an output of the first error correction decoding module in a second order. The data array is ordered in a first order which is reverse to the second order. The delay module delays the received signal by a processing time of the first error correction decoding module. The second error correction decoding module performs a second error correction decoding to an output of the interleaving module and an output of the delay module. The corrector configured to correct a delay of an output of the second error correction decoding module based on a packet position defined by the broadcasting system.

Abstract: A method for forward error correction (FEC) includes obtaining information on a type of a current frame, where the current frame includes a key frame and a non-key frame; determining a coding redundancy of the current frame according to the type of the current frame and a redundancy coding strategy, where the coding redundancy of the key frame is greater than that of the non-key frame; and using the determined coding redundancy to generate an FEC code for the current frame. The method is applicable to circumstances where FEC is performed for media data of various coding formats.

Abstract: A method for reporting uplink control information (UCI) on a user equipment (UE) is described. It is determined a number of bits in a sequence of bits for transmission is greater than 11 and less than or equal to 21. The sequence of bits for transmission is segmented into a first segment and a second segment using a floor function. The first segment is encoded using a first Reed-Muller encoder. The second segment is encoded using a second Reed-Muller encoder.

Abstract: A method in a communication system, where a systematic code obtained by systematic encoding of information bits having dummy bits inserted and by deletion of the dummy bits from results of the systematic encoding is transmitted. On a receiving side, the deleted dummy bits are inserted into the received systematic code and then decoded. The method includes: deciding a size of dummy bits for insertion into information bits; segmenting the information bits into a number of code blocks when a bit size of the information bits is greater than a stipulated size; inserting dummy bits into each block of the segmented information bits in conformity with a dummy bit insertion pattern; performing systematic encoding of each block of the information bits into which the dummy bits are inserted, and deleting the dummy bits from the results of the systematic encoding to generate a systematic code.

Abstract: A data processing method for a hybrid automatic repeat request (HARQ) is provided. Specifically, modulation can be performed according to a constellation rearrangement version (CRV) to generate a sub-packet for an incremental redundancy HARQ (IR-HARQ). When a constellation symbol modulated according to the CRV is segmented into an even symbol and an odd symbol for a plurality of transmit antennas, an identical CRV is determined for a pair of the even symbol and the odd symbol subsequent to the even symbol. When the constellation symbol modulated according to the CRV is transmitted to a receiving side, a newly generated sub-packet is retransmitted upon receiving a non-acknowledgement (NACK) signal.

Abstract: The disclosure discloses an alarm report method for cascaded equipments, comprises: after receiving link alarm information, a radio equipment determines the source of the link alarm information; the radio equipment selects one link alarm information report mode from multiple predetermined link alarm information report modes according to the result of determining the source; the radio equipment reports the link alarm information to a Radio Equipment Controller (REC) according to the selected link alarm information report mode. The disclosure further discloses an alarm report system and device for cascaded equipments. The disclosure can effectively lower the alarm information processing complexity of an REC and the correlation of alarms.

Abstract: A wireless apparatus and a method thereof are provided. The wireless apparatus comprises a receiving unit and a processing unit. The receiving unit is configured for receiving a packet which comprises a data portion and a cyclic redundancy check portion from the base station. The processing unit connected to the receiving unit which is configured for generating a de-masked packet by de-masking the cyclic redundancy check portion and at least one selected bit of the data portion by a plurality of predetermined bits, determining that the de-masked packet pass a cyclic redundancy check, and accepting the packet after the determination.

Abstract: A method for communication includes encoding data using at least one Error Correction Code (ECC) to generate first and second output data streams. The first output data stream is processed to generate a first output signal, which has a first acquisition time. The second output data stream is processed to generate a second output signal, which has a second acquisition time that is smaller than the first acquisition time. The first and second output signals are transmitted simultaneously over a communication channel.

Abstract: A device for protecting a data word against data corruption includes first and second determiners. The first determiner is configured to determine an error correction code cvA associated with a data word a so that cvA=aAT, with A being a generator matrix of a linear systematic base correction code, the columns of which enable performance of an x-bit error correction on replica of the data word a and the associated error correction code cvA. The second determiner is configured to determine an extended error correction code cvE so that (cvA|cvE)=aFT, with F being an extended generator matrix F = ( A E ) of an extended linear systematic correction code, the columns of which enable, using the extension error correction code cvE, performance of an y-bit error correction, with y>x, on a replica of the data word a and the associated error correction code cvA.

Abstract: A digital broadcast system having storing resistance to errors generated during the transmission of mobile service data, and a data processing method are disclosed. The digital broadcast system additionally encodes mobile service data. As a result, the mobile service data has strong resistance to a channel variation and noise, and at the same time the system can quickly cope with the channel variation.

Abstract: A survivor path memory is provided for a Viterbi detector. The survivor path memory comprises a plurality of columns, each associated with a different time step, and an input processor. Each column comprises a flip flop for storing one bit or portion of a bit sequence associated with a Viterbi state; and a multiplexer for each state controlled by a case signal indicating a time step, the multiplexer selecting a state from a previous time step, wherein an output of the multiplexer of a given state is connected to at least one data input of a flip flop of the given state. The input processor generates a control signal that exchanges one or more pointers based on a trellis structure, wherein each of the pointers points to one of the flip flops.

Abstract: An apparatus and method are provided for transmitting and receiving in a communication/broadcasting system. The method includes generating a codeword including a first parity bit using a first parity-check matrix, generating an additional parity bit based on a second parity-check matrix, the second parity-check matrix being an extension of the first parity-check matrix, and transmitting the codeword and the additional parity bit.

Abstract: The present invention relates to a home appliance diagnosis system and to a method for operating same, wherein product information is output in a predetermined signal sound by a home appliance product, and the signal sound is transmitted via a communication network connected to a remote service center to enable the service center to easily check the state of the home appliance product. In addition, the product information is encoded into a predetermined format and modulated to enable sound to be outputted by the home appliance product, thereby preventing noise or signal errors. The present invention enables stable signal modulation and accurate sound output, and enables the easy recovery of the sound transmitted to the service center via the communication network.

Abstract: According to one embodiment, an information reproduction apparatus includes a calculator, selector, and decoder. The calculator calculates parity-check passing ratios based on a check matrix of an LDPC code for code word candidates included in a reproduced signal. The selector selects one of the code word candidates based on the parity-check passing ratios calculated by the calculator. The decoder decodes the code word candidate selected by the selector by an iterative decoding process.

Abstract: Systems and methods for decoding data using a decoder that includes a primary decoder and an auxiliary decoder are provided. A codeword is retrieved from a storage device. A primary decoder attempts to decode the codeword using hard data associated with the codeword. If the primary decoder fails, an indication of the failure may be received by a decoder controller, which activates an auxiliary decoder. The auxiliary decoder attempts to decode the codeword using either hard data or soft data associated with the codeword. The primary decoder is designed to consume less power, consume less silicon area, and have a higher throughput than the auxiliary decoder. The primary decoder is configured to have a higher probability of successfully decoding a codeword, stored in the storage device, in the first attempt to decode the codeword, than failing and requiring the auxiliary decoder to decode the codeword.

Abstract: In an example embodiment, there is described herein a methodology were the Forward Error Correction (FEC) data for a data stream is distributed into a plurality of FEC sub-streams. Subscribers to the data stream indicate which of the plurality of FEC sub-streams should be provided to them. The distribution of FEC sub-streams are limited to subscribed FEC sub-streams. FEC sub-streams with no subscribers are not forwarded beyond a distribution point such as an access point (AP).

Abstract: A method and system for communicating signal data in GNSS system using LDPC convolution codes. The method involves, at transmitting end, formatting signal data into a set of subframes. Each subframe of the signal data can be encoded in accordance with a parity check matrix defining Tanner graph representation of LDPC convolution codes. The encoded signal data can be interleaved and added with a Sync word field to transmit an interleaved block of encoded signal data through a communication channel. At receiving end, the interleaved block of encoded signal data can be de-interleaved after it is received from the communication channel. The Tanner Graph shows the connectivity in time invariant parity check matrix. A message passing technique is used to decode the LDPCCC encoded message. The encoded signal data can be decoded through the message passing technique to obtain the signal data primitively transmitted at the transmitting end.

Abstract: For use in a wireless communication network, a transmitter is configured to encode information. The transmitter includes a cyclic redundancy check (CRC) encoder configured to encode a physical broadcast channel (PBCH) message using a cyclic redundancy check. The transmitter also includes a timing dependent cyclic shift block configured to encode information in the PBCH message. The transmitter further includes a quasi-cyclic low-density parity-check (QC-LDPC) encoder configured to encode the PBCH message using a QC-LDPC.

Abstract: Operational parameter adaptable LDPC (Low Density Parity Check) decoder. A novel means is presented by which LDPC coded signal can be decoded, and any one or more operational parameters can be adjusted during the decoding processing. For example, the original information extracted from a received LDPC coded signal (e.g., log likelihood ratios (LLRs)), can be modified during (or before) the iterative decoding processing performed in accordance with decoding an LDPC coded signal. Such modification of an operational parameter can include any one or combination of scaling, compression (and expansion/decompression), adding an offset to or subtracting an offset from, scaling, rounding, and/or some other modification of an operational parameter. The bit (or variable) edge messages and/or the check edge messages can also undergo modification during decoding processing.

Abstract: Systems and methods are provided for selecting transmission parameters used in the transmission of a communication signal in a wireless communications device. In one embodiment, a computer-implemented method for determining a convolutional code constraint length and/or a modulation type is provided. The method includes obtaining a channel condition for a channel associated with transmission of the communication signal. Based at least in part on the channel condition, the method includes selecting a convolutional code constraint length and/or a modulation type for transmitting the communications signal. In some embodiments, the method also includes selecting a data rate for transmitting the communications signal. Other aspects, embodiments, and features are also claimed and described.

Abstract: A CRC (Cyclic Redundancy Check) code for a data message is created by placing an initial portion of the data message on a bus of width W bits consisting of an integral number N of segments of width S such that the initial portion of the message fills n complete segments, where n?N. A known bit pattern is placed on any segments preceding a start of the message as determined by a start indicator. A first intermediate CRC code is computed for the n segments of the initial portion by applying the W bits of the bus forming an input word to a CRC full processing circuit using a compensating constant to compensate for any known bit pattern preceding the initial portion of the message. Subsequent portions of the message width W are placed on the bus during subsequent bus cycles, and in each case a new first intermediate CRC code is computed on the W bits of the bus as input words using the current first intermediate CRC code as a seed input.

Abstract: LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices. An LDPC matrix corresponding to an LDPC code is employed within a communication device to encode and/or decode coded signals for use in any of a number of communication systems. The LDPC matrix is composed of a number of sub-matrices and may be partitioned into a left hand side matrix and a right hand side matrix. The right hand side matrix may include two sub-matrix diagonals therein that are composed entirely of CSI (Cyclic Shifted Identity) sub-matrices; one of these two sub-matrix diagonals is located on the center sub-matrix diagonal and the other is located just to the left thereof. All other sub-matrices of the right hand side matrix may be null sub-matrices (i.e., all elements therein are values of zero “0”).

Abstract: A pre-decoded tail-biting convolutional code (TBCC) decoder and a decoding method thereof are provided. The decoder includes a pre-decoder, a storage module, and a control module. The pre-decoder receives a current state, a neighboring state, and a current path status corresponding to sequential data encoded in TBCC, generates predicted decoded bits, and determines whether states corresponding to minimum path metrics of neighboring stages are in continuity according to the current state, the neighboring state, and a current path status. The storage module is connected to the pre-decoder and stores the predicted decoded bits. The control module is connected to the storage module and the pre-decoder. In addition, the control module selects to output the decoded bits from the storage module when the continuity between the states corresponding to the minimum path metrics of the neighboring stages reaches a truncation length.