Abstract: The implementations described herein generally relate to a process kit suitable for use in a semiconductor process chamber, which reduces edge effects and widens the processing window with a single edge ring as compared to conventional process kits. The process kit generally includes an edge ring disposed adjacent to and surrounding a perimeter of a semiconductor substrate in a plasma chamber. A dimension of a gap between the substrate and the edge ring is less than about 1000 ?m, and a height difference between the substrate and the edge ring is less than about (+/?) 300 ?m. The resistivity of the ring is less than about 50 Ohm-cm.
Type:
Grant
Filed:
February 20, 2017
Date of Patent:
June 29, 2021
Assignee:
Applied Materials, Inc.
Inventors:
Olivier Joubert, Jason A. Kenney, Sunil Srinivasan, James Rogers, Rajinder Dhindsa, Vedapuram S. Achutharaman, Olivier Luere