Semiconductor device

Description

FIG. 1 is a top perspective view of a semiconductor device, showing our new design;

FIG. 2 is a front elevation view thereof;

FIG. 3 is a top plan view thereof;

FIG. 4 is a bottom plan view thereof;

FIG. 5 is a right side elevation view thereof;

FIG. 6 is a left side elevation view thereof; and,

FIG. 7 is a rear elevation view thereof.

The broken lines in the drawings illustrate portions of the semiconductor device, which form no part of the claimed design.

Claims

The ornamental design for a semiconductor device, as shown and described.