Gas Phase Etching Of Substrate Patents (Class 216/58)
  • Patent number: 8709265
    Abstract: Provided is a touch panel manufacturing method wherein the number of exposure masks needed for pattern formation is reduced, and a method for manufacturing a display device provided with a touch panel. A transparent conductive film layer (11) and a metal layer (12) are laminated on a transparent substrate (1), and the transparent conductive film layer (11) and the metal layer (12) are formed into predetermined electrode patterns, with use of one resist pattern. A protective film (13) covering the transparent conductive film layer (11) and the metal layer (12) is formed, and openings (14, 15, and 16) are provided at predetermined positioned in the protective film (13). By etching with use of the protective film (13) having the openings (14, 15, and 16), the metal layer (12) is removed so that the transparent conductive film layer (11) is exposed, whereby at least either touch electrodes (2) or connection terminals (5) are formed.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: April 29, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Katsunori Misaki
  • Patent number: 8709954
    Abstract: A wafer recycling method comprises varying a temperature and pressure conditions to remove a first semiconductor layer deposited on a wafer, removing a remaining semiconductor layer on the wafer through a chemical or physical process, and washing the wafer.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: April 29, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kyung Jun Kim, Hyo Kun Son
  • Patent number: 8703000
    Abstract: A slimming method includes transferring an object to be processed on which a patterned carbon-containing thin film is formed into a process chamber in an oxidation apparatus; and oxidizing and removing the surface of the carbon-containing thin film by an oxidizing gas while supplying moisture into the process chamber, to reduce widths of the protruded portions on the pattern of the carbon-containing thin film.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: April 22, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Jun Sato, Masayuki Hasegawa
  • Patent number: 8703617
    Abstract: The present application discloses provides a method for planarizing an interlayer dielectric layer, comprising the steps of: providing a multilayer structure including at least one sacrificial layer and at least one insulating layer under the sacrificial layer on the semiconductor substrate and the first gate stack, performing a first RIE on the multilayer structure, in which a reaction chamber pressure is controlled in such a manner that an etching rate of the portion of the at least one sacrificial layer at a center of a wafer is higher than that at an edge of the wafer, so as to obtain a concave etching profile; performing a second RIE on the multilayer structure to completely remove the sacrificial layer and a part of the insulating layer, so as to obtain the insulating layer having a planar surface which serves as an interlayer dielectric layer.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: April 22, 2014
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Huaxiang Yin, Qiuxia Xu, Lingkuan Meng, Tao Yang, Dapeng Chen
  • Patent number: 8696920
    Abstract: A method of fabricating a case for a portable electronic device includes: preparing a case preform; processing the inner surface of the case preform using a laser; and surface-treating the outer surface of the case preform, wherein the outer surface of the case preform shows fine prominences and depressions formed by the surface-treating of the outer surface of the case preform, and patterns formed by processing the inner surface of the case preform appear bumpily on the outer surface of the case preform.
    Type: Grant
    Filed: April 21, 2011
    Date of Patent: April 15, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Chul Jin, Yong-Wook Hwang, Seung-Chang Baek, Jong-Woo Kim, Hoon-Soo Park
  • Patent number: 8691103
    Abstract: A method of treating a workpiece is described. The method comprises computing correction data from metrology data related to a workpiece surface profile, adjusting the surface profile in accordance with the correction data using a gas cluster ion beam (GCIB), and further adjusting the surface profile by performing an etching process following the GCIB adjustment.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: April 8, 2014
    Assignee: TEL Epion Inc.
    Inventor: John J. Hautala
  • Patent number: 8691697
    Abstract: A method includes forming patterned lines on a substrate having a predetermined pitch. The method further includes forming spacer sidewalls on sidewalls of the patterned lines. The method further includes forming material in a space between the spacer sidewalls of adjacent patterned lines. The method further includes forming another patterned line from the material by protecting the material in the space between the spacer sidewalls of adjacent patterned lines while removing the spacer sidewalls. The method further includes transferring a pattern of the patterned lines and the another patterned line to the substrate.
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: April 8, 2014
    Assignee: International Business Machines Corporation
    Inventors: Roger A. Booth, Jr., Kangguo Cheng, Joseph Ervin, Chengwen Pei, Ravi M. Todi, Geng Wang
  • Patent number: 8691701
    Abstract: A method for forming etched features in a low-k dielectric layer disposed below the photoresist mask in a plasma processing chamber is provided. Features are etched into the low-k dielectric layer through the photoresist mask. The photoresist mask is stripped, wherein the stripping comprising at least one cycle, wherein each cycle comprises a fluorocarbon stripping phase, comprising flowing a fluorocarbon stripping gas into the plasma processing chamber, forming a plasma from the fluorocarbon stripping gas, and stopping the flow of the fluorocarbon stripping gas into the plasma processing chamber and a reduced fluorocarbon stripping phase, comprising flowing a reduced fluorocarbon stripping gas that has a lower fluorocarbon flow rate than the fluorocarbon stripping gas into the plasma processing chamber, forming the plasma from the reduced fluorocarbon stripping gas, and stopping the flow of the reduced fluorocarbon stripping gas.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: April 8, 2014
    Assignee: Lam Research Corporation
    Inventors: Bing Ji, Andrew D. Bailey, III, Maryam Moravej, Stephen M. Sirard
  • Patent number: 8685855
    Abstract: A tray for film formation by a CVD method includes a tray main body (2) and a supporting member (3) mounted on the tray main body (2) for supporting a silicon wafer (5). The supporting member (3) has a holding portion (3c), on which the silicon wafer (5) is directly placed. The holding portion (3c) has its lower surface (3d) apart from a surface (2a) of the tray main body that is opposed to and apart from the supported silicon wafer (5), whereby the thickness distribution of an oxide film formed on the silicon wafer can be made uniform. The tray has a structure for reducing a contact area between the supporting member (3) and the tray main body (2), with the holding portion (3c) having a tilted surface with its inner circumferential side closer to the tray main body surface (2a) that is opposed to the silicon wafer.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: April 1, 2014
    Assignee: Sumco Corporation
    Inventors: Takashi Nakayama, Tomoyuki Kabasawa, Takayuki Kihara
  • Patent number: 8685266
    Abstract: Monocyclic chlorine based inductively coupled plasma deep etching processes for the rapid micromachining of titanium substrates and titanium devices so produced are disclosed. The method parameters are adjustable to simultaneously vary etch rate, mask selectivity, and surface roughness and can be applied to titanium substrates having a wide variety of thicknesses to produce high aspect ratio features, smooth sidewalls, and smooth surfaces. The titanium microdevices so produced exhibit beneficially high fracture toughness, biocompatibility and are robust and able to withstand harsh environments making them useful in a wide variety of applications including microelectronics, micromechanical devices, MEMS, and biological devices that may be used in vivo.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: April 1, 2014
    Assignee: The Regents of the University of California
    Inventors: Emily R. Parker, Brian J. Thibeault, Marco F. Aimi, Masa P. Rao, Noel C. MacDonald
  • Patent number: 8679983
    Abstract: A method of suppressing the etch rate for exposed silicon-and-nitrogen-containing material on patterned heterogeneous structures is described and includes a two stage remote plasma etch. The etch selectivity of silicon relative to silicon nitride and other silicon-and-nitrogen-containing material is increased using the method. The first stage of the remote plasma etch reacts plasma effluents with the patterned heterogeneous structures to form protective solid by-product on the silicon-and-nitrogen-containing material. The plasma effluents of the first stage are formed from a remote plasma of a combination of precursors, including nitrogen trifluoride and hydrogen (H2). The second stage of the remote plasma etch also reacts plasma effluents with the patterned heterogeneous structures to selectively remove material which lacks the protective solid by-product. The plasma effluents of the second stage are formed from a remote plasma of a fluorine-containing precursor.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: March 25, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Yunyu Wang, Anchuan Wang, Jingchun Zhang, Nitin K. Ingle, Young S. Lee
  • Patent number: 8679985
    Abstract: A dry etching method for a silicon nitride film capable of improving throughput is provided. A dry etching method for dry-etching a silicon nitride film 103 includes dry-etching the silicon nitride film 103 without generating plasma by using a processing gas containing at least a hydrogen fluoride gas (HF gas) and a fluorine gas (F2 gas), with respect to a processing target object 100 including the silicon nitride film 103.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: March 25, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Eiichi Nishimura, Yusuke Shimizu
  • Publication number: 20140076850
    Abstract: A method and apparatus for supplying a gas mixture to a load lock chamber is described. In one embodiment, the apparatus supplies a gas mixture to a pair of process chambers, comprising a first ozone generator to provide a first gas mixture to a first process chamber, a second ozone generator to provide a second gas mixture to a second process chamber, a first gas source coupled to the first ozone generator via a first mass flow controller and a first gas line, and coupled to the second ozone generator via a second mass flow controller and a second gas line, and a second gas source coupled to the first ozone generator via a third mass flow controller and a third gas line and coupled to the second ozone generator via fourth mass flow controller and a fourth gas line.
    Type: Application
    Filed: November 27, 2013
    Publication date: March 20, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: JARED AHMAD LEE, MARTIN JEFFREY SALINAS, EZRA ROBERT GOLD, JAMES P. CRUSE
  • Publication number: 20140079921
    Abstract: Disclosed are methods for fabricating pyrolysed carbon nanostructures. An example method includes providing a substrate, depositing a polymeric material, subjecting the polymeric material to a plasma etching process to form polymeric nanostructures, and pyrolysing the polymeric nanostructures to form carbon nanostructures. The polymeric material comprises either compounds with different plasma etch rates or compounds that can mask a plasma etching process. The plasma etching process may be an oxygen plasma etching process.
    Type: Application
    Filed: May 3, 2012
    Publication date: March 20, 2014
    Applicants: KATHOLIEKE UNIVERSITEIT LEUVEN, KU LEUVEN R&D, IMEC
    Inventor: Michael De Volder
  • Publication number: 20140076849
    Abstract: An etching apparatus includes: a chamber configured to accommodate a substrate to be processed having an etching target film; a gas exhaust mechanism configured to exhaust an inside of the chamber; an etching gas supply mechanism configured to supply an etching gas into the chamber; and a gas cluster generation mechanism configured to generate a gas cluster in the chamber by spraying a cluster gas into the chamber, wherein a gas produced by a reaction when the etching target film is etched with the etching gas is discharged from the chamber by the gas cluster generated by the gas cluster generation mechanism.
    Type: Application
    Filed: September 10, 2013
    Publication date: March 20, 2014
    Applicant: Tokyo Electron Limited
    Inventor: Shuji MORIYA
  • Patent number: 8673166
    Abstract: In a plasma processing apparatus, thrust-up pins are elevated and a thrust-up force is detected when electrostatic attraction for a substrate by a substrate holding device is ceased after completion of plasma processing, the elevation of the thrust-up pins is ceased upon detection of a detection threshold, and a stepped elevating operation in which the elevation and stoppage of the thrust-up pins are repeated a plurality of times are thereafter commenced on condition that the detected thrust-up force falls to or below the detection threshold and that release of the substrate from a placement surface has not been completed. In the stepped elevating operation, operation timing of the thrust-up device is controlled so that the completion of the release of the substrate from the placement surface is detected when the thrust-up pins are stopped after being elevated and so that the stepped elevating operation is continued on condition that the release has not been completed.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: March 18, 2014
    Assignee: Panasonic Corporation
    Inventors: Shogo Okita, Hiromi Asakura, Syouzou Watanabe, Toshihiro Wada, Mitsuhiro Okune, Mitsuru Hiroshima
  • Patent number: 8673243
    Abstract: A reactor includes respective first and second introduction passages for introducing first and second reactants, a merging passage in which the first reactant merges with the second reactant, and a reaction passage in which the two merged reactants react with each other. First and second introduction grooves respectively constituting part of the first and second introduction passages are formed in a first surface of the base of the flow path structure of the reactor, while a reaction groove constituting part of the reaction passage is formed in a second surface of the base. A merging hole constituting part of the merging passage runs from the first surface of the base to the second surface thereof. The downstream end of the first introduction groove and the downstream end of the second introduction groove merge at the merging hole from different directions.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: March 18, 2014
    Assignee: Kobe Steel, Ltd.
    Inventors: Koji Noishiki, Yasutake Miwa
  • Patent number: 8663489
    Abstract: A method for replacing plural substrates to be processed by a substrate processing apparatus which includes a substrate processing chamber, a load lock chamber, and a conveying apparatus including first and second conveying members for conveying the plural substrates into and out from the substrate processing chamber and the load lock chamber. The method includes the steps of a) conveying a first substrate out from the substrate processing chamber with the first conveying member, b) conveying a second substrate into the substrate processing chamber with the second conveying member, c) conveying the second substrate out from the load lock chamber with the second conveying member, and d) conveying the first substrate into the load lock chamber with the first conveying member. The steps c) and d) are performed between step a) and step b).
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: March 4, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Shigeru Ishizawa, Hiroshi Koizumi, Tatsuya Ogi
  • Patent number: 8664124
    Abstract: A method of etching or removing an organic hardmask overlying a low dielectric constant film in a lithographic process. The method includes providing a dielectric film having thereover an organic hardmask to be removed, the dielectric film having a dielectric constant no greater than about 4.0, introducing over the organic hardmask an ionizable gas comprising a mixture of hydrogen and an oxidizing gas, and applying energy to the mixture to create a plasma of the mixture. The method further includes contacting the organic hardmask with the plasma, with the organic hardmask being at a temperature in excess of 200° C., to remove the organic hardmask without substantially harming the underlying substrate.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: March 4, 2014
    Assignee: Novellus Systems, Inc.
    Inventor: Wesley P. Graff
  • Patent number: 8658048
    Abstract: The present invention aims to prevent decreases in etching rate due to adhesion of an etched film to a substrate holder. A method of manufacturing a magnetic recording medium includes: forming a first film on a substrate holder not yet having a substrate mounted thereon; mounting a substrate on the substrate holder having the first film formed thereon, the substrate having a resist layer formed on a multilayer film including a magnetic film layer, the resist layer having a predetermined pattern; and processing the magnetic film layer into a shape based on the predetermined pattern by performing dry etching on the substrate. The first film is a film that is not etched as easily as the films in the multilayer film to be removed by the dry etching.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: February 25, 2014
    Assignee: Canon Anelva Corporation
    Inventors: Kazuto Yamanaka, Shogo Hiramatsu
  • Patent number: 8652338
    Abstract: A magnetic recording medium a magnetic recording medium includes a soft magnetic layer formed on a substrate, magnetic patterns made of a protruded ferromagnetic layer separated from each other on the soft magnetic layer, and a nonmagnetic layer formed between the magnetic patterns, a nitrogen concentration therein being higher on a surface side than on a substrate side.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: February 18, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kaori Kimura, Yoshiyuki Kamata, Satoshi Shirotori, Tsuyoshi Onitsuka
  • Patent number: 8652342
    Abstract: A semiconductor fabrication apparatus and a method of fabricating a semiconductor device using the same performs semiconductor etching and deposition processes at an edge of a semiconductor substrate after disposing the semiconductor substrate at a predetermined place in the semiconductor fabrication apparatus. The semiconductor fabrication apparatus has lower, middle and upper electrodes sequentially stacked. The semiconductor substrate is disposed on the middle electrode. Semiconductor etching and deposition processes are performed on the semiconductor substrate in the semiconductor fabrication apparatus. The semiconductor fabrication apparatus forms electrical fields along an edge of the middle electrode during performance of the semiconductor etching and deposition processes.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: February 18, 2014
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Kyung-Woo Lee, Jin-Sung Kim, Joo-Byoung Yoon, Yeong-Cheol Lee, Sang-Jun Park, Hee-Kyeong Jeon
  • Patent number: 8652343
    Abstract: A method for the selective removal of material from a substrate surface for forming a deepening includes the steps of applying a mask onto the substrate surface in accordance with the desired selective removal and dry-etching the substrate, a metal, preferably aluminum, being used as the masking material. Power may be coupled inductively to a plasma.
    Type: Grant
    Filed: August 14, 2003
    Date of Patent: February 18, 2014
    Assignee: Excelitas Technologies Singapore Pte. Ltd.
    Inventor: Martin Hausner
  • Patent number: 8647446
    Abstract: A method and system for cleaning a substrate in a multi-module cleaning assembly is provided. The method begins by receiving the substrate into the cleaning module. A cleaning chemistry, at a temperature elevated from an ambient temperature, is applied onto a top surface of the substrate. Concurrent with application of the cleaning chemistry, vapors are exhausted from the cleaning chemistry through a port located below a bottom surface of the substrate with the vapor exhaustion providing a negative pressure relative to a pressure external to the cleaning module. The application of the cleaning chemistry is terminated, followed by termination of the exhausting of the vapors. The substrate is dried after the flowing of inert gas is terminated.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: February 11, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Satbir Kahlon, Frank Ma
  • Patent number: 8648316
    Abstract: The invention relates to a cooling apparatus (101) for a sample in an ion beam etching process, including, a sample stage (102) for arranging the sample, a coolant receptacle (120) containing a coolant, at least one thermal conduction element (106a, 106b) that connects the sample stage (102) to the coolant, a cooling finger (105) connected to the thermal conduction element (106a, 106b), the cooling finger (105) comprising a conduit (130, 131) through which coolant can flow and which is connectable to the coolant receptacle (120). The invention further relates to a method of adjusting the temperature of a sample in an ion beam etching process, including mounting a sample on a coolable sample stage (102), aligning the sample on the sample stage (102), and cooling the sample by coolant directed through a conduit (130, 131) of a cooling finger.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: February 11, 2014
    Assignee: Leica Mikrosysteme GmbH
    Inventors: Thomas Pfeifer, Rainer Wogritsch
  • Patent number: 8647521
    Abstract: The present invention relates to a method of forming micro patterns of a semiconductor device. In the method according to an aspect of the present invention, first etch mask patterns having a second pitch, which is twice larger than a first pitch of target patterns, are formed in a column direction over a semiconductor substrate. An auxiliary film is formed over the semiconductor substrate including a surface of the first etch mask patterns. An etch mask film is formed over the semiconductor substrate including the auxiliary film. An etch process is performed in order to form second etch mask patterns having the second pitch in such a manner that the etch mask film, the auxiliary film, and the first etch mask patterns are isolated from one another in a row direction and the etch mask film remains between the first etch mask patterns. The auxiliary film between the first and second etch mask patterns is removed.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: February 11, 2014
    Assignee: SK hynix Inc.
    Inventor: Woo Yung Jung
  • Publication number: 20140037920
    Abstract: A hard-to-dry-etch material may be patterned by forming a layer of dry-etchable material on a surface of the hard-to-dry etch substrate, and dry etching the dry-etchable material. The hard-to-dry etch substrate produces substantial quantities of non-volatile etch byproducts that redeposit when subject to the dry etching. The dry-etchable material has similar material properties to the hard-to-dry-etch substrate material is formed. The dry-etchable material is one that does not produce substantial quantities of non-volatile etch byproducts that redeposit when the dry-etchable material is subject to the dry etching. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Application
    Filed: August 1, 2012
    Publication date: February 6, 2014
    Applicant: Rolith, Inc.
    Inventor: Boris Kobrin
  • Patent number: 8642477
    Abstract: A method for clearing native oxide is described. A substrate is provided, including an exposed portion whereon a native oxide layer has been formed. A clearing process is performed to the substrate using nitrogen trifluoride (NF3) and ammonia (NH3) as a reactant gas, wherein the volumetric flow rate of NF3 is greater than that of NH3.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: February 4, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Yen-Chu Chen, Teng-Chun Tsai, Chien-Chung Huang, Keng-Jen Liu
  • Patent number: 8642473
    Abstract: Methods and apparatus for removing oxide from a surface, the surface comprising at least one of silicon and germanium, are provided. The method and apparatus are particularly suitable for removing native oxide from a metal silicide layer of a contact structure. The method and apparatus advantageously integrate both the etch stop layer etching process and the native oxide removal process in a single chamber, thereby eliminating native oxide growth or other contaminates redeposit during the substrate transfer processes. Furthermore, the method and the apparatus also provides the improved three-step chemical reaction process to efficiently remove native oxide from the metal silicide layer without adversely altering the geometry of the contact structure and the critical dimension of the trenches or vias formed in the contact structure.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: February 4, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Mei Chang, Linh Thanh, Bo Zheng, Arvind Sundarrajan, John C. Forster, Umesh M. Kellkar, Murali K. Narasimhan
  • Patent number: 8641914
    Abstract: Methods for fabricating arrays of nanoscaled alternating lamellae or cylinders in a polymer matrix having improved long range order utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: February 4, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Jennifer Kahl Regner
  • Patent number: 8636912
    Abstract: A method of forming a device is provided. A substrate having a component is provided and a sacrificial layer is formed over the component. The sacrificial layer includes a cavity portion disposed about the component and a tunnel portion adjacent to the cavity portion. In addition, an encapsulation layer having a cover portion and a perimeter portion is formed over the sacrificial layer. The cover portion encapsulates the cavity portion such that the cavity portion forms a cavity within the cover portion. The perimeter portion is disposed over the tunnel portion. Moreover, an access hole is formed in the perimeter portion of the encapsulation layer.
    Type: Grant
    Filed: February 20, 2012
    Date of Patent: January 28, 2014
    Assignee: RF Micro Devices, Inc.
    Inventors: Sangchae Kim, Steven Crist
  • Patent number: 8632688
    Abstract: In a plasma processing apparatus in which a wafer is processed while supplying radio frequency power to electrodes disposed in a sample stage in a processing chamber within a reactor via a matching box, by matching a specific value of power at transition points of data values of at least two kinds among characteristic data including light emission intensity of the plasma, magnitude of its time variation, a matching position of the matching box, and a change of a value of a voltage of the radio frequency power supplied to the electrodes detected by varying the power to a plurality of values during the processing with a value detected by using characteristic data which is detected during the processing executed on a wafer of the same kind in a different reactor, the differences of the states inside the processing chamber or plasma among a plurality of semiconductor processing apparatuses or reactors are reduced.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: January 21, 2014
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Masaru Izawa, Kouichi Yamamoto, Kenji Nakata, Atsushi Itou
  • Publication number: 20140008327
    Abstract: Provided in one embodiment is a method of forming a movable joint or connection between parts that move with respect to one another, wherein at least one part is at least partially enclosed by at least one second part. The method includes positioning an etchable material over an at least one first part, molding or forming an at least one second part over at least the etchable material, and removing the etchable material.
    Type: Application
    Filed: July 3, 2012
    Publication date: January 9, 2014
    Inventors: CHRISTOPHER D. PREST, Joseph C. Poole, Matthew S. Scott, Dermot J. Stratton
  • Patent number: 8623457
    Abstract: A vacuum processing system includes a transfer chamber configured to form a vacuum atmosphere through which a target object is transferred. A transfer mechanism is disposed in the transfer chamber and configured to transfer the target object. A process chamber is connected to the transfer chamber through a first gate valve and configured to perform a process on the target object within a vacuum atmosphere. A first exhaust port is formed in a bottom of the transfer chamber at the foot of the first gate valve. A first gas exhaust section is connected to the first exhaust port and configured to exhaust gas inside the transfer chamber.
    Type: Grant
    Filed: June 16, 2010
    Date of Patent: January 7, 2014
    Assignee: Tokyo Electron Limited
    Inventor: Kengo Ashizawa
  • Patent number: 8623765
    Abstract: A processed object processing apparatus which enables a plurality of processes to be carried out efficiently. A plurality of treatment systems are communicably connected together in a line and in which the objects to be processed are processed. A load lock system is communicably connected to the treatment systems and has a transfer mechanism that transfers the objects to be processed into and out of each of the treatment systems. At least one of the treatment systems is a vacuum treatment system, and the load lock system is disposed in a position such as to form a line with the treatment systems.
    Type: Grant
    Filed: August 17, 2009
    Date of Patent: January 7, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Jun Ozawa, Gaku Takahashi
  • Publication number: 20140004327
    Abstract: A method of preparing graphene nanoribbons from a few-layer graphene film includes the steps of growing or placing a few-layer graphene film on a substrate, applying nanoparticles to a surface of the few-layer graphene layer on the substrate and performing chemical vapor etching. The resulting few-layer graphene nanoribbon has a thickness of between about 0.3 nm and about 50.0 nm and a width of between about 1.0 nm and about 20.0 nm.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 2, 2014
    Applicant: THE UNIVERSITY OF KENTUCKY RESEARCH FOUNDATION
    Inventors: Douglas Robert Strachan, Joseph Kelly Stieha, David Patrick Hunley, Stephen Lee Johnson, JR.
  • Patent number: 8617407
    Abstract: Systems and methods may provide electrical contacts to an array of substantially vertically aligned nanorods. The nanorod array may be fabricated on top of a conducting layer that serves as a bottom contact to the nanorods. A top metal contact may be applied to a plurality of nanorods of the nanorod array. The contacts may allow I/V (current/voltage) characteristics of the nanorods to be measured.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: December 31, 2013
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Thomas Hantschel, Noble M. Johnson, Peter Kiesel, Christian G. Van de Walle, William S. Wong
  • Publication number: 20130344280
    Abstract: A device including a protecting material encapsulated metallic beam and a method of encapsulating the metallic beam using the protecting material layer are presented. The device includes a cantilever beam that includes at least about 90 Wt % of a metallic beam material, and 10 Wt % or less of a protecting material. The method of forming an encapsulated metallic beam includes the steps of depositing a first layer of protecting material over a substrate, depositing a second layer of protecting material over the first layer, depositing a metallic beam material over the second layer of protecting material, and encapsulating the beam material with a coating of the protecting material.
    Type: Application
    Filed: June 26, 2012
    Publication date: December 26, 2013
    Applicant: GENERAL ELECTRIC COMPANY
    Inventor: Oliver Charles Boomhower
  • Patent number: 8603917
    Abstract: According to embodiments of the present invention, a method of processing a wafer is provided. The wafer includes a plurality of through-wafer interconnects extending from a frontside surface of the wafer to a backside surface of the wafer. The method includes removing a part of wafer material of the back-side such that a portion of the wafer material between the through-wafer interconnects is removed, thereby exposing a portion of the through-wafer interconnects, forming a layer of low-k dielectric material between the through-wafer interconnects, and planarizing the layer of low-k dielectric material such that a surface of the portion of the through-wafer interconnect is exposed.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: December 10, 2013
    Assignee: Agency for Science, Technology and Research
    Inventors: Woon Seong Kwon, Nagarajan Ranganathan
  • Patent number: 8597530
    Abstract: A method of forming a semiconductor device comprises forming a mask pattern over an etch target layer, forming an ion implantation region in the mask pattern through an ion implantation process, and forming an ion non-implantation region within the mask pattern, removing the ion implantation region on a top surface of the ion non-implantation region, removing the ion non-implantation region, and patterning the etch target layer by using spacers that comprise the ion implantation region as an etch mask.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: December 3, 2013
    Assignee: SK hynix Inc.
    Inventor: Min Sub Lee
  • Patent number: 8598040
    Abstract: A method for etching features in a plurality of silicon based bilayers forming a stack on a wafer in a plasma processing chamber is provided. A main etch gas is flowed into the plasma processing chamber. The main etch gas is formed into a plasma, while providing a first pressure. A wafer temperature of less than 20° C. is maintained. The pressure is ramped to a second pressure less than the first pressure as the plasma etches through a plurality of the plurality of silicon based bilayers. The flow of the main etch gas is stopped after a first plurality of the plurality of bilayers is etched.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: December 3, 2013
    Assignee: Lam Research Corporation
    Inventors: Anne Le Gouil, Jeffrey R. Lindain, Yasushi Ishikawa, Yoko Yamaguchi-Adams
  • Patent number: 8592318
    Abstract: A method for etching an etch layer disposed over a substrate and below an antireflective coating (ARC) layer and a patterned organic mask with mask features is provided. The substrate is placed in a process chamber. The ARC layer is opened. An oxide spacer deposition layer is formed. The oxide spacer deposition layer on the organic mask is partially removed, where at least the top portion of the oxide spacer deposition layer is removed. The organic mask and the ARC layer are removed by etching. The etch layer is etched through the sidewalls of the oxide spacer deposition layer. The substrate is removed from the process chamber.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: November 26, 2013
    Assignee: Lam Research Corporation
    Inventors: Jisoo Kim, Conan Chiang, Jun Shinagawa, S. M. Reza Sadjadi
  • Patent number: 8591755
    Abstract: A time-dependent substrate temperature to be applied during a plasma process is determined. The time-dependent substrate temperature at any given time is determined based on control of a sticking coefficient of a plasma constituent at the given time. A time-dependent temperature differential between an upper plasma boundary and a substrate to be applied during the plasma process is also determined. The time-dependent temperature differential at any given time is determined based on control of a flux of the plasma constituent directed toward the substrate at the given time. The time-dependent substrate temperature and time-dependent temperature differential are stored in a digital format suitable for use by a temperature control device defined and connected to direct temperature control of the upper plasma boundary and the substrate. A system is also provided for implementing upper plasma boundary and substrate temperature control during the plasma process.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: November 26, 2013
    Assignee: Lam Research Corporation
    Inventor: Rajinder Dhindsa
  • Patent number: 8591754
    Abstract: A tray for a dry etching apparatus includes substrate accommodation holes penetrating a thickness direction and a substrate support portion supporting an outer peripheral edge portion of a lower surface of a substrate. An upper portion includes a tray support surface supporting a lower surface of the tray, substrate placement portions on each of which a lower surface of the substrate to be placed, and a concave portion for accommodating the substrate support portion. A dc voltage applying mechanism applies a dc voltage to an electrostatic attraction electrode. A heat conduction gas supply mechanism supplies a heat conduction gas between the substrate and substrate placement portion. During carrying of the substrate, the outer peripheral edge of the lower surface of the substrate is supported by the substrate accommodation hole. During processing of the substrate, the substrate support portion is accommodated in the concave portion.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: November 26, 2013
    Assignee: Panasonic Corporation
    Inventors: Shogo Okita, Hiromi Asakura, Syouzou Watanabe, Ryuzou Houchin, Hiroyuki Suzuki
  • Patent number: 8591752
    Abstract: A method for plasma-etching a magnetic film and plasma-cleaning, in which deposits in an etching processing chamber are efficiently removed while corrosion of a wafer is suppressed, is provided. A plasma processing method for plasma-etching a to-be-processed substrate having a magnetic film in an etching processing chamber includes the steps of plasma-etching the magnetic film using a first gas not containing chlorine, transferring out the to-be-processed substrate from the etching processing chamber, first plasma-cleaning of the etching processing chamber using a second gas containing chlorine, and second plasma-cleaning using a third gas containing hydrogen after the first plasma cleaning.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: November 26, 2013
    Assignee: Hitachi High Technologies Corporation
    Inventors: Takahiro Abe, Takeshi Shimada, Atsushi Yoshida, Kentaro Yamada, Daisuke Fujita
  • Patent number: 8585910
    Abstract: A process for producing a micromachined tube (microtube) suitable for microfluidic devices. The process entails isotropically etching a surface of a first substrate to define therein a channel having an arcuate cross-sectional profile, and forming a substrate structure by bonding the first substrate to a second substrate so that the second substrate overlies and encloses the channel to define a passage having a cross-sectional profile of which at least half is arcuate. The substrate structure can optionally then be thinned to define a microtube and walls thereof that surround the passage.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: November 19, 2013
    Assignee: Integrated Sensing Systems Inc.
    Inventors: Douglas Ray Sparks, Nader Najafi
  • Patent number: 8580132
    Abstract: A method for making a strip shaped graphene layer includes the steps of: first, a graphene film is located on a surface of a substrate is provided. Second, a drawn carbon nanotube film composite is disposed on the graphene film. The drawn carbon nanotube film composite includes a polymer material and a drawn carbon nanotube film structure disposed in the polymer material. The drawn carbon nanotube film structure includes a plurality of carbon nanotube segments and a plurality of strip-shaped gaps between the adjacent carbon nanotube segments. Third, the polymer material is partly removed to expose the plurality of carbon nanotube segments. Forth, the plurality of carbon nanotube segments and the graphene film covered by the plurality of carbon nanotube segments is etched. Fifth, the remained polymer material is removed to obtain the strip shaped graphene layer.
    Type: Grant
    Filed: December 29, 2012
    Date of Patent: November 12, 2013
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Xiao-Yang Lin, Kai-Li Jiang, Shou-Shan Fan
  • Patent number: 8574369
    Abstract: A method for removing a resist on a substrate includes supplying unsaturated hydrocarbon gas or fluorine substitution product gas of unsaturated hydrocarbon, at a lower pressure than an atmospheric pressure, to a system of reaction capable of heating the substrate and supplying ozone gas at a lower pressure than the atmospheric pressure to the system of reaction. The ozone gas is an ultra-high concentration ozone gas obtained by separating only ozone from ozone-containing gas by a difference of vapor pressure through liquefaction separation and by vaporizing a liquefaction-separated ozone again. The substrate may be cleaned with pure water. A susceptor that holds the substrate is provided in a chamber of the system of reaction and is heated by a light source that emits infrared light. An internal pressure of the chamber is controlled so that a temperature of the substrate is 90° C. or less.
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: November 5, 2013
    Assignee: Meidensha Corporation
    Inventor: Toshinori Miura
  • Publication number: 20130284700
    Abstract: Embodiments of the present invention relate to method and apparatus for providing processing gases to a process chamber with improved uniformity. One embodiment of the present invention provides a gas injection assembly. The gas injection assembly includes an inlet hub, a nozzle having a plurality of injection passages disposed against the inlet hub, and a distribution insert disposed between the nozzle and the inlet hub. The distribution insert has one or more gas distribution passages configured to connect the inlet hub to the plurality of the injection passages the nozzle. Each of the one or more gas distribution passages has one inlet connecting with a plurality of outlets, and distances between the inlet and each of the plurality of outlets are substantially equal.
    Type: Application
    Filed: March 8, 2013
    Publication date: October 31, 2013
    Inventors: Roy C. NANGOY, Andrew Y. NGUYEN
  • Patent number: 8569179
    Abstract: A method of etching or removing an amorphous carbon organic hardmask overlying a low dielectric constant film in a lithographic process. The method includes providing a dielectric film having thereover an amorphous carbon organic hardmask to be removed, the dielectric film having a dielectric constant no greater than about 4.0, introducing over the amorphous carbon organic hardmask an ionizable gas comprising a mixture of hydrogen and an oxidizing gas, and applying energy to the mixture to create a plasma of the mixture. The method further includes contacting the amorphous carbon organic hardmask with the plasma, with the amorphous carbon organic hardmask being at a temperature in excess of 200° C., to remove the amorphous carbon organic hardmask without substantially harming the underlying substrate.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: October 29, 2013
    Assignee: Novellus Systems, Inc.
    Inventor: Wesley P. Graff