Abstract: A semiconductor light emitting device includes a first layer including at least one of n-type GaN and n-type AlGaN; a second layer including Mg-containing p-type AlGaN; and a light emitting section provided between the first and second layers. The light emitting section includes barrier layers of Si-containing AlxGa1-x-yInyN (0?x, 0?y, x+y?1), and a well layer provided between the barrier layers and made of GaInN or AlGaInN. The barrier layers have a nearest barrier layer nearest to the second layer among the barrier layers and a far barrier layer. The nearest barrier layer includes a first portion made of Si-containing AlxGa1-x-yInyN (0?x, 0?y, x+y?1), and a second portion provided between the first portion and the second layer and made of AlxGa1-x-yInyN (0?x, 0?y, x+y?1). The Si concentration in the second portion is lower than those in the first portion and in the far barrier layer.

Abstract: Provided are methods of surface treatment of nanocrystal quantum dots after film deposition so as to exchange the native ligands of the quantum dots for exchange ligands that result in improvement in charge extraction from the nanocrystals.

Abstract: A catalyst particle for use in growth of elongated nanostructures, such as e.g. nanowires, is provided. The catalyst particle comprises a catalyst compound for catalyzing growth of an elongated nanostructure comprising a nanostructure material without substantially dissolving in the nanostructure material and at least one dopant element for doping the elongated nanostructure during growth by substantially completely dissolving in the nanostructure material. A method for forming an elongated nanostructure, e.g. nanowire, on a substrate using the catalyst particle is also provided. The method allows controlling dopant concentration in the elongated nanostructures, e.g. nanowires, and allows elongated nanostructures with a low dopant concentration of lower than 1017 atoms/cm3 to be obtained.

Abstract: Provided is a compact ultraviolet irradiation apparatus which is capable of emitting ultraviolet radiation with high efficiency. This ultraviolet irradiation apparatus includes, in a vessel, a semiconductor multi-layered film element and an electron beam irradiation source for irradiating the semiconductor multi-layered film element with an electron beam, the vessel being hermetically sealed to have a negative internal pressure and having an ultraviolet transmitting window. Furthermore, the semiconductor multi-layered film element includes an active layer having a single quantum well structure or a multi quantum well structure of InxAlyGa1-x-yN (0?x<1, 0<y?1, x+y?1), and the active layer of the semiconductor multi-layered film element is irradiated with an electron beam from the electron beam irradiation source. This allows the semiconductor multi-layered film element to emit ultraviolet radiation out of the vessel through the ultraviolet transmitting window.

Abstract: Disclosed herein is a light emitting device including a light emitting structure including a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer including at least one combination of a well layer of a first composition formed of a nitride-semiconductor material having first electronic energy and a barrier layer of a second composition formed of a nitride-semiconductor material having higher electronic energy than the first electronic energy, and an interface layer disposed between the second conductivity-type semiconductor layer and the active layer or between the first conductivity-type semiconductor layer and the active layer. The interface layer includes first, second and third layers having different energy bandgaps, the energy bandgaps of the first and second layers are greater than the energy bandgap of the barrier layer, and the energy bandgap of the third layer is less than the energy bandgap of the barrier layer.

Abstract: A method of forming a semiconductor is provided and includes patterning a pad and a nanowire onto a wafer, the nanowire being substantially perpendicular with a pad sidewall and substantially parallel with a wafer surface and epitaxially growing on an outer surface of the nanowire a secondary layer of semiconductor material, which is lattice mismatched with respect to a material of the nanowire and substantially free of defects.

Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type layer, a p-type layer, and a light emitting unit provided between the n-type layer and the p-type layer and including barrier layers and well layers. At least one of the barrier layers includes first and second portion layers. The first portion layer is disposed on a side of the n-type layer. The second portion layer is disposed on a side of the p-type layer, and contains n-type impurity with a concentration higher than that in the first portion layer. At least one of the well layers includes third and fourth portion layers. The third portion layer is disposed on a side of the n-type layer. The fourth portion layer is disposed on a side of the p-type layer, and contains n-type impurity with a concentration higher than that in the third portion layer.

Abstract: Provided is a nitride semiconductor light emitting device including: a first nitride semiconductor layer; an active layer formed above the first nitride semiconductor layer; and a delta doped second nitride semiconductor layer formed above the active layer. According to the present invention, the optical power of the nitride semiconductor light emitting device is enhanced, optical power down phenomenon is improved and reliability against ESD (electro static discharge) is enhanced.

Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting portion. The light emitting portion is provided between the semiconductor layers and includes barrier layers and well layers alternately stacked. An n-side end well layer which is closest to the n-type semiconductor layer contains InwnGa1-wnN and has a layer thickness twn. An n-side end barrier layer which is closest to the n-type semiconductor layer contains InbnGa1-bnN and has a layer thickness tbn. A p-side end well layer which is closest to the p-type semiconductor layer contains InwpGa1-wpN and has a layer thickness twp. A p-side end barrier layer which is closest to the p-type semiconductor contains InbpGa1-bpN and has a layer thickness tbp. A value of (wp×twp+bp×tbp)/(twp+tbp) is higher than (wn×twn+bn×tbn)/(twn+tbn) and is not higher than 5 times (wn×twn+bn×tbn)/(twn+tbn).

Abstract: A nitride semiconductor device includes a dislocation control layer on a substrate, and a nitride semiconductor layer on the dislocation control layer. The dislocation control layer includes a nanocomposite of a first nanoparticle made of a first material and at least one second nanoparticle made of a second material.

Abstract: Parallel plate slot emission array. In accordance with an embodiment of the present invention, an article of manufacture includes a side-emitting light emitting diode configured to emit light from more than two surfaces. The article of manufacture includes a first sheet electrically and thermally coupled to a first side of the light emitting diode, and a second sheet electrically and thermally coupled to a second side of the light emitting diode. The article of manufacture further includes a plurality of reflective surfaces configured to reflect light from all of the surfaces of the light emitting diode through holes in the first sheet. The light may be reflected via total internal reflection.

Abstract: Disclosed is a light-emitting diode, which has a red and infrared emitting wavelength, excellent monochromatism characteristics, and high output and high efficiency and excellent humidity resistance. The light-emitting diode is provided with: a light-emitting section, which includes an active layer having a quantum well structure and formed by laminating alternately a well layer which comprises a composition expressed by the composition formula of (AlX1 Ga1-X1) As (0?X1?1) and a barrier layer which comprises a composition expressed by the composition formula of (AlX2 Ga1-X2) As (0<2?1), and a first clad layer and a second clad layer, between both of which the active layer is sandwiched, wherein the first clad layer and the second clad layer comprise a composition expressed by the composition formula of (AlX3Ga1-X)Y1 In1-Y1 P (0?X3?1, 0<Y1?1); a current diffusion layer formed on the light-emitting section; and a functional substrate bonded to the current diffusion layer.

Abstract: A light emitting device comprising a staggered composition quantum well (QW) has a step-function-like profile in the QW, which provides higher radiative efficiency and optical gain by providing improved electron-hole wavefunction overlap. The staggered QW includes adjacent layers having distinctly different compositions. The staggered QW has adjacent layers Xn wherein X is a quantum well component and in one quantum well layer n is a material composition selected for emission at a first target light regime, and in at least one other quantum well layer n is a distinctly different composition for emission at a different target light regime. X may be an In-content layer and the multiple Xn-containing a step function In-content profile.

Abstract: A semiconductor device includes a substrate supporting a plurality of layers that include at least one modulation doped quantum well (QW) structure offset from a quantum dot in quantum well (QD-in-QW) structure. The modulation doped QW structure includes a charge sheet spaced from at least one QW by a spacer layer. The QD-in-QW structure has QDs embedded in one or more QWs. The QD-in-QW structure can include at least one template/emission substructure pair separated by a barrier layer, the template substructure having smaller size QDs than the emission substructure. A plurality of QD-in-QW structures can be provided to support the processing (emission, absorption, amplification) of electromagnetic radiation of different characteristic wavelengths (such as optical wavelengths in range from 1300 nm to 1550 nm).

Abstract: A high-power and high-efficiency light emitting device with emission wavelength (?peak) ranging from 280 nm to 360 nm is fabricated. The new device structure uses non-polar or semi-polar AlInN and AlInGaN alloys grown on a non-polar or semi-polar bulk GaN substrate.

Abstract: Provided is an emitting device which is capable of improving the luminous efficiency of an emitting layer formed using a group IV semiconductor material and obtaining an emission spectrum having a narrow band, and a manufacturing method therefor. The emitting device comprises: an emitting layer having a potential confinement structure, comprising: a well region comprising a group IV semiconductor material; and a barrier region being adjacent to the well region and comprising a group IV semiconductor material which is different from the group IV semiconductor material in the well region, wherein: a continuous region from the well region over an interface between the well region and the barrier region to a part of the barrier region comprises fine crystals; and a region in the barrier region, which is other than the continuous region comprising the fine crystals, is amorphous or polycrystalline region.

Abstract: An interpenetrating network assembly with a network of connected flakes of nano-scale crystalline carbon and nano-scale particles of an electroactive material interconnected with the carbon flakes is provided. The network assemblies are particularly suited for energy storage applications that use metal oxide electroactive materials and a single charge collector or a source and drain. Interpenetrating networks of graphene flakes and metal oxide nanosheets can form independent pathways between source and drain. Nano-scale conductive materials such as metal nanowires, carbon nanotubes, activated carbon or carbon black can be included as part of the conductive network to improve charge transfer.

Abstract: Disclosed is a semiconductor light emitting device. The semiconductor light emitting device comprises a substrate; a light emitting structure comprising a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer on the substrate; an electrode layer on the second conductive semiconductor layer; and an electrode on the electrode layer, wherein the substrate comprises a plurality of convex portions, wherein the electrode layer comprises a plurality of holes corresponding to a region of at least one of the plurality of convex portions of the substrate, wherein an insulating material is disposed in the plurality of holes on the light emitting structure.

Abstract: A Group III nitride compound semiconductor light emitting device is provided which has: an n-type semiconductor layer (12); an active layer (13) of a multiple quantum well structure laminated on the n-type semiconductor layer (12); a first p-type semiconductor layer (14) that is a layer of a superlattice structure in which an undoped film (14a) that has a composition AlxGa1-xN (x indicating composition ratio, being within a range 0<x?0.4) and that contains no dopant, and a doped film (14b) that has a composition AlyGa1-yN (y indicating composition ratio, being within a range 0?y<0.4) and that contains a dopant, are alternately laminated a plurality of times, and a surface thereof on the active layer side (13) is constituted by the undoped film (14a); and a second p-type semiconductor layer (15) laminated on the first p-type semiconductor layer (14).

Abstract: A self-assembled semiconductor nanostructure includes a core and a shell, wherein one of the core or the shell is rich in a strained component and the other of the core or the shell is rich in an unstrained component, wherein the nanostructure is a quantum dot or a nanowire. A method includes growing a semiconductor alloy structure on a substrate using a growth mode that produces a semiconductor alloy structure having a self-assembled core and shell and allowing the structure to equilibrate such that one of the core or the shell is strained and the other is unstrained. Another method includes growing at least one semiconductor alloy nanostructures on a substrate, wherein the nanostructure comprises a strained component and an unstrained component, and controlling a compositional profile during said growing such that a transition between the strained component and an unstrained component is substantially continuous.

Abstract: A quantum well thermoelectric component for use in a thermoelectric device based on the thermoelectric effect, comprising a stack of layers of two materials respectively made on the basis of silicon and silicon-germanium, the first of the two materials, made on the basis of silicon, defining a barrier semiconductor material and the second of the two materials, made on the basis of silicon-germanium, defining a conducting semiconductor material, the barrier semiconductor material having a band gap higher than the band gap of the conducting semiconductor material, wherein the conducting semiconductor material is an alloy comprising silicon, germanium and at least a lattice-matching element, the lattice-matching element(s) being present in order to control a lattice parameter mismatch between the barrier layer made of the barrier semiconductor material and the conducting layer made of the conducting semiconductor material.

Abstract: Embodiments of an apparatus and methods for providing three-dimensional complementary metal oxide semiconductor devices comprising modulation doped transistors are generally described herein. Other embodiments may be described and claimed, which may include a modulation doped heterostructure, wherein the modulation doped heterostructure may comprise an active portion having a first bandgap and a delta doped portion having a second bandgap.

Abstract: An apparatus includes a primary planar quantum well and a planar distribution of dopant atoms. The primary planar quantum well is formed by a lower barrier layer, a central well layer on the lower barrier layer, and an upper barrier layer on the central well layer. Each of the layers is a semiconductor layer. One of the barrier layers has a secondary planar quantum well and is located between the planar distribution of dopant atoms and the central well layer. The primary planar quantum well may be undoped or substantially undoped, e.g., intrinsic semiconductor.

Abstract: A light emitting diode and a method of fabricating a light emitting diode, the diode has a first set of multiple quantum wells (MQWs), each of the MQWs of the first set comprising a wetting layer providing nucleation sites for quantum dots (QDs) or QD-like structures in a well layer of said each MQW; and a second set of MQWs, each of the MQWs of the second set formed so as to exhibit a photoluminescence (PL) peak wavelength shifted compared to the MQWs of the first set.

Abstract: Implementations and techniques for coupled asymmetric quantum confinement structures are generally disclosed.

Abstract: This application relates to graphene based heterostructures and methods of making graphene based heterostructures. The graphene heterostructures comprise: i) a first encapsulation layer; ii) a second encapsulation layer; and iii) a graphene layer. The heterostructures find application in electronic devices.

Abstract: A radiation-emitting thin film semiconductor chip is herein described which comprises a first region with a first active zone, a second region, separated laterally from the first region by a space, with a second active zone which extends parallel to the first active zone in a different plane, and a compensating layer, which is located in the second region at the level of the first active zone, the compensating layer not containing any semiconductor material.

Abstract: A population of bright and stable nanocrystals is provided. The nanocrystals include a semiconductor core and a thick semiconductor shell and can exhibit high extinction coefficients, high quantum yields, and limited or no detectable blinking.

Abstract: Electromechanical transistors that employ Janus micro/nano-components and techniques for the fabrication thereof are provided. In one aspect, a method of fabricating an electromechanical transistor includes the following steps. A wafer is provided. A source electrode and a drain electrode are formed opposite one another on a surface of the wafer, wherein a gap is present between the source electrode and the drain electrode. A first gate electrode and a second gate electrode are formed on the surface of the wafer on opposite sides of the gap between the source electrode and the drain electrode. At least one Janus component is placed in the gap between the source electrode and the drain electrode, wherein the Janus component includes a first portion having an electrically conductive material and a second portion having an electrically insulating material.

Abstract: A solid-state imaging device includes a first electrode, a second electrode disposed opposing to the first electrode, and a photoelectric conversion layer, which is disposed between the first electrode and the second electrode and in which narrow gap semiconductor quantum dots are dispersed in a conductive layer, wherein one electrode of the first electrode and the second electrode is formed from a transparent electrode and the other electrode is formed from a metal electrode or a transparent electrode.

Abstract: Provided is a semiconductor electroluminescent device with an InGaAlAs-based well layer having tensile strain, or a semiconductor electroluminescent device with an InGaAsP-based well layer having tensile strain and with an InGaAlAs-based barrier layer which is high-performance and highly reliable in a wide temperature range. In a multiple-quantum well layer of the semiconductor electroluminescent device, a magnitude of interface strain at an interface between the well layer and the barrier layer is smaller than a magnitude of critical interface strain determined by a layer thickness value which is larger one of a thickness of the well layer and a thickness of the barrier layer.

Abstract: An axially hetero-structured nanowire includes a first segment that includes GaAs, and a second segment integral with the first that includes InxGa1-xAs. The parameter x has a maximum value x-max within the second segment that is at least 0.02 and less than 0.5. A nanostructured semiconductor component includes a GaAs (111)B substrate, and a plurality of nanopillars integral with the substrate at an end thereof. Each of the plurality of nanopillars can be a nanowire according to an embodiment of the current invention. A method of producing axially hetero-structured nanowires is also provided.

Abstract: The present invention generally relates to devices comprising graphene and a conductive polymer (e.g., poly(3,4-ethylenedioxythiophene) (PEDOT)), and related systems and methods. In some embodiments, the conductive polymer is formed by oxidative chemical vapor deposition.

Abstract: The present disclosure generally relates to techniques for controlled quantum dot growth as well as a quantum dot structures. In some examples, a method is described that includes one or more of providing a substrate, forming a defect on the substrate, depositing a layer on the substrate and forming quantum dots along the defect.

Abstract: A semiconductor emitter, or a precursor therefor, has a substrate and one or more textured semiconductor layers deposited onto the substrate in a nonpolar orientation. The textured layers enhance light extraction, and the use of nonpolar orientation greatly enhances internal quantum efficiency compared to conventional devices. Both the internal and external quantum efficiencies of emitters of the invention can be 70-80% or higher. The invention provides highly efficient light emitting diodes suitable for solid state lighting.

Abstract: A thermal plate for a substrate support assembly in a semiconductor plasma processing apparatus, includes multiple independently controllable planar thermal zones arranged in a scalable multiplexing layout, and electronics to independently control and power the planar heater zones. Each planar thermal zone uses at least one Peltier device as a thermoelectric element. A substrate support assembly in which the thermal plate is incorporated has an electrostatic clamping electrode layer and a temperature controlled base plate. Methods for manufacturing the thermal plate include bonding together ceramic or polymer sheets having planar thermal zones, positive, negative and common lines and vias.

Abstract: A core consisting essentially of a wide band-gap material has a shell consisting essentially of graphene conformally disposed about at least a substantial portion thereof. By one approach the core has at least one bisectional dimension that does not exceed 100 nanometers. By one approach a connection between a pathway that connects the shell to the core comprises a photovoltaic junction.

Abstract: Disclosed herein are a method of generating a two-dimensional hole gas (2DHG) using a type-2 quantum well formed using semiconductors with different electron affinities or band gap, and a high-speed p-type semiconductor device using the 2DHG. To this end, the method includes providing a semiconductor substrate; growing a first semiconductor layer on the semiconductor substrate, growing a second semiconductor layer with a different electron affinity or band gap from the first semiconductor layer on the first semiconductor layer, and growing a third semiconductor layer with a different electron affinity or band gap from the second semiconductor layer, thereby forming a type-2 quantum well; and forming a p-type doping layer in the vicinity of the type-2 quantum well, thereby generating the 2DHG.

Abstract: A Group III nitride semiconductor light-emitting device includes a light-emitting layer having a multiple quantum structure including an AlxGa1-xN (0<x<1) layer as a barrier layer. When the light-emitting layer is divided into three blocks including first, second and third blocks in the thickness direction from the n-type-layer-side cladding layer to the p-type-layer-side cladding layer, the number of barrier layers are the same in the first and third blocks, and the Al composition ratio of each light-emitting layer is set to satisfy a relation x+z=2y and z<x where an average Al composition ratio of the barrier layers in the first block is represented as x, an average Al composition ratio of the barrier layers in the second block is represented as y, and an average Al composition ratio of the barrier layers in the third block is represented as z.

Abstract: An electronic or electro-optic device includes a p-type semiconductor layer, an n-type semiconductor layer having a region of contact with the p-type semiconductor layer to provide a p-n junction, a first electrical lead in electrical connection with the p-type semiconductor layer, and a second electrical lead in electrical connection with the n-type semiconductor layer. At least one of the p-type and n-type semiconductor layers includes a doped topological-insulator material having an electrically conducting surface, and one of the first and second electrical leads is electrically connected to the electrically conducting surface of the topological-insulator material.

Abstract: A device includes a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region. A transparent, conductive non-III-nitride material is disposed in direct contact with the n-type region. A total thickness of semiconductor material between the light emitting layer and the transparent, conductive non-III-nitride material is less than one micron.

Abstract: A semiconductor light emitting device and a fabrication method thereof are provided. The semiconductor light emitting device includes: first and second conductivity-type semiconductor layers; and an active layer disposed between the first and second conductivity-type semiconductor layers and having a structure in which a quantum barrier layer and a quantum well layer are alternately disposed, and the quantum barrier layer includes first and second regions disposed in order of proximity to the first conductivity-type semiconductor layer.

Abstract: A light emitting diode (LED) for minimizing crystal defects in an active region and enhancing recombination efficiency of electrons and holes in the active region includes non-polar GaN-based semiconductor layers grown on a non-polar substrate. The semiconductor layers include a non-polar N-type semiconductor layer, a non-polar P-type semiconductor layer, and non-polar active region layers positioned between the N-type semiconductor layer and the P-type semiconductor layer. The non-polar active region layers include a well layer and a barrier layer with a superlattice structure.

Abstract: A single crystalline silicon carbide layer can be grown on a single crystalline sapphire substrate. Subsequently, a graphene layer can be formed by conversion of a surface layer of the single crystalline silicon layer during an anneal at an elevated temperature in an ultrahigh vacuum environment. Alternately, a graphene layer can be deposited on an exposed surface of the single crystalline silicon carbide layer. A graphene layer can also be formed directly on a surface of a sapphire substrate or directly on a surface of a silicon carbide substrate. Still alternately, a graphene layer can be formed on a silicon carbide layer on a semiconductor substrate. The commercial availability of sapphire substrates and semiconductor substrates with a diameter of six inches or more allows formation of a graphene layer on a commercially scalable substrate for low cost manufacturing of devices employing a graphene layer.

Abstract: A light emitting diode includes a first semiconductor layer, an active layer and a second semiconductor layer stacked in that order; a first electrode electrically connected to the first semiconductor layer; a second electrode electrically connected to the second semiconductor layer. The light emitting diode further includes a carbon nanotube layer. The carbon nanotube layer is enclosed in the interior of the first semiconductor layer. The carbon nanotube layer includes a number of carbon nanotubes.

Abstract: A method of etching active quantum nanostructures provides the step of laterally etching of an intermediate active quantum nanostructure layer interposed between cladding layers. The lateral etching can be carried out on at least one side of the intermediate active quantum nanostructure layer selectively, with respect to the cladding layers to define at least one lateral recess or spacing in the intermediate active quantum nanostructure layer and respective lateral protrusions of cladding layers protruding with respect to the intermediate active quantum nanostructure layer. This method can be applied to create devices including active quantum nanostructures such as, for example, three-dimensional photonic crystals, a photonic crystal double-slab and a photonic crystal laser.

Abstract: According to one embodiment, a semiconductor light emitting device includes a first layer, a second layer, and a light emitting portion. The first layer includes at least one of n-type GaN and n-type AlGaN. The second layer includes p-type AlGaN. The light emitting portion has a single quantum well structure. The single quantum well structure includes a first barrier layer, a second barrier layer, and a well layer. The first barrier layer is provided between the first layer and the second layer and includes Alx1Ga1-x1-y1Iny1N (0<x1, 0?y1, x1+y1<1). The second barrier layer is provided between the first barrier layer and the second layer and includes Alx2Ga1-x2-y2Iny2N (0<x2, 0?y2, x2+y2<1). The well layer is provided between the first barrier layer and the second barrier layer, includes Alx0Ga1-x0-y0Iny0N (0?x0, 0<y0, x0+y0<1, y1<y0, y2<y0), and is configured to emit near ultraviolet light.

Abstract: Emissive quantum photonic imagers comprised of a spatial array of digitally addressable multicolor pixels. Each pixel is a vertical stack of multiple semiconductor laser diodes, each of which can generate laser light of a different color. Within each multicolor pixel, the light generated from the stack of diodes is emitted perpendicular to the plane of the imager device via a plurality of vertical waveguides that are coupled to the optical confinement regions of each of the multiple laser diodes comprising the imager device. Each of the laser diodes comprising a single pixel is individually addressable, enabling each pixel to simultaneously emit any combination of the colors associated with the laser diodes at any required on/off duty cycle for each color. Each individual multicolor pixel can simultaneously emit the required colors and brightness values by controlling the on/off duty cycles of their respective laser diodes.

Abstract: A light emitting device may include a first conductive semiconductor layer, an active layer adjacent to the first conductive semiconductor layer and a second conductive semiconductor layer adjacent to the active layer. The active layer may include a first quantum well layer, a second quantum well layer and a barrier layer between the first quantum well layer and the second quantum well layer. The first quantum well layer may include a first plurality of sub-barrier layers and a first plurality of sub-quantum well layers, and the second quantum well layer may include a second plurality of sub-barrier layers and a second plurality of sub-quantum well layers. A bandgap of the first quantum well layer may be different than a bandgap of the second quantum well layer.

Abstract: Implementations and techniques for coupled asymmetric quantum confinement structures are generally disclosed.