Abstract: A semiconductor device including a heterostructure having at least one low-resistivity p-type GaSb quantum well is provided. The heterostructure includes a layer of In0.52Al0.48As on an InP substrate, where the In0.52Al0.48As is lattice matched to InP, followed by an AlAsxSb1-x buffer layer on the In0.52Al0.48As layer, an AlAsxSb1-x spacer layer on the AlAsxSb1-x buffer layer, a GaSb quantum well layer on the AlAsxSb1-x spacer layer, an AlAsxSb1-x barrier layer on the GaSb quantum well layer, an In0.2Al0.8Sb etch-stop layer on the AlAsxSb1-x barrier layer, and an InAs cap. The semiconductor device is suitable for use in low-power electronic devices such as field-effect transistors.

Abstract: An IR sensor includes a suspended micro-platform having a support layer and a device layer disposed thereon. IR absorbers are disposed in or on the device layer. IR radiation received by the IR absorbers heats an on-platform junction of each of a plurality of series-connected thermoelectric devices operating in a Seebeck mode, the devices producing a voltage indicative of the received IR. Other thermoelectric devices are used to cool the platform, and a pressure sensing arrangement is used to detect loss of vacuum or pressure leaks.

Abstract: In one embodiment, the present invention includes a method for forming a logic device, including forming an n-type semiconductor device over a silicon (Si) substrate that includes an indium gallium arsenide (InGaAs)-based stack including a first buffer layer, a second buffer layer formed over the first buffer layer, a first device layer formed over the second buffer layer. Further, the method may include forming a p-type semiconductor device over the Si substrate from the InGaAs-based stack and forming an isolation between the n-type semiconductor device and the p-type semiconductor device. Other embodiments are described and claimed.

Abstract: There is provided a manufacturing method of an LED module including: forming an insulating film on a substrate; forming a first ground pad and a second ground pad separated from each other on the insulating film; forming a first division film that fills a space between the first and second ground pads, a second division film deposited on a surface of the first ground pad, and a third division film deposited on a surface of the second ground pad; forming a first partition layer of a predetermined height on each of the division films; sputtering seed metal to the substrate on which the first partition layer is formed; forming a second partition layer of a predetermined height on the first partition layer; forming a first mirror connected with the first ground pad and a second mirror connected with the second ground pad by performing a metal plating process to the substrate on which the second partition layer is formed; removing the first and second partition layers; connecting a zener diode to the first mirror

Abstract: A noble metal nanoparticle can be grown on a semiconductor substrate by contacting a predetermined region of the substrate with a solution including noble metal ions. The predetermined region of the semiconductor substrate can be exposed by applying a polymeric layer over the substrate selectively removing a portion of the polymeric layer. The nanoparticles can be prepared in a predetermined pattern. The nanoparticle can be formed with a barrier separating it from another nanoparticle on the substrate; for example, nanoparticle can be located in a pit etched in the substrate. The size and location of the nanoparticle can be stable at elevated temperatures.

Abstract: Engineered substrates having thermally opaque materials for preventing transmission of radiative energy during epitaxial growth processes and for separating substrates from epitaxially grown semiconductor structures and associated systems and methods are disclosed herein. In several embodiments, for example, an engineered substrate can be manufactured by forming a thermally opaque material at an upper surface of a handle substrate and bonding an epitaxial formation structure on the handle substrate such that the thermally opaque material is between the epitaxial formation structure and the handle substrate. In various embodiments, the thermally opaque material at least partially blocks radiative heat transmission between the handle substrate and the epitaxial formation structure, for example, to provide increased accuracy of epitaxy process temperature measurements and/or increased uniformity of epitaxy growth characteristics across the engineered substrate.

Abstract: In a gallium nitride based compound semiconductor light-emitting element including an active layer, the active layer includes a well layer 104 and a barrier layer 103, each of which is a semiconductor layer of which the growing plane is an m plane. The well layer 104 has a lower surface and an upper surface and has an In composition distribution in which the composition of In changes according to a distance from the lower surface in a thickness direction of the well layer 104. The In composition of the well layer 104 becomes a local minimum at a level that is defined by a certain distance from the lower surface and that portion of the well layer 104 where the In composition becomes the local minimum runs parallel to the lower surface.

Abstract: A light emitting device, a method of manufacturing the same, a light emitting device package, and a lighting system are disclosed. The light emitting device may include a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first and second conductive semiconductor layers. The first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer may include Al. The second conductive semiconductor layer may have Al content higher than Al content of the first conductive semiconductor layer. The first conductive semiconductor layer may have Al content higher than Al content of the active layer.

Abstract: An optoelectronic semiconductor chip comprises the following sequence of regions in a growth direction (c) of the semiconductor chip (20): a p doped barrier layer (1) for an active region (2), the active region (2), which is suitable for generating electromagnetic radiation, the active region being based on a hexagonal compound semiconductor, and an n doped barrier layer (3) for the active region (2). Also disclosed are a component comprising such a semiconductor chip, and to a method for producing such a semiconductor chip.

Abstract: An apparatus includes a substrate, a sequence of crystalline semiconductor layers on a planar surface of the substrate, and first and second sets of electrodes over the sequence. The sequence has a 2D quantum well therein. The first set of electrodes border opposite sides of a lateral region of the sequence and are controllable to vary a width of a non-depleted portion of the quantum well along the top surface. The second set of electrodes border channels between the lateral region and first and second adjacent lateral areas of the sequence and are controllable to vary widths of non-depleted segments of the quantum well in the channels. The electrodes are such that straight lines connecting the lateral areas via the channels either pass between one of the electrodes and the substrate or are misaligned to an effective [1 1 0] lattice direction of the sequence.

Abstract: A semiconductor light emitting structure including an n-type semiconductor layer, a p-type semiconductor layer and an active layer is provided. The active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer is a multi-quantum well structure consisting of well layers and barrier layers interlaced and stacked to each other. The well layers near the n-type semiconductor layer at least include a first well layer having a first thickness, and the well layers near the p-type semiconductor layer at least include a second well layer having a second thickness smaller than the first thickness, so that the ability to restrict electrons within the area of the active layer near the n-type semiconductor layer is increased, and the conversion efficiency of the active layer is enhanced. There is a differential ?d1 between the first thickness and the second thickness, wherein 0 nm<?d1?10 nm.

Abstract: A semiconductor device includes a p-type semiconductor layer, an n-type semiconductor layer, a pn junction portion at which the p-type semiconductor layer and the n-type semiconductor layer are joined to each other, and a multiple quantum barrier structure or a multiple quantum well structure that is provided in at least one of the p-type semiconductor layer and the n-type semiconductor layer and functions as a barrier against at least one of electrons and holes upon biasing in a forward direction. Upon biasing in a reverse direction, a portion that allows band-to-band tunneling of electrons is formed at the pn junction portion.

Abstract: Certain embodiments provide a semiconductor light emitting device including: a first metal layer; a stack film including a p-type nitride semiconductor layer, an active layer, and an n-type nitride semiconductor layer; an n-electrode; a second metal layer; and a protection film protecting an outer circumferential region of the upper face of the n-type nitride semiconductor layer, side faces of the stack film, a region of an upper face of the second metal layer other than a region in contact with the p-type nitride semiconductor layer, and a region of an upper face of the first metal layer other than a region in contact with the second metal layer. Concavities and convexities are formed in a region of the upper face of the n-type nitride semiconductor layer, the region being outside the region in which the n-electrode is provided and being outside the regions covered with the protection film.

Abstract: A semiconductor device is provided that includes an array of imaging cells realized from a plurality of layers formed on a substrate, wherein the plurality of layers includes at least one modulation doped quantum well structure spaced from at least one quantum dot structure. Each respective imaging cell includes an imaging region spaced from a corresponding charge storage region. The at least one quantum dot structure of the imaging region generates photocurrent arising from absorption of incident electromagnetic radiation. The at least one modulation doped quantum well structure defines a buried channel for lateral transfer of the photocurrent for charge accumulation in the charge storage region and output therefrom. The at least one modulation doped quantum well structure and the at least one quantum dot structure of each imaging cell can be disposed within a resonant cavity that receives the incident electromagnetic radiation or below a structured metal film having a periodic array of holes.

Abstract: Improved quantum efficiency of multiple quantum wells. In accordance with an embodiment of the present invention, an article of manufacture includes a p side for supplying holes and an n side for supplying electrons. The article of manufacture also includes a plurality of quantum well periods between the p side and the n side, each of the quantum well periods includes a quantum well layer and a barrier layer, with each of the barrier layers having a barrier height. The plurality of quantum well periods include different barrier heights.

Abstract: A method for forming optical devices includes providing a gallium nitride substrate having a crystalline surface region and a backside region. The backside is subjected to a laser scribing process to form scribe regions. Metal contacts overly the scribe regions.

Abstract: Wavelength converters for solid state lighting devices, and associated systems and methods. A system in accordance with a particular embodiment includes a solid state radiative semiconductor structure having a first region and a second region. The first region is positioned to receive radiation at a first wavelength and has a first composition and an associated first bandgap energy. The second region is positioned adjacent to the first region to receive energy from the first region and emit radiation at a second wavelength different than the first wavelength. The second region has a second composition different than the first composition, and an associated second bandgap energy that is less than the first bandgap energy.

Abstract: Provided is a nitride semiconductor light emitting device including: a first nitride semiconductor layer; an active layer formed above the first nitride semiconductor layer; and a delta doped second nitride semiconductor layer formed above the active layer. According to the present invention, the optical power of the nitride semiconductor light emitting device is enhanced, optical power down phenomenon is improved and reliability against ESD (electro static discharge) is enhanced.

Abstract: Semiconductor structures having insulators coatings and methods of fabricating semiconductor structures having insulators coatings are described. In an example, a method of coating a semiconductor structure involves adding a silicon-containing silica precursor species to a solution of nanocrystals. The method also involves, subsequently, forming a silica-based insulator layer on the nanocrystals from a reaction involving the silicon-containing silica precursor species. The method also involves adding additional amounts of the silicon-containing silica precursor species after initial forming of the silica-based insulator layer while continuing to form the silica-based insulator layer to finally encapsulate each of the nanocrystals.

Abstract: In a semiconductor light emitting element outputting light indicating green color by using a group III nitride semiconductor, light emission output is improved. A semiconductor light emitting element includes: an n-type cladding layer containing n-type impurities (Si); a light emitting layer laminated on the n-type cladding layer; and a p-type cladding layer containing p-type impurities and laminated on the light emitting layer. The light emitting layer has a barrier layer including first to fifth barrier layers and a well layer including first to fourth well layers, and has a multiple quantum well structure to sandwich one well layer by two barrier layers. The light emitting layer is configured such that the first to fourth well layers are set to have a composition to emit green light, and the first barrier layer is doped with n-type impurities, whereas the other barrier layers are not doped with n-type impurities.

Abstract: A light-emitting diode includes a substrate, a stacked semiconductor structure on one side of the substrate, and a reflection layer on the other side of the substrate opposite to the stacked semiconductor structure. At least one contact electrode is disposed on the stacked semiconductor structure. The contact electrode includes a pad electrode and at least one finger electrode extending from the pad electrode. A light-guiding structure is disposed along the finger electrode.

Abstract: A method of fabricating an electromechanical device includes the following steps. A first and a second back gate are formed over a substrate. An etch stop layer is formed covering the first and second back gates. Electrodes are formed over the first and second back gates, wherein the electrodes include one or more gate, source, and drain electrodes, wherein gaps are present between the source and drain electrodes. One or more Janus components are placed the gaps, each of which includes a first portion having an electrically conductive material and a second portion having an electrically insulating material, and wherein i) the first or second portion of the Janus components placed in a first one of the gaps has a fixed positive surface charge and ii) the first or second portion of the Janus components placed in a second one of the gaps has a fixed negative surface charge.

Abstract: Aspects of the disclosure pertain to a system and method for providing an electron blocking layer with doping control. The electron blocking layer is included in a semiconductor assembly. The electron blocking layer includes a lithium aluminate layer. The lithium aluminate layer promotes reduced diffusion of magnesium into a layer stack of the semiconductor assembly.

Abstract: The present invention relates to a primary particle comprised of a primary matrix material containing a population of semiconductor nanoparticles, wherein each primary particle further comprises an additive to enhance the physical, chemical and/or photo-stability of the semiconductor nanoparticles. A method of preparing such particles is described. Composite materials and light emitting devices incorporating such primary particles are also described.

Abstract: Select devices including an open volume that functions as a high bandgap material having a low dielectric constant are disclosed. The open volume may provide a more nonlinear, asymmetric I-V curve and enhanced rectifying behavior in the select devices. The select devices may comprise, for example, a metal-insulator-insulator-metal (MIIM) diode. Various methods may be used to form select devices and memory systems including such select devices. Memory devices and electronic systems include such select devices.

Abstract: The present invention provides materials, structures, and methods for III-nitride-based devices, including epitaxial and non-epitaxial structures useful for III-nitride devices including light emitting devices, laser diodes, transistors, detectors, sensors, and the like. In some embodiments, the present invention provides metallo-semiconductor and/or metallo-dielectric devices, structures, materials and methods of forming metallo-semiconductor and/or metallo-dielectric material structures for use in semiconductor devices, and more particularly for use in III-nitride based semiconductor devices. In some embodiments, the present invention includes materials, structures, and methods for improving the crystal quality of epitaxial materials grown on non-native substrates.

Abstract: A light emitting diode includes a substrate, a first-type semiconductor layer, a nanorod layer and a transparent planar layer. The first-type semiconductor layer is disposed over the substrate. The nanorod layer is formed on the first-type semiconductor layer. The nanorod layer includes a plurality of nanorods and each of the nanorods has a quantum well structure and a second-type semiconductor layer. The quantum well structure is in contact with the first-type semiconductor layer, and the second-type semiconductor layer is formed on the quantum well structure. The transparent planar layer is filled between the nanorods. A surface of the second-type semiconductor layer is exposed out of the transparent planar layer.

Abstract: A layered group III-nitride article includes a single crystal silicon substrate, and a highly textured group III-nitride layer, such as GaN, disposed on the silicon substrate. The highly textured group III-nitride layer is crack free and has a thickness of at least 10 ?m. A method for forming highly textured group III-nitride layers includes the steps of providing a single crystal silicon comprising substrate, depositing a nanostructured InxGa1-xN (1?x?0) interlayer on the silicon substrate, and depositing a highly textured group III-nitride layer on the interlayer. The interlayer has a nano indentation hardness that is less than both the silicon substrate and the highly textured group III-nitride layer.

Abstract: Provided are methods of surface treatment of nanocrystal quantum dots after film deposition so as to exchange the native ligands of the quantum dots for exchange ligands that result in improvement in charge extraction from the nanocrystals.

Abstract: A coated quantum dot and methods of making coated quantum dots are provided. Products including quantum dots described herein are also disclosed.

Abstract: Optoelectronic device including light-emitting means in the form of nanowires (2, 3) having a core/shell-type structure and produced on a substrate (11), in which said nanowires comprise an active zone (22, 32) including at least two types of quantum wells associated with different emission wavelengths and distributed among at least two different regions (220, 221; 320, 321) of said active zone, in which the device also includes a first electrical contact zone (15) on the substrate and a second electrical contact zone (16) on the emitting means, in which said second zone is arranged so that, as the emitting means are distributed according to at least two groups, the electrical contact is achieved for each of said at least two groups at a different region of the active zone, and the electrical power supply is controlled so as to obtain the emission of a multi-wavelength light.

Abstract: Photonic integrated circuits on silicon are disclosed. By bonding a wafer of III-V material as an active region to silicon and removing the substrate, the lasers, amplifiers, modulators, and other devices can be processed using standard photolithographic techniques on the silicon substrate. The coupling between the silicon waveguide and the III-V gain region allows for integration of low threshold lasers, tunable lasers, and other photonic integrated circuits with Complimentary Metal Oxide Semiconductor (CMOS) integrated circuits.

Abstract: A coated quantum dot and methods of making coated quantum dots are provided.

Abstract: A vertical stack including a p-doped GaN portion, a multi-quantum-well, and an n-doped GaN portion is formed on an insulator substrate. The p-doped GaN portion may be formed above, or below, the multi-quantum-well. A dielectric material liner is formed around the vertical stack, and is patterned to physically expose a top surface of the p-doped GaN portion. A selective low temperature epitaxy process is employed to deposit a semiconductor material including at least one elemental semiconductor material on the physically exposed surfaces of the p-doped GaN portion, thereby forming an elemental semiconductor material portion. Metallization is performed on a portion of the elemental semiconductor material portions to form an electrical contact structure that provides effective electrical contact to the p-doped GaN portion through the elemental semiconductor material portion.

Abstract: A method and structure for receiving a micro device on a receiving substrate are disclosed. A micro device such as a micro LED device is punched-through a passivation layer covering a conductive layer on the receiving substrate, and the passivation layer is hardened. In an embodiment the micro LED device is punched-through a B-staged thermoset material. In an embodiment the micro LED device is punched-through a thermoplastic material.

Abstract: Networks of semiconductor structures with fused insulator coatings and methods of fabricating networks of semiconductor structures with fused insulator coatings are described. In an example, a semiconductor structure includes an insulator network. A plurality of discrete semiconductor nanocrystals is disposed in the insulator network. Each of the plurality of discrete semiconductor nanocrystals is spaced apart from one another by the insulator network.

Abstract: An electrochemically-gated field-effect transistor includes a source electrode, a drain electrode, a gate electrode, a transistor channel and an electrolyte. The transistor channel is located between the source electrode and the drain electrode. The electrolyte completely covers the transistor channel and has a one-dimensional nanostructure and a solid polymer-based electrolyte that is employed as the electrolyte.

Abstract: A group III nitride semiconductor optical device 11a has a group III nitride semiconductor substrate 13 having a main surface 13a forming a finite angle with a reference plane Sc orthogonal to a reference axis Cx extending in a c-axis direction of the group III nitride semiconductor and an active layer 17 of a quantum-well structure, disposed on the main surface 13a of the group III nitride semiconductor substrate 13, including a well layer 28 made of a group III nitride semiconductor and a plurality of barrier layers 29 made of a group III nitride semiconductor. The main surface 13a exhibits semipolarity. The active layer 17 has an oxygen content of at least 1×1017 cm?3 but not exceeding 8×1017 cm?3. The plurality of barrier layers 29 contain an n-type impurity other than oxygen by at least 1×1017 cm?3 but not exceeding 1×1019 cm?3 in an upper near-interface area 29u in contact with a lower interface 28Sd of the well layer 28 on the group III nitride semiconductor substrate side.

Abstract: For forming a gate electrode, a conductive film with low resistance including Al or a material containing Al as its main component and a conductive film with low contact resistance for preventing diffusion of Al into a semiconductor layer are laminated, and the gate electrode is fabricated by using an apparatus which is capable of performing etching treatment at high speed.

Abstract: Optoelectronic devices, such as light-emitting diodes, laser diodes, image sensors, optical detectors, etc., made by depositing (growing) one or more epitaxial semiconductor layers on a monocrystalline lamellar/layered substrate so that each layer has a wurtzite crystal structure. In some embodiments, the layers are deposited and then one or more lamellas of the starting substrate are removed from the rest of the substrate. In one subset of such embodiments, the removed lamella(s) is/are partially or entirely removed. In other embodiments, one or more lamellas of the starting substrate are removed prior to depositing the one or more wurtzite-crystal-structure-containing layer(s).

Abstract: An optoelectronic semiconductor chip, the latter includes a carrier and a semiconductor layer sequence grown on the carrier. The semiconductor layer sequence is based on a nitride-compound semiconductor material and contains at least one active zone for generating electromagnetic radiation and at least one waveguide layer, which indirectly or directly adjoins the active zone. A waveguide being formed. In addition, the semiconductor layer sequence includes a p-cladding layer adjoining the waveguide layer on a p-doped side and/or an n-cladding layer on an n-doped side of the active zone. The waveguide layer indirectly or directly adjoins the cladding layer. An effective refractive index of a mode guided in the waveguide is in this case greater than a refractive index of the carrier.

Abstract: An III-nitride quantum well structure includes a GaN base, an InGaN layer and an InGaN covering layer. The GaN base includes a GaN buffering layer, a GaN post extending from the GaN buffering layer, and a GaN pyramid gradually expanding from the GaN post to form a mounting surface. The InGaN layer includes first and second coupling faces. The first coupling face is coupled with the mounting surface. The GaN covering layer includes first and second coupling faces. The first coupling face of the GaN covering layer is coupled with the second coupling face of the InGaN layer. A method for manufacturing the III-nitride quantum well structure and a light-emitting unit having a plurality of III-nitride quantum well structures are also proposed.

Abstract: An apparatus, system, and method are provided for a vertical two-terminal nanotube device configured to capture and generate energy, to store electrical energy, and to integrate these functions with power management circuitry. The vertical nanotube device can include a column disposed in an anodic oxide material extending from a first distal end of the anodic oxide material to a second distal end of the anodic oxide material. Further, the vertical nanotube device can include a first material disposed within the column, a second material disposed within the column, and a third material disposed between the first material and the second material. The first material fills the first distal end of the column and extends to the second distal end of the column along inner walls of the column. The second material fills the first distal end of the column and extends to the second distal end of the column within the first material.

Abstract: A III-nitride based device provides improved current injection efficiency by reducing thermionic carrier escape at high current density. The device includes a quantum well active layer and a pair of multi-layer barrier layers arranged symmetrically about the active layer. Each multi-layer barrier layer includes an inner layer abutting the active layer; and an outer layer abutting the inner layer. The inner barrier layer has a bandgap greater than that of the outer barrier layer. Both the inner and the outer barrier layer have bandgaps greater than that of the active layer. InGaN may be employed in the active layer, AlInN, AlInGaN or AlGaN may be employed in the inner barrier layer, and GaN may be employed in the outer barrier layer. Preferably, the inner layer is thin relative to the other layers. In one embodiment the inner barrier and active layers are 15 ? and 24 ? thick, respectively.

Abstract: A light emitting diode is provided, which includes an n-type contact layer and a light generating structure adjacent to the n-type contact layer. The light generating structure includes a set of quantum wells. The contact layer and light generating structure can be configured so that a difference between an energy of the n-type contact layer and an electron ground state energy of a quantum well is greater than an energy of a polar optical phonon in a material of the light generating structure. Additionally, the light generating structure can be configured so that its width is comparable to a mean free path for emission of a polar optical phonon by an electron injected into the light generating structure. The diode can include a blocking layer, which is configured so that a difference between an energy of the blocking layer and the electron ground state energy of a quantum well is greater than the energy of the polar optical phonon in the material of the light generating structure.

Abstract: In at least one embodiment of the optoelectronic semiconductor chip (1), the latter is based on a nitride material system and comprises at least one active quantum well (2). The at least one active quantum well (2) is designed to generate electromagnetic radiation when in operation. Furthermore, the at least one active quantum well (2) comprises N successive zones (A) in a direction parallel to a growth direction z of the semiconductor chip (1), N being a natural number greater than or equal to 2. At least two of the zones (A) of the active quantum well (2) have mutually different average indium contents c. Furthermore the at least one active quantum well (2) fulfills the condition: 40??c(z)dz?2.5N?1.5?dz?80.

Abstract: A photodetector is provided with a high contrast grating (HCG) reflector first reflector that has a two dimensional periodic structure. The two dimensional structure is a periodic structure that is a symmetric structure with periodic repeating. The symmetrical structure provides that polarization modes of light are undistinguishable. A second reflector is in an opposing relationship to the first reflector. A tunable optical cavity is between the first and second reflectors. An active region is positioned in the cavity between the first and second reflectors. The photodetector is polarization independent. An MQW light absorber is included converts light to electrons.

Abstract: A semiconductor device, such as an LED, includes a plurality of first conductivity type semiconductor nanowire cores located over a support, a continuous second conductivity type semiconductor layer extending over and around the cores, a plurality of interstitial voids located in the second conductivity type semiconductor layer and extending between the cores, and first electrode layer that contacts the second conductivity type semiconductor layer and extends into the interstitial voids.

Abstract: Disclosed is a light emitting element, which emits light with small power consumption and high luminance. The light emitting element has: a IV semiconductor substrate; two or more core multi-shell nanowires disposed on the IV semiconductor substrate; a first electrode connected to the IV semiconductor substrate; and a second electrode, which covers the side surfaces of the core multi-shell nanowires, and which is connected to the side surfaces of the core multi-shell nanowires. Each of the core multi-shell nanowires has: a center nanowire composed of a first conductivity type III-V compound semiconductor; a first barrier layer composed of the first conductivity type III-V compound semiconductor; a quantum well layer composed of a III-V compound semiconductor; a second barrier layer composed of a second conductivity type III-V compound semiconductor; and a capping layer composed of a second conductivity type III-V compound semiconductor.

Abstract: A semiconductor device including a heterostructure having at least one low-resistivity p-type GaSb quantum well is provided. The heterostructure includes a layer of InwAl1?wAs on a semi-insulating (100) InP substrate, where the InwAl1?wAs is lattice matched to InP, followed by an AlAsxSb1?x buffer layer on the InwAl1?wAs layer, an AlAsxSb1?x spacer layer on the buffer layer, a GaSb quantum well layer on the spacer layer, an AlAsxSb1?x barrier layer on the quantum well layer, an InyAl1?ySb layer on the barrier layer, and an InAs cap. The semiconductor device is suitable for use in low-power electronic devices such as field-effect transistors.