Abstract: An impedance spectrometer comprised of a thermal micro-platform supported with phononic structured nanowires disposed within a micromachined structure is provided to identify, monitor and characterize a gas, vapor, solid or liquid analyte. The impedance sensor and analyte sensing element in embodiments are formed from a semiconductor SOI starting wafer.

Abstract: A magnetic memory device may include a free magnetic pattern and a capping pattern on a surface of the free magnetic pattern. The capping pattern may include first and second metal elements. The capping pattern may include a first portion adjacent to an interface between the free magnetic pattern and the capping pattern, and a second portion spaced apart from the interface. The first metal element may have a concentration greater in the first portion than in the second portion. The first metal element may have an atomic weight smaller than that of the second metal element. The concentration of the first metal element along the thickness direction of the capping pattern may be proportional to a proximity to the interface.

Abstract: A bonded structure can include a first element having a first conductive interface feature and a second element having a second conductive interface feature. An integrated device can be coupled to or formed with the first element or the second element. The first conductive interface feature can be directly bonded to the second conductive interface feature to define an interface structure. The interface structure can be disposed about the integrated device in an at least partially annular profile to connect the first and second elements.

Abstract: A method of fabricating an integrated structure for MEMS device and semiconductor device comprises steps of: providing a substrate having a transistor thereon in a semiconductor device region and a first MEMS component thereon in a MEMS region; performing a interconnect process on the substrate in the semiconductor device region to form a plurality of first dielectric layers, at least a conductive plug and at least a conductive layer in the first dielectric layers; forming a plurality of second dielectric layers and an etch stopping device in the second dielectric layers on the substrate in a etch stopping device region; forming a plurality of third dielectric layers and at least a second MEMS component in the third dielectric layers on the substrate in the MEMS region; and performing an etching process to remove the third dielectric layers in the MEMS region.

Abstract: Trapped sacrificial structures and thin-film encapsulation methods that may be implemented to manufacture trapped sacrificial structures such as relative humidity sensor structures, and spacer structures that protect adjacent semiconductor structures extending above a semiconductor die substrate from being contacted by a molding tool or other semiconductor processing tool in an area of a die substrate adjacent the spacer structures.

Abstract: The present disclosure relates to a microelectronics package with optical sensors and/or thermal sensors. The disclosed microelectronics package includes a module substrate, a thinned flip-chip die with an upper surface that includes a first surface portion and a second surface portion surrounding the first surface portion, and a first mold compound component. The thinned flip-chip die is attached to the module substrate and includes a device layer with sensor structure integrated at a top portion of the device layer. Herein, the sensor structure is below the first surface portion and not below the second surface portion. The first mold compound component is formed over the second surface portion to define a first cavity over the upper surface of the thinned flip-chip die. The first mold compound component is not over the first surface portion, and the first surface portion is exposed at the bottom of the first cavity.

Abstract: Embodiments of the present invention relate generally to logic devices, and more particularly, to magnetoelectric magnetic tunneling junction computational devices. Aspects of the disclosed technology include a stand-alone voltage-controlled magnetoelectric device that satisfies essential requirements for general logic applications, including nonlinearity, gain, concatenability, feedback prevention, and a complete set of Boolean operations based on the majority gate and inverter. Aspects of the present disclosed technology can eliminate the need for any auxiliary FETs to preset or complicated clocking schemes, and prevents the racing condition.

Abstract: A microelectromechanical system includes a membrane of amorphous carbon having a thickness between 1 nm and 50 nm, and for example between 3 nm and 20 nm.

Abstract: A method, device, and apparatus is provided for detecting moisture and/or electrically conductive remains on a wafer after the wafer is removed from a drying chamber of a processing tool that includes wet clean processing. Embodiments include fixing a wafer to an endeffector between a processing chamber and a FOUP, moving the wafer from the processing chamber toward the FOUP, detecting moisture and/or electrically conductive remains on the wafer, and delivering the wafer to the FOUP, if no moisture and/or electrically conductive remains are detected, or delivering the wafer to a buffer station, if moisture and/or electrically conductive remains are detected.

Abstract: A bioactive material delivery system can include a thermoresponsive polymer membrane and nanowires distributed within the thermoresponsive polymer membrane. Magnetic activation of a thermoresponsive polymer membrane can take place via altering the magnetization or dimensions of nanowires dispersed or ordered within the membrane matrix.

Abstract: An ISFET includes a control gate coupled to a floating gate in a CMOS device. The control gate, for example, a poly-to-well capacitor, is configured to receive a bias voltage and effect movement of a trapped charge between the control gate and the floating gate. The threshold voltage of the ISFET can therefore by trimmed to a predetermined value, thereby storing the trim information (the amount of trapped charge in the floating gate) within the ISFET itself.

Abstract: According to one aspect, a system for sensing ethanol from human skin, that comprises at least one apparatus for sensing ethanol and a coupling matrix readout extraction unit for performing a method of extracting a coupling-matrix readout. The at least one sensing apparatus and the coupling matrix readout extraction may be mounted on a substrate. The substrate may be adapted such that it can be formed into a wearable accessory that can be worn by a human subject. When the wearable accessory is worn by the human subject such that the subject provides a skin tissue sample to the accessory, the presence or concentration of ethanol and other compounds may be determined from the vapor associated with the tissue sample.

Abstract: A pressure sensor package includes a pressure sensor having a first side attached to a substrate and a second side opposite the first side, the first side having a pressure inlet aligned with an opening in the substrate, the second side having one or more electrical contacts. A logic die attached to an opposite side of the substrate as the pressure sensor is operable to process signals from the pressure sensor. First electrical conductors connect to the one or more electrical contacts of the pressure sensor. Second electrical conductors connect to one or more electrical contacts of the logic die. A mold compound completely encapsulates the second electrical conductors and at least partly encapsulates the logic die and the first electrical conductors. An open passage in the mold compound is aligned with the opening in the substrate so as to define a pressure port of the pressure sensor package.

Abstract: Thermopile infrared sensor structure with a high filling level in a housing filled with a medium (15), consisting of a carrier substrate (11) which has electrical connections (28, 28?) to the outside and is closed with an optical assembly (13), wherein a sensor chip (14) is applied to the carrier substrate (11) in the housing, which chip has a plurality of thermoelectric sensor element structures (16), the so-called “hot contacts” (10) of which are located on individual diaphragms (3) which are stretched across a respective cavity (9) in a silicon carrying body (24) with good thermal conductivity, wherein the “cold contacts” (25) are located on or in the vicinity of the silicon carrying body (24). The problem addressed by the invention is that of specifying a thermopile infrared array sensor (sensor cell) which, with a small chip size, has a high thermal resolution and a particularly high filling level.

Abstract: In a Hall sensor in which a Hall element and elements serving as heat sources out of components of a circuit for driving the Hall element are arranged close to each other on a silicon substrate, two directions of control currents by spinning current for the Hall element are selected in a vector manner based on signals from temperature sensors arranged close to a periphery of the Hall element, thereby enabling the elimination of a magnetic offset caused by heat generation of the heat sources.

Abstract: The present disclosure relates to a microelectronics package with optical sensors and/or thermal sensors. The disclosed microelectronics package includes a module substrate, a thinned flip-chip die with an upper surface that includes a first surface portion and a second surface portion surrounding the first surface portion, and a first mold compound component. The thinned flip-chip die is attached to the module substrate and includes a device layer with sensor structure integrated at a top portion of the device layer. Herein, the sensor structure is below the first surface portion and not below the second surface portion. The first mold compound component is formed over the second surface portion to define a first cavity over the upper surface of the thinned flip-chip die. The first mold compound component is not over the first surface portion, and the first surface portion is exposed at the bottom of the first cavity.

Abstract: Semiconductor devices with enclosed cavities and methods for fabricating semiconductor devices with enclosed cavities are provided. In an embodiment, a method for fabricating a semiconductor device with a cavity includes forming a sacrificial structure in and/or over a substrate. The method includes depositing a permeable layer over the sacrificial structure and the substrate. Further, the method includes etching the sacrificial structure through the permeable layer to form the cavity bounded by the substrate and the permeable layer.

Abstract: An electrical contact structure (10) for a semiconductor component (100) is specified, comprising a transparent electrically conductive contact layer (1), on which a first metallic contact layer (2) is applied, a second metallic contact layer (3), which completely covers the first metallic contact layer (2), and a separating layer (4), which is arranged between the transparent electrically conductive contact layer (1) and the second metallic contact layer (3) and which separates the second metallic contact layer (3) from the transparent electrically conductive contact layer (1). Furthermore, a semiconductor component (100) comprising a contact structure (10) is specified.

Abstract: A method of forming semiconductor fins includes forming a plurality of sacrificial template fins from a first semiconductor material; epitaxially growing fins of a second semiconductor material on exposed sidewall surfaces of the sacrificial template fins; and removing the plurality of sacrificial template fins.

Abstract: The present disclosure relates to a microelectronics package with optical sensors and/or thermal sensors. The disclosed microelectronics package includes a module substrate, a thinned flip-chip die with an upper surface that includes a first surface portion and a second surface portion surrounding the first surface portion, and a first mold compound component. The thinned flip-chip die is attached to the module substrate and includes a device layer with sensor structure integrated at a top portion of the device layer. Herein, the sensor structure is below the first surface portion and not below the second surface portion. The first mold compound component is formed over the second surface portion to define a first cavity over the upper surface of the thinned flip-chip die. The first mold compound component is not over the first surface portion, and the first surface portion is exposed at the bottom of the first cavity.

Abstract: Provided is a method of manufacturing TFT substrate, the method including: forming a first conductive layer and a gate electrode; forming a gate insulating layer covering the first conductive layer and the gate electrode; forming a first contact hole exposing the first conductive layer through the gate insulating layer; forming, on the gate insulating layer of a pixel area, an oxide semiconductor pattern comprising a first region which is conductive, a second region which is conductive, and a third region between the first region and the second region; forming a source electrode contacting the first region of the oxide semiconductor pattern, a drain electrode contacting the second region of the oxide semiconductor pattern and a second conductive layer contacting the first conductive layer on a non-pixel area. Each of the first region and the second region overlaps the gate electrode.

Abstract: Package structures and methods of forming package structures are described. A method includes placing a first package within a recess of a first substrate. The first package includes a first die. The method further includes attaching a first sensor to the first package and the first substrate. The first sensor is electrically coupled to the first package and the first substrate.

Abstract: A ceramic multi-layer capacitor includes a main body, which has ceramic layers arranged along a layer stacking direction to form a stack, and first and second electrode layers arranged between the ceramic layers. The multi-layer capacitor also includes a first external contact-connection arranged on a first side surface of the main body and electrically conductively connected to the first electrode layers, and a second external contact-connection arranged on a second side surface of the main body. The second side surface is situated opposite the first side surface and is electrically conductively connected to the second electrode layers.

Abstract: A package structure includes a device chip, a MEMS die, a cap structure, and an eutectic bonding layer. The MEMS die is over the device chip and includes a substrate having a plurality of cavities and a conductive layer covering a bottom surface and sidewalls of each of the cavities. The cap structure is coupled to the MEMS die, and the cap structure includes a base substrate having at least one seal ring located in the cavities and a bonding layer covering a first surface and at least part of sidewalls of the seal ring. The first surface of the seal ring faces the MEMS die. The eutectic bonding layer is located between the conductive layer and the bonding layer in the cavities. In addition, a method of manufacturing the package structure is provided.

Abstract: Encapsulated MEMS switches are disclosed along with methods of manufacturing the same. A first sacrificial layer is used to form the actuation member of the MEMS switch. A second sacrificial layer is used to form the enclosure that encapsulates the MEMS switch.

Abstract: A complementary metal-oxide-semiconductor depth sensor element comprises a photogate formed in a photosensitive area on a substrate. A first transfer gate and a second transfer gate are formed respectively on two sides of the photogate in intervals. A first floating doped area and a second floating doped area are formed respectively on the outer sides of the first transfer gate and the second transfer gate. The first and second floating doped regions have dopants of a first polarity and the semiconductor area has dopants of a second polarity opposite to the first polarity. Since the photogate and at least parts of the first and second transfer gates connect to the same semiconductor area and no other dopants of polarity opposite to the second polarity. Therefore, the majority carriers from the photogate excited by lights drift, but not diffuse, to transfer to the first and second transfer gates.

Abstract: Stress relief structures and methods that can be applied to MEMS sensors requiring a hermetic seal and that can be simply manufactured are disclosed. The system includes a sensor having a first surface and a second surface, the second surface being disposed away from the first surface, the second surface also being disposed away from a package surface and located between the first surface and the package surface, a number of support members, each support member extending from the second surface to the package surface, the support members being disposed on and operatively connected to only a portion of the second surface. The support member are configured to reduce stress produced by package-sensor interaction.

Abstract: A semiconductor device package includes a carrier, a sensor element disposed on or within the carrier, a cover and a filter. The cover includes a base substrate and a periphery barrier. The base substrate includes an inner sidewall. The inner sidewall of the base substrate defines a penetrating hole extending from a top surface of the base substrate to a bottom surface of the base substrate; at least a portion of the inner sidewall of the base substrate is tilted. The periphery barrier is coupled to the bottom surface of the base substrate and contacts a top surface of the carrier. The filter is disposed on the top surface of the base substrate and covers the penetrating hole.

Abstract: A system and method for a micro-electrical-mechanical system (MEMS) device including a substrate and a free-standing and suspended electroplated metal MEMS structure formed on the substrate. The free-standing and suspended electroplated metal MEMS structure includes a metal mechanical element mechanically coupled to the substrate and a seed layer mechanically coupled to and in electrical communication with the mechanical element, the seed layer comprising at least one of a refractory metal and a refractory metal alloy, wherein a thickness of the mechanical element is substantially greater than a thickness of the seed layer such that the mechanical and electrical properties of the free-standing and suspended electroplated metal MEMS structure are defined by the material properties of the mechanical element.

Abstract: An all-flat sensor includes a coupling substrate; a sensing chip, which is disposed on the coupling substrate, has first electrodes arranged in an array and a first dielectric layer covering over the first electrodes, and is electrically connected to the coupling substrate; and a second dielectric layer covering over the sensing chip and providing an outlook color. An electronic device using the all-flat sensor is also provided.

Abstract: A multilayer ceramic electronic component and a board having the same are provided. The multilayer ceramic electronic component includes a multilayer ceramic capacitor including external electrodes including front portions and band portions extended from the front portions, terminal electrodes respectively surrounding the front portions and portions of lower surfaces of the band portions of the external electrodes and respectively having a ‘’ shaped groove portion formed in lower portions thereof, and conductive adhesive layers connecting the external electrodes and the terminal electrodes to each other.

Abstract: Disclosed is an integrated circuit comprising a substrate (10); and an optical CO2 sensor comprising: first and second light sensors (12, 12?) on said substrate, said second light sensor being spatially separated from the first light sensor; and a layer portion (14) including an organic compound comprising at least one amine or amidine functional group over the first light sensor; wherein said integrated circuit further comprises a signal processor (16) coupled to the first and second light sensor for determining a difference in the respective outputs of the first and second light sensor. An electronic device comprising such a sensor and a method of manufacturing such an IC are also disclosed.

Abstract: A method and system for forming a MEMS device are disclosed. In a first aspect, the method comprises providing a conductive material over at least a portion of a top metal layer of a base substrate, patterning the conductive material and the at least a portion of the top metal layer, and bonding the conductive material with a device layer of a MEMS substrate via metal silicide formation. In a second aspect, the MEMS device comprises a MEMS substrate, wherein the MEMS substrate includes a handle layer, a device layer, and an insulating layer in between. The MEMS device further comprises a base substrate, wherein the base substrate includes a top metal layer and a conductive material over at least a portion of the top metal layer, wherein the conductive material is bonded with the device layer via metal silicide formation.

Abstract: A device having an integrated noise shield is disclosed. The device includes a plurality of vertical shielding structures substantially surrounding a semiconductor device. The device further includes an opening above the semiconductor device substantially filled with a conductive fluid, wherein the plurality of vertical shielding structures and the conductive fluid shield the semiconductor device from ambient radiation. In some embodiments, the device further includes a conductive bottom shield below the semiconductor device shielding the semiconductor device from ambient radiation. In some embodiments, the opening is configured to allow a biological sample to be introduced into the semiconductor device. In some embodiments, the vertical shielding structures comprise a plurality of vias, wherein each of the plurality of vias connects more than one conductive layers together.

Abstract: A method for integrating complementary metal-oxide-semiconductor (CMOS) devices with a microelectromechanical systems (MEMS) device using a flat surface above a sacrificial layer is provided. In some embodiments, a back-end-of-line (BEOL) interconnect structure is formed covering a semiconductor substrate, where the BEOL interconnect structure comprises a first dielectric region. A sacrificial layer is formed over the first dielectric region, and a second dielectric region is formed covering the sacrificial layer and the first dielectric region. A planarization is performed into an upper surface of the second dielectric region to planarize the upper surface. A MEMS structure is formed on the planar upper surface of the second dielectric region. A cavity etch is performed into the sacrificial layer, through the MEMS structure, to remove the sacrificial layer and to form a cavity in place of the sacrificial layer. An integrated circuit (IC) resulting from the method is also provided.

Abstract: An infrared thermal sensor for detecting infrared radiation is described. It comprises a substrate and a cap structure together forming a sealed cavity. A membrane is suspended therein by a plurality of beams, each beam comprising at least one thermocouple arranged therein or thereon for measuring a temperature difference between the membrane and the substrate. At least two beams have a different length and each of the thermocouples have a substantially same constant width to length ratio such that the thermal resistance measured between the membrane and the substrate is substantially constant for each beam, and such that the electrical resistance measured between the membrane and the substrate is substantially constant for each beam. The beams may be linear, and be oriented in a non-radial direction.

Abstract: An image sensor includes an image sensing plane in which a plurality of pixels are two-dimensionally arranged and at least a portion of a region thereof has a curved shape, and a plurality of well contacts that fix a well potential and are connected to a portion of pixels from among the plurality of pixels. The well contacts are arranged such that an arrangement density thereof in the image sensing plane is different in each region according to the curved shape of the image sensing plane.

Abstract: The present disclosure provides a method for manufacturing a CMOS-MEMS structure. The method includes etching a cavity on a first surface of a cap substrate; bonding the first surface of the cap substrate with a sensing substrate; thinning a second surface of the sensing substrate, the second surface being opposite to a third surface of the sensing substrate bonded to the cap substrate; etching the second surface of the sensing substrate; patterning a portion of the second surface of the sensing substrate to form a plurality of bonding regions; depositing an eutectic metal layer on the plurality of bonding regions; etching a portion of the sensing substrate under the cavity to form a movable element; and bonding the sensing substrate to a CMOS substrate through the eutectic metal layer.

Abstract: A multilayer ceramic capacitor and a board having the same are provided. The multilayer ceramic capacitor includes a ceramic body including internal electrodes having lead-out portions formed on ends thereof, and external electrodes disposed on portions of end surfaces of the ceramic body to be connected to the lead-out portions, and terminal electrodes coupled to both end portions of the ceramic body and including horizontal portions disposed below the ceramic body and vertical portions spaced apart from the end surfaces of the ceramic body, connected to the external electrodes, and having groove portions, and conductive adhesion layers disposed on the vertical portions of the terminal electrodes to contact the external electrodes through the groove portions.

Abstract: The disclosed technology relates generally to a method and system for micro assembling GaN materials and devices to form displays and lighting components that use arrays of small LEDs and high-power, high-voltage, and or high frequency transistors and diodes. GaN materials and devices can be formed from epitaxy on sapphire, silicon carbide, gallium nitride, aluminum nitride, or silicon substrates. The disclosed technology provides systems and methods for preparing GaN materials and devices at least partially formed on several of those native substrates for micro assembly.

Abstract: The imaging apparatuses according to the embodiments perform an operation of outputting a plurality of signals from pixels to an output line a plurality of times. In each operation, both of first and second transfer switches are brought into an on state so that a discharge operation of discharging charge of a photoelectric conversion unit through a holding unit is performed. In a first period, the photoelectric conversion unit of at least one of the pixels accumulates charge. The operation performed a plurality of times includes a first operation and a second operation to be performed after the first operation. After the output operation in the first operation is terminated, the discharge operation in the second operation is performed.

Abstract: A finger biometric sensor may include a lower conductive layer, an upper conductive layer, and a spacer between the lower and upper conductive layers to define an air gap therebetween. The finger biometric sensor may also include a finger biometric sensing integrated circuit (IC) above the upper conductive layer and capable of deflecting the upper conductive layer toward the lower conductive layer to change a capacitance thereof based upon pressure applied to the finger biometric sensing IC. A pressure sensing circuit may be coupled to the lower and upper conductive layers to sense the change in capacitance.

Abstract: After forming a blanket silicon germanium (SiGe) layer over a thinned silicon (Si) layer of a silicon-on-insulator (SOI) substrate, a portion of the SiGe layer located in an n-type FET (nFET) region of the SOI substrate is recessed, while masking another portion of the SiGe layer located in a p-type FET (pFET) region of the SOI substrate. The recessed portion of the SiGe layer in the nFET region is subsequently removed with an in-situ pre-clean etch. An epitaxial Si layer is re-grown in the nFET region over a portion of the thinned Si layer that is exposed by the removal of the recessed portion of the SiGe layer.

Abstract: A semiconductor device includes a microelectromechanical system (MEMS) die, an encapsulation material, a via element, a non-conductive lid, and a conductive layer. The encapsulation material laterally surrounds the MEMS die. The via element extends through the encapsulation material. The non-conductive lid is over the MEMS die and defines a cavity. The conductive layer is over the MEMS die and the encapsulation material and is electrically coupled to the via element.

Abstract: A method for forming a MEMS device is disclosed. The MEMS device includes a MEMS substrate and a base substrate. The MEMS substrate, where includes a handle layer, a device layer and an insulating layer in between. The method includes the sequential steps of: providing a standoff on the device layer; etching a via through the device layer and the insulating layer; providing a contact layer within the via, wherein the contact layer provides electrical connection between the device layer and the handle layer; providing a bonding layer on the standoff; and bonding the bonding layer to pads on the base substrate.

Abstract: Provided is a hydrogen ion sensor including: a substrate having a well and a first contact, the well having a second, a third, a fourth and a fifth contacts, the second contact having the same conductive type as the well, and the third, the fourth, and the fifth contacts having an opposite conductive type to the well; a first gate insulation layer on a region between the fourth contact and the fifth contact; a second gate insulation layer on a region between the third contact and the fourth contact; and a hydrogen ion sensing unit formed on the first gate insulation layer, wherein the hydrogen ion sensing unit transfers a voltage level adjusted according to a hydrogen ion concentration of a solution to be measured, to the first gate insulation layer.

Abstract: A mounting member includes: an insulating substrate, a first die pad unit, first and second terminals. The insulating substrate has a rectangular first surface, a second surface, a first side surface, a second side surface, a third side surface, and a fourth side surface. A through hole is provided from the first surface to the second surface. The first die pad unit is provided on the first surface. The first terminal has a conductive region covering the first side surface, the first surface, and the second surface. The second terminal has a conductive region covering the second side surface and the second surface, connected to the first die pad unit by conductive material provided in the through hole or on a side wall of the through hole. The first die pad unit, the first terminal, and the second terminal are apart from one another.

Abstract: A three dimensional integrated circuit (3DIC) includes a first substrate and a heat spreading structure embedded in the first substrate. The 3DIC further includes a die electrically connected to the first substrate, wherein the die is thermally connected to the heat spreading structure. The 3DIC further includes a plurality of memory units on the die, wherein the die is between the plurality of memory units and the first substrate, and the plurality of memory units is thermally connected to the heat spreading structure by the die. The 3DIC further includes an external cooling unit on the plurality of memory units, wherein the plurality of memory units is between the die and the external cooling unit, and the die is thermally connected to the external cooling unit by the plurality of memory units.

Abstract: An active RFID device includes at least one solar cell, and the solar cell includes: a substrate; a first conductive layer, disposed on the substrate; an electron supplying layer, disposed on the first conductive layer; an electron receiving layer, disposed on the electron supplying layer; and a second conductive layer, disposed on the electron receiving layer; and a RFID tag, including a RFID chip and an antenna, and installed on the substrate, and coupled to the solar cell through a telecommunication connection structure.

Abstract: According to one aspect, the present invention concerns a terahertz modulator (1) intended to be used in a given frequency band of use. The modulator comprises a semi-conductor polar crystal (330) presenting a Reststrahlen band overlapping said frequency band of use and presenting at least one interface with a dielectric medium, coupling means (330) allowing the resanant coupling of an interface phonon polariton (IPhP) supported by said interface and of an incident radiation (2) of pre-determined frequency lying in said frequency band of use and means of control (22) apt to modify the intensity of the coupling between said interface phonon polariton and said incident radiation (2) by modification of the dielectric function of the polar crystal in the Reststrahlen band of the polar crystal (10).