Abstract: An organic light emitting diode display includes: a substrate; and a plurality of red organic light emitting diodes, green organic light emitting diodes, and blue organic light emitting diodes on the substrate, each of the plurality of red organic light emitting diodes, green organic light emitting diodes, and blue organic light emitting diodes including: a first electrode on the substrate; an organic layer on the first electrode; and a second electrode on the organic layer, and the organic layer includes a light emission auxiliary layer on the first electrode and an organic light emitting layer on the light emission auxiliary layer, and the organic layer of each of the red organic light emitting diodes has a thickness of about 90 to 110 nm.

Abstract: A board main body of a board has a sensor mounting area, in which a physical quantity sensor is mounted, disposed on a surface. A non-electrode forming part and a plurality of electrodes are disposed in the sensor mounting area, the electrodes being disposed so as to be isolated from each other, and to correspond to mounting terminals of the physical quantity sensor. A shield electrode is disposed outside the sensor mounting area.

Abstract: In a general aspect, a wireless multichip module can include a leadframe structure with portions configured to receive at least one flip-chip mounted semiconductor die, including one or more of an integrated circuit, a high side MOSFET and/or a low side MOSFET, which can form a half-bridge circuit that is encapsulated in a molding compound. The module can be assembled without any bond wires (e.g., be wireless). The module may include carry passive components including an external input capacitor and/or an internal input capacitor.

Abstract: A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a molded semiconductor device, a first redistribution layer, a second redistribution layer, and a plurality of through interlayer vias. The molded semiconductor device includes a die. The first redistribution layer is disposed on a first side of the molded semiconductor device. The second redistribution layer is disposed on a second side of the molded semiconductor device opposite to the first side, wherein the second redistribution layer includes a patterned metal layer having an interconnection circuit portion electrically connected to the die and a metal ring surrounding and insulated from the interconnection circuit portion. The through interlayer vias are located right under the metal ring and extending through the molded semiconductor device to be electrically connect the first redistribution layer and the second redistribution layer.

Abstract: A capacitive coupled resonator device includes a substrate, a bottom electrode, a piezoelectric layer, a top electrode, and at least one set of support pillars positioned between the piezoelectric layer and the top electrode and/or between the piezoelectric layer and the bottom electrode. The top electrode includes a first top comb electrode having a first top bus bar and first top fingers extending in a first direction from the first top bus bar, and a second top comb electrode having a second top bus bar and second top fingers extending in a second direction from the second top bus bar, the second direction being substantially opposite the first direction such that the first and second top fingers form a top interleaving pattern. The at least one set of support pillars separates at least one of the top and bottom electrodes from the piezoelectric layer, respectively, thereby defining corresponding air-gaps.

Abstract: An integrated circuit (IC) package includes a first substrate; a second substrate disposed over the first substrate; a plurality of connectors disposed between the first and second substrates such to electrically couple the first and second substrate; a constraint layer disposed over the first and second substrates such that a cavity is formed between the constraint layer and the first substrate; and a molding material disposed within the cavity and extending through the constraint layer. The constraint layer has a top surface and an opposing bottom surface and the molding material extends from the top surface to the bottom surface of the constraint layer.

Abstract: MEMS packages, modules, and methods of fabrication are described. In an embodiment, a MEMS package includes a MEMS die and an IC die mounted on a front side of a surface mount substrate, and a molding compound encapsulating the IC die and the MEMS die on the front side of the surface mount substrate. In an embodiment, a landing pad arrangement on a back side of the surface mount substrate forms and anchor plane area for bonding the surface mount substrate to a module substrate that is not directly beneath the MEMS die.

Abstract: Aspects of the present invention provide a freestanding microfluidic pipette with integrated wells for solution storage. Further aspects of the invention provide a holding interface to provide connectivity with external control components. One aspect of the invention provides a system for applying a microfluidic device in microscopy. The system includes: a microfluidic device having an elongated shape and defining one or more wells for solution storage and processing; and an interface adapted and configured to hold the microfluidic device in a freestanding manner and facilitate simultaneous connection of the one or more wells with a flow controller. Another aspect of the invention provides a method for utilizing a microfluidic device. The method includes: providing a device as described herein; positioning the device adjacent to a microscope; and actuating the interface to operate the microfluidic device.

Abstract: A method includes epitaxially growing a first III-V compound semiconductor, wherein the first III-V compound semiconductor is of p-type. The first III-V compound semiconductor is grown using precursors including a first precursor comprising Cp2Mg, and a second precursor comprising a donor impurity. A second III-V compound semiconductor is grown overlying and contacting the first III-V compound semiconductor. The second III-V compound semiconductor is of n-type.

Abstract: In an electronic component, a functional circuit, signal wiring electrically connected to the functional circuit, and ground wiring electrically connected to the functional circuit and electrically connected to a ground potential are located on one surface of a circuit substrate, a frame member is provided to secure a region between itself and an outer peripheral edge of a first main surface of the circuit substrate and so as to surround the functional circuit, the ground wiring extends from inside to outside the frame member, and a shield member extends from a second main surface of the circuit substrate to a region on the first main surface via the side surfaces, the shield member being electrically connected to the ground wiring in the region outside the frame member.

Abstract: A sensor device may include an electronic device that has at least one integrated circuit device and a MEMS sensor that are each monolithically integrated with a semiconductor substrate. The sensor device may include a suspension structure that suspends the MEMS sensor over a back cavity within the semiconductor substrate. The suspension structure may be springs or a spring structure formed from etching the front side of the substrate.

Abstract: A MEMS device and a method for manufacturing a MEMS device are disclosed. In an embodiment the MEMS device comprises a support having a cavity therethrough and a membrane extended over the cavity of the support, wherein the membrane is at least partially reinforced by graphene.

Abstract: Some embodiments include a construction having a second semiconductor material over a first semiconductor material. A region of the second semiconductor material proximate the first semiconductor material has strain due to different lattice characteristics of the first and second semiconductor materials. A transistor gate extends downwardly into the second semiconductor material. Gate dielectric material is along sidewalls and a bottom of the transistor gate. Source/drain regions are along the sidewalls of the transistor gate, and the gate dielectric material is between the source/drain regions and the transistor gate. A channel region extends between the source/drain regions and is under the bottom of the transistor gate. At least some of the channel region is within the strained region.

Abstract: A method of forming a resonator by providing a first layer; forming a sacrificial layer on the first layer; forming a capping layer on the sacrificial layer; forming at least one etching aperture in the capping layer; forming at least one additional aperture having a different size than the at least one etching aperture; forming a cavity and releasing a resonator structure within the cavity by removing the sacrificial layer by etching via the at least one etching aperture; sealing the at least one etching aperture; and forming a lining in the at least one additional aperture.

Abstract: Membrane transducer structures and thin-film encapsulation methods for manufacturing the same are provided. In one example, the thin film encapsulation methods may be implemented to co-integrate processes for thin-film encapsulation and formation of microelectronic devices and microelectromechanical systems (MEMS) that include the membrane transducers.

Abstract: The present invention relates to a touch module and a method of fabricating the touch module. The method comprises: providing a substrate plate, applying an adhesive layer on the substrate plate, forming a sensing line trough and a peripheral line trough on the adhesive layer, forming a first conductive layer in the sensing line trough and a second conductive layer in the peripheral line trough, wherein the first conductive layer in the sensing line trough serves as a sensing line, covering an anti acid film on the sensing line trough, electroplating an electroplated layer on the second conductive layer in the peripheral line trough, wherein the electroplated layer plus the second conductive layer serve as a peripheral line, and removing the anti acid film. Comparing to the prior art, the invention reduces the width of the peripheral line, lowers the resistance of the peripheral line, and improves yield rate.

Abstract: A method and system for providing a MEMS sensor integrated with a flip chip are disclosed. In a first aspect, the system comprises a MEMS sensor, at least one flip chip coupled to the MEMS sensor, and at least one through-silicon via (TSV) that electrically connects the at least one flip chip to the MEMS sensor. In a second aspect, the system comprises a MEMS sensor that includes a CMOS coupled to a MEMS structure, wherein the CMOS comprises a substrate coupled to an interconnect in contact with the MEMS structure. The system further comprises a plurality of flip chips coupled to the substrate, a plurality of TSV that electrically connect the plurality of flip chips to the interconnect, and a plurality of layers on the substrate to provide electrical connections between the plurality of flip chips and from the plurality of flip chips to at least one external component.

Abstract: A method for fabricating a semiconductor proximity sensor includes providing a flat leadframe with a first and a second surface. The second surface is solderable. The leadframe includes a first and a second pad, a plurality of leads, and fingers framing the first pad. The fingers are spaced from the first pad by a gap which is filled with a clear molding compound. A light-emitting diode (LED) chip is assembled on the first pad and encapsulated by a first volume of the clear compound. The first volume outlined as a first lens. A sensor chip is assembled on the second pad and encapsulated by a second volume of the clear compound. The second volume outlined as a second lens. Opaque molding compound fills the space between the first and second volumes of clear compound and forms walls rising from the frame of fingers to create an enclosed cavity for the LED. The pads, leads, and fingers connected to a board using a layer of solder for attaching the proximity sensor.

Abstract: An electronic indicator includes artificial soil and sensor. An electrical characteristic of the electronic indicator can vary due to a change in the volume of the artificial soil. In some embodiments, the electrical characteristic of the electronic indicator can be measured by an electrical characteristic reader and used to determine efficacy of a cleaning cycle.

Abstract: A method for forming an integrated circuit having Micro-electromechanical Systems (MEMS) includes forming at least two recesses into a first layer, forming at least two recesses into a second layer, the at least two recesses of the second layer being complementary to the recesses of the first layer. An intermediate layer is bonded onto the second layer, the intermediate layer includes through-holes corresponding to the recesses of the second layer. The first layer is bonded to the intermediate layer such that cavities are formed, the cavities to act as operating environments for MEMS devices. The two cavities have different pressures.

Abstract: A fingerprint sensor is described that includes a thin protective cover layer on a sensor glass layer with receive circuitry between the thin protective cover layer and the sensor glass layer. In an implementation, a fingerprint sensor assembly includes a controller; a metal layer configured to be electrically coupled to the controller; a transmit layer electrically connected to the metal layer and the controller; a sensor glass layer including at least one through-glass via, where the transmit layer is disposed on a first side of the sensor glass layer, and where the transmit layer is electrically coupled to the at least one through-glass via; a receive layer disposed on a second side of the sensor glass layer, where the receive layer is electrically coupled to the at least one through-glass via; and a protective cover layer disposed on the receive layer.

Abstract: The invention concerns a micromechanical device and method of manufacturing thereof. The device comprises an oscillating or deflecting element made of semiconductor material comprising n-type doping agent and excitation or sensing means functionally connected to said oscillating or deflecting element. According to the invention, the oscillating or deflecting element is essentially homogeneously doped with said n-type doping agent. The invention allows for designing a variety of practical resonators having a low temperature drift.

Abstract: Disclosed are appendage mountable electronic systems and related methods for covering and conforming to an appendage surface. A flexible or stretchable substrate has an inner surface for receiving an appendage, including an appendage having a curved surface, and an opposed outer surface that is accessible to external surfaces. A stretchable or flexible electronic device is supported by the substrate inner and/or outer surface, depending on the application of interest. The electronic device in combination with the substrate provides a net bending stiffness to facilitate conformal contact between the inner surface and a surface of the appendage provided within the enclosure. In an aspect, the system is capable of surface flipping without adversely impacting electronic device functionality, such as electronic devices comprising arrays of sensors, actuators, or both sensors and actuators.

Abstract: The present invention generally relates to nanoscale wires, including to nanoscale wires used as sensors. In some cases, the nanoscale wires may be used to directly determine analytes, even within relatively complicated environments such as blood, unlike many prior art techniques. In some aspects, the nanoscale wire form at least a portion of the gate of a field-effect transistor, and in certain aspects, different periodically-varying voltages or other electrical signals may be applied to the field-effect transistor. For example, in one set of embodiments, sinusoidally-varying voltages of different frequencies may be applied to the nanoscale wire and the source electrode of the field-effect transistor. The electrical conductance or other properties of the nanoscale wire in response to the periodically-varying voltages may then be determined and used to determine binding of the species.

Abstract: The present disclosure relates to an organic image sensor and an associated method. By inserting an inorganic protective layer between an electrode and an organic photo active region of the image sensor, the organic photo active region is protected from moisture, oxygen or following process damage. The inorganic protective layers also help to suppress the leakage in the dark. In some embodiments, the organic image sensor comprises a first electrode, an organic photoelectrical conversion structure disposed over the first electrode and a second electrode disposed over the organic photoelectrical conversion structure. The organic image sensor further comprises a first protective structure covering a top surface and a sidewall of the organic photoelectrical conversion structure.

Abstract: A sensor module and semiconductor chip. One embodiment provides a carrier. A semiconductor chip includes a first recess and a second recess and a main surface of the semiconductor chip. The semiconductor chip is mounted to the carrier such that the first recess forms a first cavity with the carrier and the second recess forms a second cavity with the carrier. The first cavity is in fluid connection with the second cavity.

Abstract: There is provided a method for manufacturing a semiconductor device including a first semiconductor base substrate, a second semiconductor base substrate that is bonded onto a first surface side of the first semiconductor base substrate, a through electrode that is formed to penetrate from a second surface side of the first semiconductor base substrate to a wiring layer on the second semiconductor base substrate, and an insulation layer that surrounds a circumference of the through electrode formed inside the first semiconductor base substrate.

Abstract: A method of making an imprinted electronic sensor structure on a substrate for sensing an environmental factor includes coating, imprinting, and curing a curable layer on the substrate to form a plurality of spatially separated micro-channels extending from the layer surface into the cured layer. First and second layers are located in each micro-channel to form a multi-layer micro-wire. Either the first layer is a cured electrical conductor forming a conductive layer located only within the micro-channel and the second layer is a reactive layer or the first layer is a reactive layer and the second layer is a cured electrical conductor forming a conductive layer located only within the micro-channel. The reactive layer is exposed to the environmental factor and at least a portion of the reactive layer responds to the environmental factor.

Abstract: A method and system for preparing a semiconductor wafer are disclosed. In a first aspect, the method comprises providing a passivation layer over a patterned top metal on the semiconductor wafer, etching the passivation layer to open a bond pad in the semiconductor wafer using a first mask, depositing a protection layer on the semiconductor wafer, patterning the protective layer using a second mask, and etching the passivation layer to open other electrodes in the semiconductor wafer using a third mask. The system comprises a MEMS device that further comprises a first substrate and a second substrate bonded to the first substrate, wherein the second substrate is prepared by the aforementioned steps of the method.

Abstract: A device having an integrated noise shield is disclosed. The device includes a plurality of vertical shielding structures substantially surrounding a semiconductor device. The device further includes an opening above the semiconductor device substantially filled with a conductive fluid, wherein the plurality of vertical shielding structures and the conductive fluid shield the semiconductor device from ambient radiation. In some embodiments, the device further includes a conductive bottom shield below the semiconductor device shielding the semiconductor device from ambient radiation. In some embodiments, the opening is configured to allow a biological sample to be introduced into the semiconductor device. In some embodiments, the vertical shielding structures comprise a plurality of vias, wherein each of the plurality of vias connects more than one conductive layers together.

Abstract: The present disclosure relates to improvements to thermodynamic devices that approximate the Ericsson cycle, Brayton cycle, or regenerated Brayton cycle. These cycles and various ways of implementing them are known in the art. They can operate as engines or refrigerators. The Ericsson cycle is attractive since it can theoretically operate at the Carnot efficiency, which is the maximum possible efficiency for a heat engine or refrigerator.

Abstract: The present invention provides methods for etching semiconductor devices, such aluminum nitride resonators. The methods herein allow for devices having improved etch profiles, such that nearly vertical sidewalls can be obtained. In some examples, the method employs a dry etch step with a primary etchant gas that omits BCl3, a common additive.

Abstract: One embodiment of the instant disclosure provides a transistor device that comprises: a semiconductor substrate; a buffer layer formed in a fin structure over the semiconductor substrate; a nanowire formed over the buffer layer, having at least a middle portion suspended over the buffer layer by an undercutting, the nanowire including a source and a drain region respectively defined at distal portions thereof and a channel region defined in the suspended portion of the nanowire and connecting the source and drain regions; and a gate structure surrounding at least a portion of the suspended portion of the nanowire.

Abstract: The present invention generally relates to nanoscale wires and tissue engineering. In various embodiments, cell scaffolds for growing cells or tissues can be formed that include nanoscale wires that can be connected to electronic circuits extending externally of the cell scaffold. The nanoscale wires may form an integral part of cells or tissues grown from the cell scaffold, and can even be determined or controlled, e.g., using various electronic circuits. This approach allows for the creation of fundamentally new types of functionalized cells and tissues, due to the high degree of electronic control offered by the nanoscale wires and electronic circuits. Accordingly, such cell scaffolds can be used to grow cells or tissues which can be determined and/or controlled at very high resolutions, due to the presence of the nanoscale wires, and such cell scaffolds will find use in a wide variety of novel applications, including applications in tissue engineering, prosthetics, pacemakers, implants, or the like.

Abstract: A device with multiple encapsulated functional layers, includes a substrate, a first functional layer positioned above a top surface of the substrate, the functional layer including a first device portion, a first encapsulating layer encapsulating the first functional layer, a second functional layer positioned above the first encapsulating layer, the second functional layer including a second device portion, and a second encapsulating layer encapsulating the second functional layer.

Abstract: A method of forming a transistor device includes forming an interfacial layer and a dielectric layer over a substrate; and forming a workfunction metal layer over the dielectric layer, the workfunction metal layer comprising a titanium-aluminum-carbon-oxygen (TiAlCO) layer.

Abstract: A method for fabricating a MEMS device includes providing a micro-electro-mechanical system (MEMS) substrate having a sacrificial layer on a first side, providing a carrier including a plurality of cavities, bonding the first side of the MEMS substrate on the carrier, forming a first bonding material layer on a second side of the MEMS substrate, applying a sacrificial layer removal process to the MEMS substrate, providing a semiconductor substrate including a second bonding material layer and bonding the semiconductor substrate on the second side of the MEMS substrate.

Abstract: A wafer-level packaging, comprising: a first semiconductor body integrating a MEMS structure; a second semiconductor body, including a surface electrical-contact region and an ASIC coupled to the MEMS structure and to said electrical-contact region; a first coating layer, made of resin, which englobes and protects the first body, the second body, and the electrical-contact region; at least one first conductive through via, which extends through the first coating layer in an area corresponding, and electrically coupled, to the first electrical-contact region; an electrical-contact pad, which extends over the first coating layer, electrically coupled to the first conductive through via; a third semiconductor body, integrating an electronic circuit, glued on the first coating layer; a second coating layer, made of resin, which englobes and protects the third body; at least one second conductive through via, which extends completely through the second coating layer in an area corresponding, and electrically coupl

Abstract: An integrated MEMS system in which CMOS and MEMS devices are provided to form an integrated CMOS-MEMS system. The system can include a silicon substrate layer, a CMOS layer, MEMS and CMOS devices, and a wafer level packaging (WLP) layer. The CMOS layer can form an interface region, one which any number of CMOS MEMS devices can be configured.

Abstract: In one embodiment, a method is provided for the manufacture of a nano-sensor array. A base having a sensing region is provided along with a plurality of nano-sensors. Each of the plurality of nano-sensors is formed by: forming a first nanoneedle along a surface of the base, forming a dielectric on the first nanoneedle, and forming a second nanoneedle on the dielectric layer. The first nanoneedle of each sensor has a first end adjacent to the sensing region of the base. The second nanoneedle is separated from the first nanoneedle by the dielectric and has a first end adjacent the first end of the first nanoneedle. The base is provided with a fluidic channel. The plurality of nano-sensors and the fluidic channel are configured and arranged with the first ends proximate the fluidic channel to facilitate sensing of targeted matter in the fluidic channel.

Abstract: FinFET and fabrication method thereof. The FinFET fabrication method includes providing a semiconductor substrate; forming a plurality of trenches in the semiconductor substrate, forming a buffer layer on the semiconductor substrate by filling the trenches and covering the semiconductor substrate, and forming a fin body by etching the buffer layer. The FinFET fabrication method may further includes forming a insulation layer on the buffer layer around the fin body; forming a channel layer on the surface of the fin body; forming a gate structure across the fin body; forming source/drain regions in the channel layer on two sides of the gate structure; and forming an electrode layer on the source/drain regions.

Abstract: Trapped sacrificial structures and thin-film encapsulation methods that may be implemented to manufacture trapped sacrificial structures such as relative humidity sensor structures, and spacer structures that protect adjacent semiconductor structures extending above a semiconductor die substrate from being contacted by a molding tool or other semiconductor processing tool in an area of a die substrate adjacent the spacer structures.

Abstract: The invention provides a processor obtained by forming a high functional integrated circuit using a polycrystalline semiconductor over a substrate which is sensitive to heat, such as a plastic substrate or a plastic film substrate. Moreover, the invention provides a wireless processor, a wireless memory, and an information processing system thereof which transmit and receive power or signals wirelessly. According to the invention, an information processing system includes an element forming region including a transistor which has at least a channel forming region formed of a semiconductor film separated into islands with a thickness of 10 to 200 nm, and an antenna. The transistor is fixed on a flexible substrate. The wireless processor in which a high functional integrated circuit including the element forming region is formed and the semiconductor device transmit and receive data through the antenna.

Abstract: Nanophononic metamaterials and methods for reducing thermal conductivity in at least partially crystalline base material are provided, such as for thermoelectric energy conversion. In one implementation, a method for reducing thermal conductivity through an at least partially crystalline base material is provided. In another implementation, a nanophononic metamaterial structure is provided. The nanophononic metamaterial structure in this implementation includes: an at least partially crystalline base material configured to allow a plurality of phonons to move to provide thermal conduction through the base material; and at least one nanoscale locally resonant oscillator coupled to the at least partially crystalline base material.

Abstract: A semiconductor device, a piezoelectronic transistor (PET) device, and a method of fabricating the PET device are described. The method includes forming a first stack of dielectric layers, forming a first metal layer over the first stack, forming a piezoelectric (PE) material on the first metal layer, and forming a second metal layer on the PE material. The method also includes forming a piezoresistive (PR) element on the second metal layer through a gap in a first membrane formed a distance d above the second metal layer.

Abstract: An apparatus including an electronic device having a plurality of substantially collocated components, the plurality of components including an integrated circuit (IC) chip, an energy supply operable to electrically power the IC chip, and an energy harvesting (EH) device operable to convert non-electrical energy to electrical energy supplied to the energy supply. A material substantially encloses at least a portion of at least one of the IC chip, the energy supply, and the EH device.

Abstract: A MEMS package structure includes a base, a MEMS device, a first cover, a second cover and a glass frit. The base includes a recess. The MEMS device is disposed in the recess. The first cover is disposed in the recess and covering the MEMS device. The second cover is disposed on the base and covering the recess. The glass frit is disposed between the base and the second cover. A MEMS package structure includes the base, the MEMS device, the first cover, a second cover, a first metal frame and a first sealing medium. The first metal frame is disposed around the second cover, and the second cover and the first metal frame collectively are disposed on the base and covering the recess. The first sealing medium is disposed between the first metal frame and the base. Manufacturing methods of the MEMS package structures above are further provided.

Abstract: A stacked semiconductor device includes a CMOS device and a MEMS device. The CMOS device includes a multilayer interconnect with metal elements disposed over the multilayer interconnect. The MEMS device includes metal sections with a first dielectric layer disposed over the metal sections. A cavity in the first dielectric layer exposes portions of the metal sections. A dielectric stop layer is disposed at least over the interior surface of the cavity. A movable structure is disposed over a front surface of the first dielectric layer and suspending over the cavity. The movable structure includes a second dielectric layer over the front surface of the first dielectric layer and suspending over the cavity, metal features over the second dielectric layer, and a flexible dielectric membrane over the metal features. The CMOS device is bonded to the MEMS device with the metal elements toward the flexible dielectric membrane.

Abstract: A method for manufacturing a micromechanical system is shown. The method comprises the steps of forming in a front end of line (FEOL) process a transistor in a transistor region. After the FEOL process, a protective layer is deposited in the transistor region, wherein the protective layer comprises an isolating material, e.g. an oxide. A structured sacrificial layer is formed at least in a region which is not the transistor region. Furthermore, a functional layer is formed which is at least partially covering the structured sacrificial layer. After the functional layer is formed removing the sacrificial layer in order to create a cavity between the functional layer and a surface, where the sacrificial layer was deposited on. The protective layer protects the transistor from being damaged especially during etching processes in further processing steps in MOL (middle of line) and BEOL (back end of line) processes.

Abstract: A method for manufacturing a micromechanical system includes forming in a Front-End-of-Line (FEOL) process transistors in a transistor region; after the FEOL-process, forming a sacrificial layer; structuring the sacrificial layer to form a structured sacrificial layer; forming a functional layer at least partially covering the structured sacrificial layer; and removing the sacrificial layer to create a cavity.