Imager Including Structural Or Functional Details Of The Device (epo) Patents (Class 257/E27.13)

  • Patent number: 7291861
    Abstract: A solid-state imaging device includes a two-dimensional array of photosensor sections on a semiconductor substrate, and a vertical transfer section including two-layer vertical transfer electrodes. The photosensor sections store signal charges generated by photoelectric conversion. The vertical transfer section reads signal charges from the photosensor sections and vertically transfers the read signal charges. The two-layer vertical transfer electrodes have first transfer electrode layers and second transfer electrode layers, and the first transfer electrode layers serve as read electrodes for reading the signal charges from the photosensor sections. The first transfer electrode layers have a larger electrode width with respect to the photosensor sections than the second transfer electrode layers.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: November 6, 2007
    Assignee: Sony Corporation
    Inventor: Junichi Furukawa
  • Patent number: 7276748
    Abstract: An imaging circuit, an imaging sensor, and a method of imaging. The imaging cell circuit including one or more imaging cell circuits, each imaging cell circuit comprising: a transistor having a floating body for holding charge generated in the floating body in response to exposure of the floating body to electromagnetic radiation; means for biasing the transistor wherein an output of the transistor is responsive to the electromagnetic radiation; and means for selectively connecting the floating body to a reset voltage supply.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: October 2, 2007
    Assignee: International Business Machines Corporation
    Inventors: John J. Ellis-Monaghan, Mark D. Jaffe, Alain Loiseau
  • Patent number: 7190012
    Abstract: A photodiode and a method of manufacturing the photodiode are provided. The method includes forming a diode junction structure including a light receiving unit and an electrode unit on a semiconductor substrate, forming a buffer oxide layer and an etching blocking layer on the junction structure, forming an interlayer insulating layer and an intermetal insulating layer and an interconnecting structure, exposing the etching blocking layer by etching the intermetal insulating layer and the interlayer insulating layer, removing a portion of the etching blocking layer and the buffer oxide layer of the light-receiving unit by dry etching, and exposing a semiconductor surface of the light-receiving unit by wet etching.
    Type: Grant
    Filed: December 2, 2004
    Date of Patent: March 13, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho-Sung Son, Sung-Ryoul Bae, Dong-Kyun Nam
  • Patent number: 7138671
    Abstract: A first p+-type region on a surface of a photodiode unit is formed over a region from a surface of the photodiode unit through a surface of a signal charge read-out unit until reaching the charge transfer unit. Also, the following structure is adapted: the structure in which a boundary between the first p+-type region and a p++-type region is not on a same plane with a boundary of an n-type impurity region which forms the photodiode unit on a side of the signal charge read-out unit. Further, a second p+-type region is formed between the first p+-type region and the p++-type region on the surface of the photodiode unit. The second p+-type region has an impurity concentration between the impurity concentrations of the first p+-type region and the p++-type region.
    Type: Grant
    Filed: May 26, 2005
    Date of Patent: November 21, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Jun Hirai, Tooru Yamada