Abstract: A silicon chicklet pedestal for use in a wafer-level test probe of a wafer is provided and includes a main body, first and second opposing faces, and an array of vias formed through the main body to extend between the first and second faces, through which pairs of leads, respectively associated with each via at the first and second faces, are electrically connectable to one another.

Abstract: A probe apparatus is provided with a plurality of probe tiles, an interchangeable plate for receiving the probe tiles, a floating plate being disposed between the respective probe tile and a receiving hole on the interchangeable plate, and a control mechanism providing multi-dimensional freedom of motions to control a position of the probe tile relative to the respective receiving hole of the interchangeable plate. A method of controlling the floating plate is also provided by inserting a pair of joysticks into two respective adjustment holes disposed on the floating plate and moving the pair of joysticks to provide translational motions (X-Y) and rotational (theta) motion of the floating plate, and turning the pair of jack screws clockwise and counter-clockwise to provide a translational motion (Z) and two rotational (pitch and roll) motions of the floating plate.

Abstract: A power supply with and input and output includes an amplifier configured to set an output voltage of the power supply output equal to a fixed input voltage for the power supply. The power supply has a first output stage coupled to the amplifier and configured to source and sink current at the output of the power supply between a first voltage rail and a third voltage rail. The power supply has a second output stage coupled to the amplifier and configured to source and sink current to the output of the power supply between a second voltage rail and the third voltage rail. A selection device is configured to enable the first and second output stages based on a selection input signal. The selection device is situated outside of the first and the second output stages.

Abstract: Open and short systems and methods for testing integrated circuits are disclosed. An example implementation includes engaging an integrated circuit testing module with an integrated circuit testing apparatus, the integrated circuit testing module for receiving an integrated circuit, a first set of contact points, and a second set of contact points; engaging a first probe onto at least one of the contact points of the first set of contact points, controllably engaging at least one of a second probe onto at least one contact pair of the integrated circuit testing module, and providing an electrical stimulus to the integrated circuit testing module.

Abstract: An apparatus for testing electric characteristics of a test object including first connection terminals on a bottom surface and second connection terminals on a top surface, the apparatus comprises a test board comprising first pads on a predetermined surface; a socket configured to electrically connect the test object to the test board; and a handler configured to transport the test object to the socket. The socket comprises a first connection unit configured to be electrically connected to the first connection terminals of the test object and a second connection unit configured to be electrically connected to the second connection terminals of the test object.

Abstract: To provide a contact probe which can easily be connected with a measurement apparatus electrically, can measure a high speed and high frequency signal with a fine pitch easily and correctly, and can easily cope with signal measurement for a plurality of channels, and a method of making the contact probe. It includes a first printed wiring board 3 having a signal electrode 10a and a ground electrode 10b used as a contact part with respect to a measuring object, in which the signal electrode 10a and ground electrode 10b are formed of a metal wiring pattern on a substrate, and a second printed wiring board 2 with a coaxial line structure having shield electrodes 12, 17, 18 which enclose a signal line 15a and the surroundings of the signal line 15a through an insulating layer.

Abstract: A probe card apparatus is configured to have a desired overall amount of compliance. The compliance of the probes of the probe card apparatus is determined, and an additional, predetermined amount of compliance is designed into the probe card apparatus so that the sum of the additional compliance and the compliance of the probes total the overall desired compliance of the probe card apparatus.

Abstract: A probing apparatus for semiconductor devices includes a housing configured to define a testing chamber, a device holder positioned in the housing and configured to receive at least one device under test, and at least one probe stage positioned in the housing. In one embodiment of the present disclosure, the probe stage includes a base, a retaining arm pivotally coupled with the base and having a retaining portion configured to retain at least one probe, and a stepper positioned on the base. In one embodiment of the present disclosure, the stepper is configured in response to an electric signal to move the probe downward through the retaining arm to contact a device under test and to move the probe upward through the retaining arm to separate from the device under test such that the up-and-down movement of the probe can be performed at relatively high frequency of typically greater than six cycles per second.

Abstract: A method for aligning a probe relative to a supporting substrate defining a first planar surface, an edge, and a first crystal plane includes the steps of masking the surface of the substrate to define an exposed area on the first surface at the edge; and etching, using an etch reagent, a recess in the exposed area, the recess defining first and second opposed sidewalls, an end wall remote from the edge, and a bottom wall. The method further includes the step of providing a probe substrate defining a second planar surface and a second crystal plane identical to the first crystal plane, and positioning the probe substrate so that the first and the second crystal planes are positioned identically when forming a probe from the probe substrate using the etch reagent, wherein the probe defines congruent surfaces to the first and second sidewalls.

Abstract: The present invention relates to a micro contact probe used for a probe card. An exemplary embodiment of the present invention provides a micro contact probe including a coating layer of a nanostructure such as carbon nanotubes formed on a surface thereof to reduce contact resistance when contacting a semiconductor chip. According to the micro contact probe of which the surface is coated with the nanostructure, contact resistance between the probe and the semiconductor chip is lowered and the high frequency characteristics are improved, such that a more accurate measurement can be obtained.

Abstract: Various embodiments of a semiconductor apparatus and related methods are disclosed. In one exemplary embodiment, a semiconductor apparatus may include a chip, scribe lanes disposed around the chip, and a probe test logic circuit for conducting a probe test on the chip. The probe test logic circuit is disposed on a portion of the scribe lanes.

Abstract: In order for a conduction path to have a reduced number of sliding portions for conduction, without increase in inductance nor resistance, thereby permitting an enhanced accuracy of inspection, a pair of plungers (3, 4) biased in opposite directions by a coil spring (2), to be electrically connected to a wiring plate (10), have electrical connections in which, in a tubular portion (15) as a tight wound spiral portion (15a) fixed on one plunger (4) to allow linear flow of electrical signal, the other plunger (3) is brought into slidable contact.

Abstract: Provided is a test apparatus including a test head main body 130 that communicates a signal with the device under test 200, a prober 110 on which the device under test 200 is mounted, and a probe card 300 positioned between the test head main body 130 and the prober 110, where the probe card 300 includes: a plurality of probe pins 320 provided on a surface thereof facing the prober 110 and electrically connected to a terminal of the device under test 200; a plurality of test head pads 330 provided on a surface thereof facing the test head main body 130 and electrically connected to spring pins 129 on the test head main body 130 and to the probe pins 320; and prober pads 340 provided on a surface thereof facing the prober 110 and electrically connected to the plurality of probe pins 320.

Abstract: An interconnect structure employs a closed-grid bus to link an integrated circuit tester channel to an array of input/output (I/O) pads on a semiconductor wafer so that the tester channel can concurrently communicate with all of the I/O pads. The interconnect structure includes a circuit board implementing an array of bus nodes, each corresponding to a separate one of the I/O pads. The circuit board includes at least two layers. Traces mounted on a first layer form a set of first daisy-chain buses, each linking all bus nodes of a separate row of the bus node array. Traces mounted on a second circuit board layer form a set of second daisy-chain buses, each linking all bus nodes of a separate column of the bus node array. Vias and other circuit board interconnect ends of the first and second daisy-chain buses so that they form the closed-grid bus. Each bus node is connected though a separate isolation resistor to a separate contact pad mounted on a surface of the circuit board.

Abstract: An electrical test contactor comprises a contactor main body including a plate-shaped attachment portion extending in the up-down direction, a plate-shaped arm portion extending from the lower end portion of the attachment portion at least to one side in the right-left direction, and a plate-shaped pedestal portion projecting downward from the tip end portion of the arm portion, a contact portion projecting downward from the lower end of the pedestal portion and having the lower end of the contact portion acting as a probe tip, and a resistor having a higher resistance value than the contactor main body and the contact portion and arranged at the contactor main body so as to heighten the resistance value of the contactor.

Abstract: An electrical contact member and a contact probe that are durable and economical are provided. For this purpose, an outer peripheral portion, which has a symmetrical shape with respect to a central axis in a longitudinal direction and has a hollow portion, and a core portion, which has an approximate bar shape extending in the longitudinal direction and filling the hollow portion, are included. One of the outer peripheral portion and the core portion is made of a noble metal alloy, and the other is made of a conductive material other than the noble metal alloy. The one of the outer peripheral portion and the core portion, which is made of the noble metal alloy, projects further than the other at one end portion in the longitudinal direction.

Abstract: A contacting component has a probe contact formed by plating and adapted to be contacted with a target portion. The contacting component includes an insulating substrate, a conductive circuit formed on one surface of the insulating substrate, and the probe contact is made of a conductive material and formed on the other surface of the insulating substrate. The conductive circuit and the probe contact are electrically connected in a through hole penetrating the insulating substrate. The probe contact includes a bump contact of a convex shape, the bump contact is formed by plating and having a surface which has a shape of a semispherical protrusion to be contacted with the target portion. The bump contact is made of a material containing a metal and carbon, the content of carbon falling within a range between 0.2 at % and 1.2 at %, both inclusive.

Abstract: A probe for contacting and testing ICs on a semiconductor device includes a dielectric insulating material tip. The dielectric tip does not contaminate the surface being probed unlike metal probe tips. A contact scrub is further not required with signals being capacitively or inductively coupled from the probe tip to the IC. Testing can be performed during early fabrication steps of the wafer without the need for applying a metalization layer to the wafer to form bond pads. Testing can be performed by inductively coupling an AC signal to the probe tip, with coupling enhanced by including a magnetic material in the dielectric probe tip. Using an AC test signal enables testing of ICs without requiring separate power and ground connections.

Abstract: A contact structure for inspection that is installed on a bottom surface of a circuit board includes a ground conductor that is grounded; an elastic contact member that is brought into contact with an inspection target object; and a conductive line that electrically connects the circuit board and the elastic contact member. Here, the elastic contact member may be provided on a bottom surface of the ground conductor that is grounded. The elastic contact member may include an insulating layer, a wiring layer, a contactor and an elastic body provided at a position corresponding to the contactor. The elastic body provides the elastic contact member with elasticity when the contactor is brought into contact with an electrode. The elastic contact member is provided in parallel with the ground conductor. The wiring layer and the ground conductor form a microstrip line.

Abstract: Described herein is a probe card assembly providing signal paths for conveying high frequency signals between bond pads of an integrated circuit (IC) and an IC tester. The frequency response of the probe card assembly is optimized by appropriately distributing, adjusting and impedance matching resistive, capacitive and inductive impedance values along the signal paths so that the interconnect system behaves as an appropriately tuned Butterworth or Chebyshev filter.

Abstract: A probe includes a contact member brought into contact with an object to be tested. Contact particles having conductivity are uniformly distributed in the contact member. A part of the contact particles protrude from a surface of the contact member on the side of the object to be tested. A conductive member having elasticity is placed on a surface of the contact member on the opposite side to the object to be tested. The probe further includes an insulating sheet including a through hole and the contact member is so positioned as to penetrate the through hole. An upper part of the contact member is formed of a conductor which does not include the contact particles. An additional conductor is placed on a surface of the conductor on the side opposite to the object to be tested.

Abstract: A vertically folded probe is provided that can provide improved scrub performance in cases where the probe height is limited. More specifically, such a probe includes a base and a tip, and an arm extending from the base to the tip as a single continuous member. The probe arm is vertically folded, such that it includes three or more vertical arm portions. The vertical arm portions have substantial vertical overlap, and are laterally displaced from each other. When such a probe is vertically brought down onto a device under test, the probe deforms. During probe deformation, at least two of the vertical arm portions come into contact with each other. Such contact between the arm portions can advantageously increase the lateral scrub motion at the probe tip, and can also advantageously reduce the probe inductance.

Abstract: A method for forming a conductive film structure is provided, which includes providing a flexible insulating substrate, forming a conductive film overlying the flexible insulating substrate, patterning the conductive film to form a plurality of micro-wires overlying the flexible insulating substrate, wherein the micro-wires are extended substantially parallel to each other, forming an insulating layer overlying the flexible insulating substrate and the micro-wires, and winding or folding the flexible insulating substrate along an axis substantially parallel to an extending direction of the micro-wires to form a conducting lump.

Abstract: A method for aligning a probe relative to a supporting substrate defining a first planar surface, an edge, and a first crystal plane includes the steps of masking the surface of the substrate to define an exposed area on the first surface at the edge; and etching, using an etch reagent, a recess in the exposed area, the recess defining first and second opposed sidewalls, an end wall remote from the edge, and a bottom wall. The method further includes the step of providing a probe substrate defining a second planar surface and a second crystal plane identical to the first crystal plane, and positioning the probe substrate so that the first and the second crystal planes are positioned identically when forming a probe from the probe substrate using the etch reagent, wherein the probe defines congruent surfaces to the first and second sidewalls.

Abstract: A test probe is provided. The test probe includes a group of shielding boards and two probe pins. The group of shielding boards has two opposite surfaces. The group of shielding boards includes at least two insulation boards and at least one metal board. The metal board is formed between the two insulation boards. The two probe pins are formed on the two surfaces of the group of shielding boards and have a distance between each other.

Abstract: An apparatus for supporting BGA packages for one or more testing processes is disclosed. The apparatus includes a substrate member. The substrate member has a plurality of contact pads, with each of the contact pads being spatially disposed around a peripheral region of the substrate. The apparatus further includes a plurality of contact regions spatially configured on a portion of the substrate member. Each of the plurality of contact regions is numbered from 1 through N being electrically connected to respective contact pads numbered from 1 through N. The plurality of contact regions is configured to provide electrical contact to respective plurality of balls provided on a BGA package. The apparatus additionally includes a holder device coupled to the substrate member. The holder device is adapted to mechanically hold the BGA package in place to provide mechanical contact between the plurality of balls and respective plurality of contact regions.

Abstract: An embodiment of a test apparatus for executing a test of a set of electronic devices having a plurality of electrically conductive terminals, the test apparatus including a plurality of electrically conductive test probes for exchanging electrical signals with the terminals, and coupling means for mechanically coupling the test probes with the electronic devices. In an embodiment, the coupling means includes insulating means for keeping each one of at least part of the test probes electrically insulated from at least one corresponding terminal during the execution of the test. Each test probe and the corresponding terminal form a capacitor for electro-magnetically coupling the test probe with the terminal.

Abstract: Example embodiments relate to a semiconductor memory device including a first pad having a probe region and a sensing region, the first pad may be adapted to come in contact with a primary probe, a sensing unit adapted to sense a weak contact of the first pad and the primary probe, the sensing unit may generate an output current in response to a contact point of the primary probe, and a second pad may be adapted to come in contact with a secondary probe to input/output an electric signal. The output current of the sensing unit may be output through the second pad or the secondary probe.

Abstract: The invention relates to a test contact arrangement (15) for testing semiconductor components, comprising at least one test contact (10) which is arranged in a test contact frame (13) and is designed in the type of a cantilever arm and which has a fastening base (12) and a contact arm (30) which is provided with a contact tip (11) and which is connected to the fastening base, wherein the fastening base is inserted with a fastening projection (16) thereof into a frame opening (14) of the test contact frame in such a manner that a lower edge (17) of the fastening projection is essentially aligned flush with a lower side (18) of the test contact frame.

Abstract: A monitored test block for use in medium and high voltage electrical monitoring circuits such as found in substation facilities that signals via a communication protocol the operational status of potential, current and signal secondary circuits when connected to protection and monitoring devices (or test devices) such as protective relays, fault recorders or any other monitoring and controlling device. The monitored test block includes various safety features to prevent damage to the equipment or harm to a technician. The monitoring circuits may be located in the front for ease of access.

Abstract: A vertical probe comprises a linear body, a tip portion connected to one side of the linear body, and at least one slot positioned on the linear body. In particular, the vertical probe includes a depressed structure having a plurality of slots positioned on the linear body in parallel and on one side of the linear body. The present application also provides a probe card for integrated circuit devices comprising an upper guiding plate having a plurality of fastening holes, a bottom guiding plate having a plurality of guiding holes and a plurality of vertical probes positioned in the guiding holes. The vertical probe includes a linear body positioned in the guiding holes, a tip portion connected to one side of the linear body and at least one slot positioned on the linear body.

Abstract: An inspection apparatus includes an electrical connection member which is configured to remove flux attached to a part to be inspected of an object to be inspected, a base member which is provided with the electrical connection member, a driving member which is configured to move the base member relative to the object to be inspected, a control member which is configured to control an operation of the driving member, and an inspection start-up member which is configured to send an operation start signal to the control member, when the operation start signal is sent from the inspection start-up member to the control member, the base member is moved by the driving member, and the electrical connection member is brought into contact with the part to be inspected of the object to be inspected a predetermined number of times, by a control of the control member.

Abstract: A test system can include contact elements for making electrical connections with test points of a DUT. The test system can also include a DC test resource and a signal router, which can be configured to switch a DC channel from the DC test resource between individual contact elements in a group of contact elements.

Abstract: The present invention provides a contactor assembly (100,200,300) for testing of semiconductor devices (DUT). The contactor assembly (100,200,300) includes a plurality of probes (20,22,24), a contactor holder (150,350) and a cover (180,280) shaped and dimensioned to fit on the contactor holder (150,350). The contactor holder (150,350) is a stack of laminates. A top laminate (156,256) of the contactor holder (150,350) has apertures (158,258). A contact probe (22) is seen through one aperture (158,258). On a rear face of the cover (180,280), there is at least one conductive pad (186) in register with an aperture (158,258). Each aperture (158,258) is operable to house a surface-mount electric component (160), such as a resistor, capacitor or inductor, and a conductive compressive element (162). In another embodiment, a front side of a cover (280) has a connector (285) in electrical communication with a conductive pad (186).

Abstract: A socket for testing or connecting an integrated circuit is disclosed having a platform for receiving the integrated circuit and adapted to overlay a piece of test equipment or other board, the platform formed with an array of slots each locating a portion of a two-piece connector assembly. When the integrated circuit is seated on the platform, the two piece connector assemblies pivot so as to make contact between a contact pad on the IC and the board for establishing or evaluating signal transmission by the IC. The platform houses a resilient tubular member that biases the connector assembly in a disengaged position out of contact with the board or test equipment. When the IC is placed on the platform, the bias of the resilient tubular member is overcome and an electrical connection is established across the connector assembly.

Abstract: A testing device suitable for a testing apparatus with light inspection of a display panel is provided, in which the testing device includes a main part and two contact parts. The testing device is fixed to the testing apparatus with light inspection by the main part. Two contact parts are respectively extended from two ends of the main part along a first direction, and each of the contact parts has a plurality of tips. The tips of each contact part have different heights. Besides, a testing apparatus is also provided. Therefore, the abovementioned testing device and the testing apparatus are able to drastically extend the user lifetime, improve the inspection accuracy and save cost.

Abstract: A probe card has a thin film substrate having projection electrodes on a first surface facing the semiconductor wafer and at a position facing the pad electrodes, a non-contact electrode, and first electrodes provided a second surface opposite to the first surface; and a wiring substrate having second electrodes disposed at a side opposite to the semiconductor wafer in the thin film substrate and at a position facing the first electrodes. The wiring substrate and the thin film substrate form a first sealed space and the thin film substrate and the semiconductor wafer form a second sealed space. By reducing the pressure in the first and the second sealed space, the first and the second electrodes are brought into close contact with each other and the pad electrodes and the projection electrodes are brought into close contact with each other, and the pressure of each of the first and second sealed space can be independently adjusted.

Abstract: A probe apparatus exchanging signals with a target device, includes: a contact section electrically connected to the target device by contacting a terminal of the target device; a non-contact section that exchanges signals with the target device in a state not contacting the terminal of the target device; and a retaining section that retains the contact section and the non-contact section, in such a manner that a relative position between the contact section and the non-contact section in a connection direction connecting the non-contact section and a region corresponding to the target device is displaceable.

Abstract: Various embodiments are directed at an apparatus for implementing electrical connectivity for testing of a semiconductor device. The apparatus comprises a probe head which comprises an upper guide plate and a lower guide plate, wherein the upper guide plate defines a plurality of first apertures, and the lower guide plate defines a plurality of second apertures in some embodiments. The apparatus further comprises a plurality of probes, wherein each of the plurality of probes passes through one of the plurality of first apertures on the upper guide plate and one of the plurality of second apertures on the lower guide plate, and at least one of the plurality of probes defines a buckled form after the at least one of the plurality of probes is finally assembled in the apparatus. The apparatus further comprises a template member to guide the plurality of probes.

Abstract: The present invention discloses a pad structure and a method for testing a integrated circuit. The structure includes the first pads and the second pads, where the first pads are distributed over a peripheral portion of the integrated circuit and connected with lead-out wires of the integrated circuit, and the second pads are connected with a metal line at a circuit portion in the integrated circuit and are sized larger than the minimum characteristic dimension of the metal line and of the integrated circuit and smaller than the size of the first pads. The pad structure and method can position a test portion with improved efficiency. Correspondingly, a probe can be used to position the test portion with improved accuracy as well.

Abstract: A probe circuit is provided in an electronic device that includes a circuit which is under test and outputs a response signal corresponding to an input signal in synchronization with an operation clock. The probe circuit includes a sampling clock supplying section that outputs a sampling clock having a predetermined frequency, and a sampling section that outputs, outside the electronic device, a probe output signal of which frequency is lower than a frequency of the response signal and which corresponds to a sampling result obtained by sampling the response signal using the sampling clock. The response signal has a prescribed signal pattern repeated with a predetermined recurrence period, and the sampling clock supplying section outputs the sampling clock of which relative phase with respect to the signal pattern sequentially changes in each recurrence period.

Abstract: A reversible test probe and test probe tip. In one embodiment, a test probe tip is reversible relative to a test probe body. The reversible probe has a first probe tip at a first end and a second probe tip at a second end. The test probe body has an opening operable to receive the first probe tip and the second probe tip. When the first probe tip is positioned in the opening, the first probe tip is electrically coupled to a metal device in the test probe body. When the second probe tip is positioned in the opening, the second probe tip is electrically coupled to a metal device in the test probe body. In another embodiment, a test probe having two test probe tips is reversible relative to a test lead.

Abstract: A test probe includes a filtering unit and a contact unit. The filtering unit includes an inductive component, a capacitive component, and an insulation component insulates the inductive component from the capacitive component. The contact unit contacts a test point to get a test signal. The filtering unit filters noise from the test signal. The test probe can be assembled and disassembled easily, and parameters of the filtering unit can be changed by changing structure of each component.

Abstract: A probe measurement system for measuring the electrical characteristics of integrated circuits or other microelectronic devices at high frequencies.

Abstract: A probe for current test is provided. The probe includes a probe body having a plate-like connection portion whose end face becomes a connection face to a probe board, a solder layer formed on at least one side face of said connection portion, and a guide portion formed on the connection portion. The guide portion penetrates the connection portion in its thickness direction from the one side face with the solder layer formed to the other side face. When the solder layer is melted, the guide portion guides a portion of the melted solder to the other side face.

Abstract: An apparatus for adjusting a differential probe includes a regulator arranged therein capable of adjusting a distance between two tips of the probe. The probe is supported on the apparatus. The apparatus includes a rotatable shaft and a rotatable disk. The rotatable shaft engages with the regulator of the probe. The rotatable disk is mounted surrounding the rotatable shaft and rotatable together with the rotatable shaft. An angular ruler or a radian ruler is described on an outer surface of the rotatable disk to indicate a rotation angle or a rotation radian of the rotatable shaft, therefore the distance between the two tips of the probe are accurately adjusted.

Abstract: The present invention provides on IC test substrate for testing various signals, a combined flexible and rigid PCB included in the structure is applicable to perform a mission including for example: stabilizing power input/output, signal transfer by a connector; general, power, and high frequency signal transmission in preserved integrity state.

Abstract: A time-to-breakdown for a dielectric layer in a semiconductor device is determined based upon a sudden change in capacitance. An alternating voltage, greater in magnitude than an operating voltage of the device, is applied to the semiconductor device, capacitance is measured across the dielectric layer during the application of the voltage until a sudden change in capacitance occurs, thereby indicating a breakdown in the dielectric layer, and the breakdown time is scaled to the operating voltage.

Abstract: A measuring system for testing and measuring a wireless communication apparatus includes a plurality of first probes, a plurality of second probes, and a control module. The first probes are arranged to face toward a first side of the wireless communication apparatus for testing and measuring a plurality of first test points provided on the first side of the wireless communication apparatus. The second probes are arranged to face toward an opposite second side of the wireless communication apparatus for testing and measuring a plurality of second test points provided on the second side of the wireless communication apparatus. The first and second probes detect wireless signals of the wireless communication apparatus via the first and second test points, respectively. The control module is electrically connected to the first probes and the second probes for receiving a plurality of measuring signals transmitted from the first and the second probes.

Abstract: An apparatus for interrogating an electronic circuit supported by a substrate includes a tester external to the substrate and comprising an tester transceiver. A testing circuit is supported by the substrate and connected to the electronic circuit. The testing circuit includes a processor and a testing circuit transceiver in communication with the tester transceiver for transmitting instructions from the tester to the processor and for transmitting results of an interrogation from the processor to the tester. The processor being programmed to process instructions from the tester to interrogate the electronic circuit with an interrogation corresponding to the instructions.