Connection Of Components To Board Patents (Class 361/760)
  • Patent number: 8913379
    Abstract: A telecommunications chassis includes an array of mezzanine card interfaces and a carrier module coupled to the mezzanine card interfaces to control and manage mezzanine cards connected to the mezzanine card interfaces.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: December 16, 2014
    Assignee: Intel Corporation
    Inventors: Edoardo Campini, Steven Denies, Mark Summers, Lawson Guthrie
  • Patent number: 8913397
    Abstract: In a power source control circuit module, switching regulator devices and a linear regulator device are mounted on a surface of a laminated body so as to be spaced from each other. In an interface between dielectric layers of the laminated body, first to fifth internal ground electrodes separated by an electrode non-formation portion are provided. The first, second, fourth, and fifth internal ground electrode are connected to the respective switching regulator devices. The third internal ground electrode is connected to the linear regulator device. The first to fifth internal ground electrodes are connected to respective different external ground terminals.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: December 16, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masato Yoshida, Tomohiro Nagai, Hiroshi Matsubara
  • Patent number: 8913402
    Abstract: This interposer provides interconnections between stacked layers of circuits, which may include integrated circuits, PC boards, and hybrid substrates. Fabricated as an integrated circuit itself using readily available process steps, this interposer uses single and dual-damascene layers to increase the density of usable interconnections on both its top and bottom surfaces. Access from a top surface to a bottom surface is provided by conductive through-vias that may be placed at a high density. For even greater density, interconnections may be routed within silicon trenches, while damascene processing reduces the total number of steps required for fabrication. The described techniques may be used to create double-sided integrated circuits.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: December 16, 2014
    Assignee: American Semiconductor, Inc.
    Inventors: John E. Berg, Douglas R. Hackler, Sr.
  • Patent number: 8913398
    Abstract: An object of the present invention is to allow stress that may be applied to a semiconductor package to be suppressed, when the semiconductor package is mounted on a curved board. In a mount board 1, a semiconductor package 20 is mounted on a curved board 10 including a curved surface on at least a portion thereof. The curved board 10 includes a pedestal portion 13a disposed on a region of the curved surface portion where the semiconductor package 20 is mounted and having an upper surface thereof formed flat, and a plurality of pad portions 15a disposed on the flat surface of the pedestal portion 13a. The pedestal portion 13a is formed of an insulating material. The semiconductor package 20 is mounted on the pad portions 15a.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: December 16, 2014
    Assignee: NEC Corporation
    Inventors: Shinji Watanabe, Nobuhiro Mikami, Junya Sato, Kenichiro Fujii, Katsumi Abe, Atsumasa Sawada
  • Patent number: 8913401
    Abstract: A multilayer wiring board includes a signal electrode, a first power supply electrode, and a ground electrode, which are connected to a first element that outputs a signal, an electrode connected to a second element that receives the signal, a ground layer that serves as a return path for a return current of the signal, a first power supply layer that is disposed adjacent to the ground layer with a dielectric layer interposed therebetween and supplies electric power to the first element, and a second power supply layer that is provided independently of the first power supply layer and supplies electric power to the second element. The first power supply layer causes the return current to return to the first element through the first power supply electrode as a displacement current between the ground layer and the first power supply layer.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: December 16, 2014
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Daisuke Iguchi
  • Patent number: 8907467
    Abstract: A semiconductor package includes a baseplate having a die attach region and a peripheral region, a transistor die having a first terminal attached to the die attach region, and a second terminal and a third terminal facing away from the baseplate, and a frame including an electrically insulative member having a first side attached to the peripheral region of the baseplate, a second side facing away from the baseplate, a first metallization at the first side of the insulative member and a second metallization at the second side of the insulative member. The insulative member extends outward beyond a lateral sidewall of the baseplate. The first metallization is attached to the part of the first side which extends outward beyond the lateral sidewall of the baseplate. The first and second metallizations are electrically connected at a region of the insulative member spaced apart from the lateral sidewall of the baseplate.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: December 9, 2014
    Assignee: Infineon Technologies AG
    Inventors: Alexander Komposch, Soon Ing Chew, Brian Condie
  • Patent number: 8908383
    Abstract: Embodiments of the present disclosure describe apparatuses, methods, and systems of thermal via structures with surface features. In some embodiments the surface features may have dimensions greater than approximately one micron. The thermal via structures may be incorporated into a substrate of an integrated circuit device. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: May 21, 2012
    Date of Patent: December 9, 2014
    Assignee: TriQuint Semiconductor, Inc.
    Inventors: Tarak A. Railkar, Paul D. Bantz
  • Patent number: 8908387
    Abstract: A wiring board includes a substrate having an opening portion, electronic components positioned in the opening portion of the substrate and including first and second electronic components, and an insulation layer formed over the substrate and the first and second components. The first component has first and second electrodes having side portions on side surfaces of the first component, the second component has first and second electrodes having side portions on side surfaces of the second component, the first electrode of the first component and the first electrode of the second component are set to have substantially the same electric potential, and the first component and the second component are positioned in the opening portion of the substrate such that the side portion of the first electrode of the first component is beside the side portion of the first electrode of the second component.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: December 9, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Yukinobu Mikado, Shunsuke Sakai, Takashi Kariya, Toshiki Furutani
  • Patent number: 8908384
    Abstract: A computing device has a motherboard circuit substrate having at least one layer of electrical interconnects and a socket arranged to receive a main processor for the computing device, the socket electrically coupled to at least a portion of the layer of electrical interconnects, wherein the circuit substrate has no memory interconnects.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: December 9, 2014
    Assignee: Morgan/Weiss Technologies Inc.
    Inventors: Morgan Johnson, Frederick G. Weiss
  • Publication number: 20140354897
    Abstract: An input device comprises a flexible body, a sensing electrode, and a protection layer. The flexible body has a first side and a second side. The sensing electrode layer has a first sensing electrode and a second sensing electrode disposed on the second side of the flexible body. The protection layer is correspondingly disposed on the second side of the flexible body to cover the sensing electrode layer. Therefore, the input device of the present invention can be made lightweight and easy to carry and use.
    Type: Application
    Filed: May 30, 2013
    Publication date: December 4, 2014
    Inventors: Ching-Hang Shen, Fu-Kuei Chang
  • Publication number: 20140355213
    Abstract: An electronic device may include at least one power component and a printed circuit board. The at least one power component may include a main body and a lead. The printed circuit board may include at least two conductive layers parallel to a plane. The printed circuit board may further include a mounting element and a conductor. The mounting element may include first conductive tubes. The conductor may include second conductive tubes. The first conductive tubes and the second conductive tubes may elongate through a thickness of the printed circuit board along a direction substantially perpendicular to the plane. The main body of the at least one power component may be fixed to the mounting element. The lead of the at least one power component may be fixed to the conductor.
    Type: Application
    Filed: May 28, 2014
    Publication date: December 4, 2014
    Applicant: MAVEL S.r.l.
    Inventors: Davide BETTONI, Giorgio STIRANO
  • Publication number: 20140355231
    Abstract: A low voltage power receptacle assembly is adapted for providing access to low voltage power in compact spaces. The low voltage power receptacle assembly includes a circuit subassembly that is operable to transform a line voltage input, such as about 110V to 220V AC, to a lower voltage output, such as about 2V to 12V DC. Electrical input conductors receive and convey the line voltage from a power source to the circuit subassembly, while electrical output conductors convey the lower voltage output from the circuit subassembly to a low voltage power receptacle that may be spaced some distance from the circuit subassembly. The low voltage power receptacle is mountable in different housings, faceplates, and the like, to accommodate different mounting styles and locations.
    Type: Application
    Filed: June 2, 2014
    Publication date: December 4, 2014
    Inventors: Norman R. Byrne, Daniel P. Byrne, Randell E. Pate, Gerald N. Vander Till
  • Patent number: 8902603
    Abstract: An electronic circuit contains a circuit board with conducting tracks to which one or more electronic components with conducting contacts are positioned overlying portions of the conducting tracks and each such electronic component is held in place by a clamp that covers and is contact with the top surface of the electronic components so as to hold their conducting contacts in electrical contact with the conducting tracks of the circuit board. The clamp can include a resilient layer held between the top surface of electronic components and a rigid clamping sheet.
    Type: Grant
    Filed: August 15, 2011
    Date of Patent: December 2, 2014
    Inventor: Carmen Rapisarda
  • Patent number: 8897027
    Abstract: A bonding pad structure is disclosed, which is composed of two bonding pad units that are symmetrically disposed with respect to an axial line. Each bonding pad units is further composed of at least two bonding pads, i.e. each bonding pad unit is composed of at least one first bonding pad and at least one second bonding pad. In an embodiment, the first bonding pad is arranged next to the axial line and the second bonding pad is arranged at a side of the corresponding first bonding pad away from the axial line while enabling the first bonding pad and the corresponding second bonding pad to be interconnected to each other by a first neck portion. Thereby, a plurality of solder areas of different sizes can be formed by the interconnecting of the at least two bonding pad units that can be used for soldering electronic components of different sizes.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: November 25, 2014
    Assignee: Wintek Corporation
    Inventors: Han-Chung Chen, Chun-Yi Wu, Shih-Cheng Wang, Chin-Mei Huang, Tsui-Chuan Wang, Pei-Fang Tsai
  • Patent number: 8897023
    Abstract: An electrical assembly for a motor controller is disclosed that includes an electrical lead. The electrical lead has a conductive trace within an insulating material and that extends a length between first and second ends. An electrical pad is in electrical continuity with and extends from the conductive trace through the insulating material at the first end. The pad includes an aperture providing a securing feature. An electrical component is supported by and integral with the second end, in one example. The electrical component is in electrical continuity with the conductive trace at the second end. A bus bar provides a joint having a first cross-sectional area. The electrical lead is flexible and is removably secured to the joint by the securing feature to provide electrical continuity from a capacitor to the bus bar. The flexible electrical lead has a second cross-sectional area substantially less than the first cross-sectional area.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: November 25, 2014
    Assignee: Hamilton Sundstrand Corporation
    Inventor: Debabrata Pal
  • Patent number: 8895868
    Abstract: A wiring substrate includes a wiring layer made of copper, an electrode layer made of copper, and an insulating layer arranged adjacent to the electrode layer. The wiring layer is stacked on the electrode layer and the insulating layer. The insulating layer and the wiring layer are stacked with an adhesive layer interposed between the wiring insulating layer and the wiring layer. The electrode layer and the wiring layer are stacked without the adhesive layer interposed between the electrode layer and the wiring layer.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: November 25, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Masahiro Sunohara
  • Publication number: 20140340860
    Abstract: The invention comprises an at least one-layer electrical circuit board (1) having internal and/or external conducting tracks or electrical circuits (3, 8), which circuit board has copper pads (4, 5) arranged on the surface for population with electrical components and/or which has copper pads (5) for electrically connecting at least two layers of the circuit board, and which is at least partially surrounded by media, in particular liquid media, further in particular oil, or is directly exposed thereto, wherein said copper pads (4, 5) and exposed conducting tracks (8) are coated with a further metal (7).
    Type: Application
    Filed: September 6, 2012
    Publication date: November 20, 2014
    Applicant: ROBERT BOSCH GMBH
    Inventors: Andreas Otto, Sabrina Rathgeber, Marc Fischer
  • Patent number: 8890455
    Abstract: Disclosed herein are electric vehicle control device which can distribute the heat generated by the semiconductor devices in the DC/AC converter efficiently. Also disclosed herein are methods of converting DC to AC while keeping the heat value of the semiconductor devices stable.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: November 18, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinichi Toda, Ikuo Yasuoka, Yosuke Nakazawa
  • Patent number: 8885356
    Abstract: A microelectronic assembly includes a dielectric element, first and second microelectronic elements, signal leads, and one or more jumper leads. The dielectric element has oppositely-facing first and second surfaces and first and second apertures extend between the surfaces. A plurality of electrically conductive elements are positioned thereon. Signal leads are connected to one or more of the microelectronic elements and extend through one or more of the first or second apertures to some of the conductive elements on the dielectric element. One or more jumper leads extend through the first aperture and are connected to a contact of the first microelectronic element. The one or more jumper leads span over the second aperture and are connected to a conductive element on the dielectric element.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: November 11, 2014
    Assignee: Tessera, Inc.
    Inventors: Belgacem Haba, Wael Zohni, Richard Dewitt Crisp
  • Patent number: 8885357
    Abstract: A multi-layer printed circuit board has a number of landing pads that are configured to engage a connector secured thereto. Between the landing pads associated with different signals is at least one micro via that is electrically connected to a ground plane on an outer surface of the multi-layer printed circuit board, and a ground plane on an inner layer of the multi-layer printed circuit board.
    Type: Grant
    Filed: January 6, 2012
    Date of Patent: November 11, 2014
    Assignee: Cray Inc.
    Inventors: Hyunjun Kim, Jeffrey S. Conger, Gregory E. Scott
  • Patent number: 8885355
    Abstract: A structure such as a button may have a substrate. Components such as switches may be mounted on the substrate. The substrate may be a printed circuit board with solder pads. A snap member may be soldered to one of the solder pads. A metal clip may have a snap arm with an opening. The metal clip may be attached to the printed circuit board. When attached, the opening in the snap arm may mate with the snap member that is soldered to the solder pad on the printed circuit board. The printed circuit board may be attached to a button housing member. A button cover member may be attached to the clip. A ground connection may be formed between the metal clip and the snap member by providing the snap member with structures that bear against the metal clip and form an electrical connection.
    Type: Grant
    Filed: July 6, 2011
    Date of Patent: November 11, 2014
    Assignee: Apple Inc.
    Inventor: Craig Matthew Stanley
  • Publication number: 20140328036
    Abstract: An electronic device includes a dielectric substrate having a first surface, a conductive circuit deposited on the first surface and having a printed conductive ink trace on the first surface, and a conductive interposer mechanically coupled to the substrate. The conductive interposer is electrically coupled to the conductive circuit. The conductive interposer has a separable contact interface configured to be mechanically and electrically connected to a removable contact. Optionally, the conductive interposer may include a main body and a flexible element extending between the main body and the conductive circuit. The flexible element electrically connects the conductive circuit with the main body.
    Type: Application
    Filed: May 1, 2013
    Publication date: November 6, 2014
    Applicant: Tyco Electronics Corporation
    Inventors: David Bruce Sarraf, Charles Randall Malstrom
  • Publication number: 20140328037
    Abstract: A carrier assembly (100) comprises an IC package (200) and a carrier (300) for positioning the IC package (200), the IC package (200) includes a body portion (22), a die portion (21) extending upwardly from the body portion (22) and a ear portion (232) extending from the die portion (21), the ear portion (232) and the body portion (22) defines a space (231), the carrier (300) includes a first side (310), a second side (312) opposite to the first side (310), a position portion (343) extending from the first side (310) and a fixing portion (331) extending from the second side (312) positioned in the space (231) of the IC package (200) to position the IC package (200) on the carrier (300).
    Type: Application
    Filed: January 22, 2014
    Publication date: November 6, 2014
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: CHENG-CHI YEH, CHIH-KAI YANG
  • Publication number: 20140328084
    Abstract: An electronic device and a display module used therein are provided. The display module includes a display panel, a backlight module and a sensing antenna. The backlight module has a light exit surface and a reflective plate opposite to the light exit surface, and the display panel is stacked on the light exit surface. The sensing antenna is disposed on a surface of the reflective plate opposite to the light exit surface and has a body and two signal connecting terminals connecting the body. The electronic device includes the display module, a system circuit module, and a conductive device. The system circuit module is disposed on a back side of the display module and has a signal connecting parts corresponding to and connecting the signal connecting terminals.
    Type: Application
    Filed: May 2, 2014
    Publication date: November 6, 2014
    Applicants: AU Optronics Corporation, Jieng Tai International Electric Corp.
    Inventors: Tzu-Yu Chuang, Fang-Ching Lee, Chi-Hung Lu, Meng-Ying Hsieh
  • Patent number: 8878070
    Abstract: A wiring board of this invention includes a product formation area in which are arranged a plurality of product formation sections on which a semiconductor chip is mounted; a molding area that is provided on an outer circumferential side of the product formation area, and with which a seal portion that covers the semiconductor chips mounted on the product formation sections makes contact; a clamp area that is provided on an outer circumferential side of the molding area, and that is held by a molding die that forms the seal portion; wiring that is provided in the product formation area, and that is electrically connected to the semiconductor chips; a first solid pattern that is provided in the molding area, and in which a plurality of dots are arranged; and a second solid pattern that is provided in the clamp area, and in which a plurality of dots that are larger than the dots of the first solid pattern are arranged.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: November 4, 2014
    Assignee: PS4 Luxco S.A.R.L.
    Inventors: Emi Kashiwaya, Osamu Kindo, Noriou Shimada
  • Patent number: 8880129
    Abstract: A mobile terminal is provided. The mobile terminal includes a terminal body, a window disposed at one surface of a terminal body, a first frame having a space for mounting one or more components, the first frame having a first cavity, a display configured to output visual information through the window, the display being located at the first cavity, a battery configured to supply power to the terminal body, the battery being located at the first cavity, and a separation sheet coupled to the first frame to separate a first region of the terminal body where the display is located from a second region of the terminal body where the battery is located. A periphery of the separation sheet contacts the bottom of the first cavity.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: November 4, 2014
    Assignee: LG Electronics Inc.
    Inventors: Hyunwoo Lee, Wonseok Joo
  • Patent number: 8879275
    Abstract: A conformal coating comprising modified porous silica particles is disclosed. A porous silica particle, such as MCM-14 or SBA-15 is modified with a sulfur gettering functionality, such as a phosphine compound, covalently bonded to silicon atoms in the porous silica particle. The conformal coating comprising the modified porous silica particles may be applied to metallic wiring areas of a circuit component, with the sulfur gettering functionality preventing sulfur from atmospheric gasses from penetrating the conformal coating to the metallic wiring.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: November 4, 2014
    Assignee: International Business Machines Corporation
    Inventors: Dylan J. Boday, Joseph Kuczynski, Jason T. Wertz, Jing Zhang
  • Patent number: 8879274
    Abstract: There is disclosed a method of manufacturing an electrical component, involving bonding a thin metal foil to an insulating substrate and thereby forming a component blank, and laser machining at least the metal foil of said component blank to produce at least one trench for defining one or more foil tracks, said trench being at least equal in depth to the thickness of the foil so as to prevent current flow across the trench.
    Type: Grant
    Filed: December 1, 2004
    Date of Patent: November 4, 2014
    Assignee: The Commonwealth of Australia—Department of Defence
    Inventors: Alan Wilson, Peter Vincent, Richard Muscat
  • Patent number: 8873244
    Abstract: A package structure includes a base body having a first encapsulant and a wiring layer embedded in and exposed from the first encapsulant. The wiring layer has a plurality of conductive traces and a plurality of first electrical contact pads. The first encapsulant has openings for exposing the first electrical contact pads, a chip electrically connected to the wiring layer, and a second encapsulant formed on the base body for covering the chip and the wiring layer, thereby providing an even surface for preventing the encapsulant from cracking when the chip is mounted.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: October 28, 2014
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Pang-Chun Lin, Hsiao-Jen Hung, Chun-Yuan Li, Chien-Ping Huang, Chun-Chi Ke
  • Patent number: 8869391
    Abstract: A method for producing a wired circuit board includes the steps of preparing a metal supporting layer, forming an insulating layer on the metal supporting layer so as to form an opening, forming a conductive thin film on the insulating layer and on the metal supporting layer that is exposed from the opening of the insulating layer, heating the conductive thin film, forming a conductive pattern on the conductive thin film that is formed on the insulating layer, and forming a metal connecting portion to be continuous to the conductive pattern on the conductive thin film that is formed on the metal supporting layer exposing from the opening of the insulating layer.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: October 28, 2014
    Assignee: Nitto Denko Corporation
    Inventors: Katsutoshi Kamei, Yuu Sugimoto, Hitoki Kanagawa
  • Patent number: 8873246
    Abstract: A wiring board includes a metal cap pad that is arranged so as to surround a mounting position of an electronic component and is connected to an end portion of a metal cap, a power source plane that is connected to the electronic component through a connection member and has a gap, a ground plane that is connected to the electronic component through a connection member, and a plurality of conductive body elements that are repeatedly arranged so as to surround the connection members and the gap. The power source plane and the ground plane extend so as to include at least a part of an area that is surrounded by the plurality of conductive body elements and at least a part of an area facing the plurality of conductive body elements.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: October 28, 2014
    Assignee: NEC Corporation
    Inventors: Hiroshi Toyao, Manabu Kusumoto, Naoki Kobayashi, Noriaki Ando
  • Patent number: 8873247
    Abstract: A device includes a wiring board, an element mounted on the wiring board, a spacer member intervening between the wiring board and the element to form a space therebetween, and an encapsulation body filling the space and encapsulating the element on the wiring board.
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: October 28, 2014
    Assignee: PS4 Luxco S.A.R.L.
    Inventor: Koji Hosokawa
  • Publication number: 20140313684
    Abstract: A non-planar printed circuit board has an interior surface and an exterior surface. Between the interior surface and exterior surfaces are layers of conductive and dielectric materials. Passive and active electrical components are embedded within the interior and exterior surfaces. A hollow region is defined by the interior surface of the non-planar circuit board. The non-planar printed circuit board is manufactured on a mandrel having a non-planar shape such as, for example, a cylinder or sphere so as to form a hollow, curved non-planar structure.
    Type: Application
    Filed: April 17, 2013
    Publication date: October 23, 2014
    Inventor: Bruce V. Hughes
  • Patent number: 8867223
    Abstract: A device includes a substrate, a first antenna connection, and a first retention mechanism. The substrate has a top surface and a bottom surface. The first antenna connection is mounted directly to the top surface of the substrate, and is configured to connect with a first antenna. The first retention mechanism is connected at a first location of the bottom surface of the substrate to provide support for the substrate at the first antenna connection when the first antenna connection is connected to the first antenna. The first location of the first retention mechanism is selected to be directly below the first antenna connection.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: October 21, 2014
    Assignee: Dell Products, LP
    Inventors: Andrew T. Sultenfuss, Thomas G. Noonan
  • Patent number: 8867231
    Abstract: An electronic module package that includes an electronic module configured to receive input signals and process the input signals to provide output signals. The module package also includes an interposer having a board substrate with opposite mounting and substrate surfaces. The mounting surface has a mounting array of electrical contacts. The substrate surface has a module array of electrical contacts and a component array of electrical contacts. The electronic module is attached to the substrate surface and electrically coupled to the module array. The interposer includes first conductive pathways that electrically couple the module array and the mounting array and also includes second conductive pathways that electrically couple the module array and the component array.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: October 21, 2014
    Assignee: Tyco Electronics Corporation
    Inventors: Lee Jacobo Jose Roitberg, Terry R. Billger
  • Patent number: 8867228
    Abstract: An electrode bonding structure sealed with a sealing resin, in which a flexible substrate is bonded to a first substrate via an adhesive, wherein: a region along a bottom face edge of an flexible substrate end part is bonded, via the adhesive, to an inner side region of a region along a top face edge of an first substrate end part; a gap is formed between an inner side region of the region along the bottom face edge of the flexible substrate end part and the region along the top face edge of the first substrate end part; the sealing resin is formed so as to enter, while covering a top face of the flexible substrate end part, at least a portion of the gap; and a height of the gap gets smaller towards the adhesive from the top face edge of the first substrate end part.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: October 21, 2014
    Assignee: Panasonic Corporation
    Inventors: Hiroaki Katsura, Koso Matsuno, Yoji Ueda
  • Patent number: 8867225
    Abstract: A wiring board includes: a core layer having a through hole therethrough and comprising a first surface and a second surface opposite to the first surface; a first wiring layer formed on the first surface of the core layer and having a first opening which is communicated with the through hole, wherein an opening area of the first opening is larger than that of the through hole in a plan view; an electronic component disposed in the through hole and the first opening and having a first surface, and a second surface opposite to the first surface, the electronic component further having a pair of terminal on the first surface thereof; and a first resin layer filled in the through hole, the first opening and a gap between the pair of terminals so as to cover the second surface and the side surface of the electronic component.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: October 21, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Junji Sato
  • Patent number: 8867230
    Abstract: In the present invention, generation of occurrence of a wiring area is prevented, and a reflection by an inconsistency of a characteristic impedance of a high-speed signal line and a through hole connecting portion. By doing so, a conductor pattern of a raised shape is formed on each of front and back of a through hole, on a GND layer closest to the high-speed signal line in the vicinity of the connecting portion of the high-speed signal line and the through hole. Further, the conductor pattern is a trapezoidal shape, and is a shape which becomes wider as it becomes closer to the through hole.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: October 21, 2014
    Assignee: Hitachi, Ltd.
    Inventor: Masatoshi Yoshihara
  • Patent number: 8867226
    Abstract: A MMIC having: a substrate; a plurality of active and passive electrical elements disposed on a top surface of the substrate; a plurality of coplanar waveguide transmission line sections disposed on the top surface of the substrate for electrically interconnecting the active and passive electrical elements; an electrical conductor disposed on a bottom surface of the substrate under the coplanar waveguide section. Edges of ground plane conductors of the coplanar waveguide (CPW) sections have slots therein in regions thereof connected to the active and passive devices. The design of such circuit includes mathematical models of the CPW with the pair of local ground planes and the strip conductor thereof have relatively narrow connectable ports.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: October 21, 2014
    Assignee: Raytheon Company
    Inventors: Matthew C. Tyhach, Francois Y. Colomb
  • Patent number: 8867224
    Abstract: A mounting structure includes: an electronic component including: a functional element having a predetermined function; a first resin protrusion section having a surface covered by a covering film including a conductive section electrically connected to the functional element; and a second resin protrusion section that is disposed inside an area surrounded by the first resin protrusion section, and has adhesiveness at least on a surface of the second resin protrusion section, and a base member having a connection electrode and adapted to mount the electronic component. In the structure, the second resin protrusion section mounts the electronic component on the base member in a condition in which the conductive section of the covering film has conductive contact with the connection electrode due to elastic deformation of the first resin protrusion section.
    Type: Grant
    Filed: January 9, 2012
    Date of Patent: October 21, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Yukihiro Hashi
  • Patent number: 8861214
    Abstract: Substrates for integrated passive devices are described herein. Embodiments of the present invention provide substrates including a glass layer and at least one passive device disposed thereon. According to various embodiments of the present invention, the glass layer may have a thickness adapted to minimize conductive and/or other interactions between the substrate and the at least one passive device. Other embodiments may be described and claimed.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: October 14, 2014
    Assignee: Marvell International Ltd.
    Inventors: Albert Wu, Chuan-Cheng Cheng
  • Patent number: 8858270
    Abstract: A battery pack comprising: at least one battery including at least one electrode and at least one terminal in electrical connection with the electrode; a printed circuit board (PCB) comprising at least one layer having an electrical circuit in electrical connection with the at least one battery, the PCB including at least one PCB interconnect for electrical connection with the at least one battery; and at least one battery-pack interconnect in electrical connection with the at least one PCB interconnect and the at least one terminal of the battery. The PCB interconnect comprises a PCB-interconnect aperture formed therein and having an electrically conductive inner surface structured to receive the battery-pack interconnect for direct electrical connection between the two.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: October 14, 2014
    Assignee: The Gillette Company
    Inventors: Robert J. Pavlinsky, Mark Curtis Brown, Anthony Joseph Malgioglio
  • Patent number: 8861217
    Abstract: This relates to systems and methods for providing one or more vias through a module of an electrical system. For example, in some embodiments, the module can include one or more passive elements and/or active of the electrical system around which a packaging has been plastic molded. The module can be stacked under another component of the electrical system. Vias can then be provided that extend through the module. The vias can include, for example, electrically conductive pathways. In this manner, the vias can provide electrical pathways for coupling the component stacked on top of the module to other entities of an electronic device including the electrical system. For example, the component can be coupled to other entities such as other components, other modules, printed circuit boards, other electrical systems, or to any other suitable entity.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: October 14, 2014
    Assignee: Apple Inc.
    Inventors: Gloria Lin, William Bryson Gardner, Jr., Joseph Fisher, Jr., Dennis Pyper, Amir Salehi
  • Patent number: 8861196
    Abstract: A heat dissipation structure includes a circuit board that is disposed inside an outer casing having a chassis formed with air inlet holes, and in which a first electronic component generating heat when driven and a second electronic component not generating heat when driven are mounted on one surface of a base plate, and a heat sink that releases the heat generated in the first electronic component. Here, in the heat sink, a heat dissipation unit positioned facing the base plate, an eaves portion protruding from the heat dissipation unit, and a pair of enclosing portions protruding from ends of the eaves portion in a direction perpendicular to a protruding direction from the heat dissipation unit, and at least one of the air inlet holes is formed in a position facing the eaves portion.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: October 14, 2014
    Assignee: Sony Corporation
    Inventors: Shun Kayama, Yukiko Shimizu
  • Patent number: 8861218
    Abstract: Embodiments disclosed herein generally include using a large number of small MEMS devices to replace the function of an individual larger MEMS device or digital variable capacitor. The large number of smaller MEMS devices perform the same function as the larger device, but because of the smaller size, they can be encapsulated in a cavity using complementary metal oxide semiconductor (CMOS) compatible processes. Signal averaging over a large number of the smaller devices allows the accuracy of the array of smaller devices to be equivalent to the larger device. The process is exemplified by considering the use of a MEMS based accelerometer switch array with an integrated analog to digital conversion of the inertial response. The process is also exemplified by considering the use of a MEMS based device structure where the MEMS devices operate in parallel as a digital variable capacitor.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: October 14, 2014
    Assignee: Cavendish Kinetics Inc.
    Inventors: Charles Gordon Smith, Richard L. Knipe, Vikram Joshi, Roberto Gaddi, Anartz Unamuno, Robertus Petrus Van Kampen
  • Patent number: 8860202
    Abstract: A chip stack structure and a manufacturing method thereof are provided. The chip stack structure comprises a first chip, a second chip and a vertical conductive line. The second chip is disposed above the first chip. The vertical conductive line is electrically connected to the first chip and the second chip. The vertical conductive line is disposed at the outside of a projection area of the first chip and the second chip.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: October 14, 2014
    Assignee: Macronix International Co., Ltd.
    Inventor: Shih-Hung Chen
  • Patent number: 8861216
    Abstract: A fixing mechanism for fixing an electronic component is disclosed in the present invention. The fixing mechanism includes a first casing, a boss disposed on the first casing. The electronic component is disposed on the boss. The fixing mechanism further includes a resilient component disposed on the boss and located between the first casing and the electronic component, a circuit board putting on the electronic component and fixed on the first casing, and a second casing pressing the circuit board and fixed on the first casing. The circuit board contacts against the electronic component tightly by an assembly of the first casing and the second casing.
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: October 14, 2014
    Assignee: Wistron Corporation
    Inventors: Yung-Li Jang, Jian-bing Shan, Ming-Chih Chen
  • Patent number: 8861215
    Abstract: A device includes: a wiring board having first and second surfaces opposing each other; and a plurality of memory packages on the first surface. The wiring board includes: a first set of terminals on the first surface; a plurality of second sets of terminals on the first surface; and a plurality of first signal lines. The terminals of the first set receive respective ones of a plurality of first signals supplied from a control device. Each of the second sets is provided for a corresponding one of the memory packages. The terminals of each of the second sets contact the corresponding one of the memory packages. The first signal lines extend from respective ones of the terminals of the first set while coupling respective ones of the terminals of each of the second sets. The first signal lines extend on the first surface without extending in the wiring board.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: October 14, 2014
    Assignee: PS4 Luxco S.a.r.l.
    Inventors: Miho Nomoto, Yukitoshi Hirose
  • Publication number: 20140301053
    Abstract: A multilayer ceramic substrate including an inner-layer section, surface-layer sections stacked on opposed principal surfaces of the inner-layer section, and surface electrodes provided on at least one surface of the surface-layer sections. The surface-layer sections contain SiO2-MO—B2O3—Al2O3 based glass and an Al2O3 filler, wherein MO is at least one selected from the group consisting of CaO, MgO, SrO, and BaO. The coefficient of thermal expansion in the surface-layer sections is lower than the coefficient of thermal expansion in the inner-layer section, and the peak intensity ratio through an XRD analysis between MAl2Si2O8 and Al2O3 in the surface-layer sections falls within the range of 0.05?(MAl2Si2O8/Al2O3)?5, wherein M is at least one selected from the group consisting of Ca, Mg, Sr, and Ba.
    Type: Application
    Filed: June 23, 2014
    Publication date: October 9, 2014
    Inventors: Yuichi Iida, Satoru Adachi, Kazuo Kishida
  • Publication number: 20140301052
    Abstract: An electrical apparatus includes a printed circuit board (PCB) and a socket to electrically interface with the PCB. The PCB includes conductive traces formed in a layer of the PCB and one or more recess. Each of the recess includes an inner surface. A portion of the inner surface forms a first electrical contact connected to one of the conductive traces. The socket includes a multitude of conductive pins and one or more mechanical support matching the position of the recesses. Each of the mechanical support includes an outer surface. A portion of the outer surface forms a second electrical contact connected to an interface pin. The first electrical contact at the PCB and the second electrical contact at the socket form a conduction path from one of the conductive traces on the PCB to the interface pin at the socket when the PCB is inserted into the socket.
    Type: Application
    Filed: March 14, 2014
    Publication date: October 9, 2014
    Applicant: Wintec Industries, Inc.
    Inventor: Kong-Chen Chen