Connection Of Components To Board Patents (Class 361/760)
  • Patent number: 8854821
    Abstract: According to one embodiment, an input-output (I-O) panel is transformed. The I-O panel is configured to couple to an array of first midplane connectors of a first shelf configured according to a first format, where the first shelf has rear access. The I-O panel comprises an array of I-O panel connectors and defines an xy-plane. An array of second midplane connectors of a second shelf is transformed to substantially align the second midplane connectors with the I-O panel connectors. The second shelf is configured according to a second format, where the second shelf has front access. The array of second midplane connectors is arranged in columns defining a midplane column axis and rows defining a midplane row axis.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: October 7, 2014
    Assignee: Fujitsu Limited
    Inventor: Stephen J. Brolin
  • Patent number: 8853559
    Abstract: The invention relates to a high-voltage insulation circuit board which is used in an electric power apparatus such as an electric power converter or the like such as power semiconductor device, inverter module, or the like and provides an insulation circuit board in which electric field concentration at the end sections of a wiring pattern is reduced, partial discharging is suppressed, and a reliability is high. According to the invention, there is provided an insulation circuit board having: a metal base substrate; and wiring patterns which are formed onto at least one of the surfaces of the metal base substrate through an insulation layer, characterized in that between two adjacent wiring patterns in which an electric potential difference exists among the wiring patterns, at least one or more wiring patterns or conductors which are in contact with the insulation layer and have an electric potential in a range of the electric potential difference between the adjacent wiring patterns are arranged.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: October 7, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Hironori Matsumoto, Jumpei Kusukawa
  • Publication number: 20140293558
    Abstract: A lens mount is attached to a circuit board and covers electrical components on the circuit board. An electrically insulating device is positioned between the lens mount and the circuit board. The circuit board includes a grounding pad adjacent the electrically insulating device. The lens mount includes an aperture aligned with the grounding pad and the electrically insulating device. A conductive glue is dispensed into the aperture to electrically ground the lens mount to the grounding pad. The electrically insulating device seals the conductive glue from the electrical components. A method of grounding a lens mount to a circuit board is provided.
    Type: Application
    Filed: March 28, 2013
    Publication date: October 2, 2014
    Applicant: STMicroelectronics Pte Ltd.
    Inventor: Wee Chin Judy Lim
  • Patent number: 8848383
    Abstract: A system for mounting a flash blade in a storage system includes a motherboard with a series of card guide cutouts for aligning flash blades. A flash blade can be aligned perpendicular to the motherboard and aligned parallel to adjacent flash blades by inserting the flash blade into one of the card guide cutouts and connecting the flash blade to a connector at one end of the cutout. This beneficially aligns the flash blade while making efficient use of the available vertical space within a chassis. The flash blade can also extend through the cutout to the other side of the motherboard. The efficient use of vertical space enables an increase in the number of solid state memory can be added to the flash blade relative to conventional designs, thereby improving capacity.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: September 30, 2014
    Assignee: Skyera, Inc.
    Inventors: Pinchas Herman, Radoslav Danilak
  • Patent number: 8848384
    Abstract: A power transducer is downsized by reducing the size of a power source board and highly reliable. The power source board is provided in the power transducer and for a large-current circuit. The power transducer includes a power semiconductor module having lead terminals. Of the lead terminals provided for the power semiconductor module and connected with the main circuit board, predetermined one or ones of the lead terminals is or are connected with the main circuit board in the vicinity of a main circuit terminal stage and at a position or positions lower than the main circuit terminal stage. Alternatively, predetermined one or ones of the lead terminals is or are connected with the main circuit board at a position or positions lower than a position at which the main circuit terminal stage is provided.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: September 30, 2014
    Assignee: Hitachi Industrial Equipment Systems Co., Ltd.
    Inventors: Satoshi Ibori, Yasushi Sasaki, Yutaka Maeno, Masayuki Hirota, Kazuyuki Fukushima
  • Patent number: 8844125
    Abstract: A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: September 30, 2014
    Assignee: Harris Corporation
    Inventors: Louis Joseph Rendek, Jr., Travis L. Kerby, Casey Philip Rodriguez
  • Patent number: 8848388
    Abstract: An electrical device includes a first substrate and a second substrate which are disposed in an opposing manner so as to interpose a functional element, a first electrode (rear surface electrode) which is provided more to the first substrate side than the functional element, a second electrode which is provided on the second substrate and is electrically connected to the first electrode, and a functional element and an electronic component which drives the functional element in a region which is a region where the first substrate and the second substrate overlap and which is interposed between the first electrode and the second electrode.
    Type: Grant
    Filed: February 22, 2012
    Date of Patent: September 30, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Takashi Sato
  • Patent number: 8848385
    Abstract: The present disclosure relates to reducing unwanted RF noise in a printed circuit board (PCB) containing an RF device. An isolation filter is embedded in a PCB containing an RDF device. By placing the isolation filter as close as possible to the RF device in order to dramatically reduce unwanted RF noise due to unavoidable coupling between Vias and planes in the PCB structure.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: September 30, 2014
    Assignee: R&D Sockets, Inc
    Inventors: Thomas P. Warwick, James V. Russell
  • Publication number: 20140268603
    Abstract: A method for designing structures with complimentary dynamic warp characteristics for attachment of a component to a PC board is disclosed. The method may include determining characteristics of thermally induced dynamic warp of the PC board and of the first component, analyzing and comparing differences between the dynamic warp characteristics of the PC board and the first component and selecting design modifications to match PC board and the first component dynamic warp characteristics. Selecting design modifications may include determining if the first component dynamic warp characteristics can be changed, determining if matching the dynamic warp characteristics of the PC board and the first component can be achieved by modifying the design of at least one of the PC board and the first component. The result of the method may be modified dynamic warp characteristics of at least one of the PC board and the first component.
    Type: Application
    Filed: March 12, 2013
    Publication date: September 18, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark K. Hoffmeyer, Amanda E. Mikhail, Arvind K. Sinha
  • Publication number: 20140268611
    Abstract: A system for providing electrical power connection across components mounted to a backplane of an electrical chassis includes a backplane having multiple apertures and front and rear faces. A daughter board faces the front face of the backplane. The daughter board has multiple traces with individual conductive pads. A power connector connected to the rear face of the backplane has multiple conductive members. Multiple fasteners each extend through both the daughter board and into the backplane to electrically couple each of the conductive pads of the daughter board to one of the conductive members of the power connector.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: Emerson Network Power - Embedded Computing, Inc.
    Inventors: Naufel C. NAUFEL, Douglas L. SANDY, Christopher M. MADSEN, James J. DORSEY, JR.
  • Publication number: 20140268606
    Abstract: A package of an environmentally sensitive electronic device and a fabricating method thereof are provided, wherein the package may include a first substrate, a second substrate, the environmentally sensitive electronic device, a packaging body, and a filler. In one or more embodiments, the environmentally sensitive electronic device may be disposed on the first substrate and located between the first substrate and the second substrate. The filler is disposed between the first substrate and the second substrate and covers the environmentally sensitive electronic device. The packaging body is sandwiched between the first substrate and the second substrate and encloses the environmentally sensitive electronic device and the filler. A material for the packaging body may include a bonding of transition metal and metalloid.
    Type: Application
    Filed: February 27, 2014
    Publication date: September 18, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventor: Kuang-Jung CHEN
  • Publication number: 20140268604
    Abstract: The present invention provides systems and methods for embedding a filament or filament mesh in a three-dimensional structure, structural component, or structural electronic, electromagnetic or electromechanical component/device by providing at least a first layer of a substrate material, and embedding at least a portion of a filament or filament mesh within the first layer of the substrate material such the portion of the filament or filament mesh is substantially flush with a top surface of the first layer and a substrate material in a flowable state is displaced by the portion of the filament and does not substantially protrude above the top surface of the first layer, allowing the continuation of an additive manufacturing process above the embedded filament or filament mesh.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM
    Inventors: Ryan B. Wicker, Francisco Medina, Eric MacDonald, Danny W. Muse, David Espalin
  • Publication number: 20140268580
    Abstract: In one embodiment, a printed circuit board (PCB) assembly includes a PCB, the PCB being arranged to define a through-hole therein, the through-hole having a surface, wherein the PCB includes a top surface and a bottom surface. The PCB assembly also includes a slug arrangement and a surface mount component. The slug arrangement is formed from an electrically and thermally conductive material and includes at least a first portion and a second portion. At least a part of the first portion is positioned in the through-hole, and the second portion is coupled to the bottom surface. The surface mount component is positioned over the through-hole and the top surface, and has a first surface configured to contact the first portion.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: James A. Mass, David Lynn Artman, Timothy A. Frank
  • Publication number: 20140268598
    Abstract: An electronic device may have a housing in which electrical components on a printed circuit board are mounted. A connector may be mounted to the edge of the printed circuit board using solder. The connector may have a threaded portion that protrudes through the housing. A threadless portion of the connector may be aligned with the housing. The connector may have a metal body member covered with a metal shell. The metal shell may have a portion that covers the electrical components and serves as an electromagnetic interference shield for the electrical components. The connector may have a threaded barrel. The threaded barrel may have a threaded outer portion with a diameter that is larger than a threaded inner portion. The threadless portion of the connector may lie between the threaded outer and inner portions.
    Type: Application
    Filed: May 22, 2013
    Publication date: September 18, 2014
    Applicant: Apple Inc.
    Inventors: Jae Hwang Lee, Dominic E. Dolci, Phillip S. Satterfield, George Tziviskos
  • Publication number: 20140268605
    Abstract: An assembly and method for mounting an electronic package to a printed circuit board (PCB) in which a gasket is shaped to fit tightly around and under a perimeter edge of an electronic package.
    Type: Application
    Filed: July 17, 2013
    Publication date: September 18, 2014
    Inventors: Tom Rovere, James K. Lake, Rick Micha, Paul Coyne
  • Patent number: 8837164
    Abstract: There are provided a substrate for mounting a device and a package for housing the device employing the same in which a power semiconductor device can be readily set for a temperature suitable for operation and can thus function in a proper fashion. The substrate for mounting the device includes a support body having, on one main surface of the support body, a device mounting portion for mounting a power semiconductor device, the support body having a plurality of columnar parts that are spaced apart in a thickness direction with respect to the device mounting portion and are arranged apart from each other; and a heat accumulating region which is disposed between the columnar parts and is lower in thermal conductivity than the support body.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: September 16, 2014
    Assignee: Kyocera Corporation
    Inventors: Kazuhiro Kawabata, Kiyoshige Miyawaki, Yoshiaki Ueda, Shinji Nakamoto, Tsutomu Sugimoto
  • Patent number: 8837159
    Abstract: Devices and methods for constructing low-profile, minimal-thickness electronic devices using existing production techniques are disclosed in this application. An electronic component and interposer form a sub-assembly. The sub-assembly is placed in an aperture in a circuit board with the interposer providing interconnections between the electronic component and the circuit board. Such placement conceals the thickness of the integrated circuit within the thickness of the circuit board, reducing overall thickness.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: September 16, 2014
    Assignee: Amazon Technologies, Inc.
    Inventor: David C Buuck
  • Patent number: 8835773
    Abstract: A method of manufacturing a wiring board for use in mounting of an electronic component includes: forming an outermost wiring layer on a surface side where the electronic component is mounted; forming an insulating layer so as to cover the wiring layer; and forming a concave portion in the insulating layer. The concave portion is formed by removing, using a mask formed in a required shape by patterning, an exposed portion of the insulating layer in a step-like shape until a surface of a pad defined at a portion of the wiring layer is exposed. The concave portion is preferably formed by removing the portion of the insulating layer by sand blast.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: September 16, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Shigetsugu Muramatsu, Yasuhiko Kusama
  • Patent number: 8836509
    Abstract: A security device for protecting stored sensitive data includes a closed housing including an array of conductor paths and tamper detecting means adapted to detect a change in impedance of the array of conductor paths above a predetermined threshold value.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: September 16, 2014
    Assignee: Direct Payment Solutions Limited
    Inventor: Jonathan David Lowy
  • Patent number: 8832929
    Abstract: A method of manufacturing a flexible printed circuit board including determining an elastic modulus of a conductive portion and an elastic modulus of first and second dielectric portions, determining a thickness of the conductive portion and the first and second dielectric portions so that a neutral plane is located within a predetermined range of the thickness of the conductive portion, the neutral plane being substantially free from tension or compression in response to bending of the flexible printed circuit board, and insulating the conductive portion according to the determined thickness and the determined elastic modulus.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: September 16, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Kyung Ho Lee, Se Min Oh, Chang Hwan Choi, Choon Keun Lee, Jeong Yeol Moon, Jong Rip Kim
  • Patent number: 8835775
    Abstract: Techniques are provided for electrically connecting components on a printed circuit board (PCB), semiconductor chip package, or other electronic device. More specifically, a first component, configured to generate a differential signal, is disposed on the PCB, while a second component, configured to receive the differential signal from the first component, is also disposed on the PCB. A differential conductor pair comprising first and second parallel conductors extends along a path between the first and second components. The path of the differential conductor pair comprises at least one turn that causes a change in direction of the first and second conductors. The first conductor comprises at least one localized skew compensation bend disposed at the turn such that, at the end of the turn, the first and second conductors have substantially the same length with respect to the first component.
    Type: Grant
    Filed: November 15, 2011
    Date of Patent: September 16, 2014
    Assignee: Cisco Technology, Inc.
    Inventors: Hongmei Fan, Xiaoxia Zhou, Alpesh U. Bhobe, Jinghan Yu, Hailong Zhang, Phillipe Sochoux
  • Publication number: 20140254118
    Abstract: A board main body of a board has a sensor mounting area, in which a physical quantity sensor is mounted, disposed on a surface. A non-electrode forming part and a plurality of electrodes are disposed in the sensor mounting area, the electrodes being disposed so as to be isolated from each other, and to correspond to mounting terminals of the physical quantity sensor. A shield electrode is disposed outside the sensor mounting area.
    Type: Application
    Filed: February 10, 2014
    Publication date: September 11, 2014
    Applicant: Seiko Epson Corporation
    Inventor: Yoshikuni Saito
  • Publication number: 20140254120
    Abstract: Provided is a device packaging structure including: an interposer substrate including a substrate, and a plurality of through-hole interconnections formed inside a plurality of through-holes passing through the substrate from a first main surface toward a second main surface, the first main surface being one main surface of the substrate, the second main surface being the other main surface thereof; a first device which includes a plurality of electrodes and is arranged so that these electrodes face the first main surface; and a second device which includes a plurality of electrodes of which an arrangement is different from an arrangement of each of the electrodes of the first device, and is arranged so that these electrodes face the second main surface.
    Type: Application
    Filed: May 20, 2014
    Publication date: September 11, 2014
    Applicant: FUJIKURA LTD.
    Inventors: Satoshi YAMAMOTO, Hiroyuki HIRANO, Takanao SUZUKI
  • Publication number: 20140254117
    Abstract: An anisotropic conductive film includes an insulating adhesive resin layer, and a plurality of conductive particles located at the insulating adhesive resin layer and comprising acutely angled edges.
    Type: Application
    Filed: July 3, 2013
    Publication date: September 11, 2014
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Moon-Seok Roh, Sang-Urn Lim
  • Patent number: 8830689
    Abstract: Disclosed herein is an interposer-embedded printed circuit board, including: a substrate including a cavity formed in one side thereof and having a predetermined height in a thickness direction of the substrate; an interposer disposed in the cavity and including a wiring region and an insulating region; and a circuit layer formed in the substrate and including a connection pattern connected with one side of the wiring region. The interposer-embedded printed circuit board is advantageous in that an interposer is embedded in a substrate, so that the thickness of a semiconductor package can be reduced, thereby keeping up with the trend of slimming the semiconductor package.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: September 9, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jin Gu Kim, Mi Jin Park, Young Ho Kim, Seung Wook Park, Hee Kon Lee, Young Do Kweon
  • Patent number: 8826528
    Abstract: Approaches for formation of a circuit via which electrically connects a first thin film metallization layer a second thin film metallization layer are described. Via formation involves the use of an anodization barrier and/or supplemental pad disposed in a via connection region prior to anodization of the first metallization layer. The material used to form the barrier is substantially impermeable to the anodization solution during anodization, and disrupts the formation of oxide between the electrically conducting layer and the barrier. The supplemental pad is non-anodizable, and is covered by the barrier to substantially prevent current flow through the pad during anodization. Following anodization, the barrier is removed. If the supplemental pad is sufficiently conductive, it can be left on the first metallization layer after removal of the barrier.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: September 9, 2014
    Assignee: 3M Innovative Properties Company
    Inventors: Steven D. Theiss, Michael A. Haase
  • Patent number: 8830690
    Abstract: Embodiments of the present invention are directed to shifting the resonant frequency in a high-frequency chip package away from an operational frequency by connecting a capacitance between an open-ended plating stub and ground. One embodiment provides a multi-layer substrate for interfacing a chip with a printed circuit board. A first outer layer provides a chip mounting location. A signal interconnect is spaced from the chip mounting location, and a signal trace extends from near the chip mounting location to the signal interconnect. A chip mounted at the chip mounting location may be connected to the signal trace by wirebonding. A plating stub extends from the signal interconnect, such as to a periphery of the substrate. A capacitor is used to capacitively couple the plating stub to a ground layer.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: September 9, 2014
    Assignee: International Business Machines Corporation
    Inventors: Bhyrav M Mutnury, Moises Cases, Nanju Na, Tae Hong Kim
  • Patent number: 8829689
    Abstract: A module substrate may include a substrate body on which a plurality of chip mounting regions having connection pads are defined. Repair structures may be respectively formed, or placed, in the chip mounting regions. Each repair structure includes conductive layer patterns formed over the connection pads in each chip mounting region, an insulation layer pattern formed over the substrate body in each chip mounting region in such a way as to expose the conductive layer patterns, plastic conductive members formed between the connection pads and the conductive layer patterns, and a plastic insulation member formed between the substrate body and the insulation layer pattern in each chip mounting region.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: September 9, 2014
    Assignee: SK Hynix Inc.
    Inventors: Ki Young Kim, Sung Ho Hyun, Myung Gun Park, Jin Ho Bae
  • Patent number: 8829508
    Abstract: A display apparatus including an organic light emitting display including a terminal portion, a battery disposed on a surface of the organic light emitting display, and a flexible printed circuit board (PCB) bent to cover the organic light emitting display and the battery, a side of the flexible PCB being connected to the terminal portion and another side of the flexible PCB extending outside and attached to the battery.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: September 9, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Jin-Hee Park
  • Patent number: 8830692
    Abstract: A printed circuit board according to one example embodiment includes a Z-directed component mounted in a mounting hole in the printed circuit board. The Z-directed component includes a body having a top surface, a bottom surface and a side surface. Four conductive channels extend through a portion of the body along the length of the body. The four conductive channels are spaced substantially equally around a perimeter of the body. An integrated circuit is mounted on a surface of the printed circuit board. The integrated circuit has a ball grid array that includes four conductive balls electrically connected to a corresponding one of the four conductive channels of the Z-directed component.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: September 9, 2014
    Assignee: Lexmark International, Inc.
    Inventor: Keith Bryan Hardin
  • Patent number: 8829870
    Abstract: A voltage conversion apparatus is disclosed in which a current passes through first and second loop circuits alternately in accordance with ON/OFF operation of a first switching element provided in the first circuit. The direction of a magnetic field through the first loop circuit formed at the ON operation is the same as a direction of a magnetic field through the second loop circuit formed at the OFF operation. The first loop circuit and the second loop circuit are provided on opposite sides of a printed circuit board, respectively, in such a manner that the first loop circuit and the second loop circuit are opposed to each other. A heat sink is provided on a surface of the printed circuit board. A solid pattern of a metal material is provided on an inner layer of the printed circuit board to be connected to the heat sink via a through hole.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: September 9, 2014
    Assignees: Toyota Jidosha Kabushiki Kaisha, Visteon Global Technologies, Inc.
    Inventors: Koichi Mizutani, Takayuki Naito, Kouichi Yamanoue, Shigeki Yamamoto
  • Publication number: 20140247535
    Abstract: A high power, low passive inter-modulation capacitor is presented, which is formed using metal clad substrates, which are broad-side coupled through a thin air gap. Each substrate may include metal layers affixed on both sides which are electrical coupled together to form a single capacitor plate, or each substrate may have only a single metal layer on the surface adjacent to the air gap. The capacitor has particular application in low cost RF and microwave filters, which may be used in communication equipment and communication test equipment such a diplexers, for low PIM applications.
    Type: Application
    Filed: May 16, 2014
    Publication date: September 4, 2014
    Applicant: K&L Microwave, Inc.
    Inventor: Rafi Hershtig
  • Publication number: 20140247570
    Abstract: A circuit board structure having electronic components embedded therein and a method of fabricating the same are provided. The circuit board structure includes a substrate having a first circuit layer formed on at least one surface thereof, electronic components electrically connected to the first circuit through a metallic connector, a first dielectric layer formed on the first circuit layer of the substrate and having a plurality of dielectric layer cavities for the first circuit layer to be exposed therefrom and the electronic components to be received therein, a plurality of vias, a second dielectric layer formed on the first dielectric layer and the electronic components and having a plurality of dielectric layer vias for the electronic components to be exposed therefrom and the vias to be formed therein, and a second circuit layer formed on the second dielectric layer and electrically connected to the electronic components through the vias.
    Type: Application
    Filed: June 7, 2013
    Publication date: September 4, 2014
    Inventors: Doau-Tzu Wang, Chih-Jung Chen
  • Patent number: 8824159
    Abstract: A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 ?m in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: September 2, 2014
    Inventor: Glenn J. Leedy
  • Patent number: 8824160
    Abstract: A cover glass structure includes a glass substrate, a touch-sensing structure and a decorative layer. The glass substrate has at least one cutting section, and the cutting section is polished to form a polished surface. The touch-sensing structure is disposed on the glass substrate, and the decorative layer is disposed on the glass substrate.
    Type: Grant
    Filed: December 1, 2011
    Date of Patent: September 2, 2014
    Assignees: Wintek Technology (H.K.) Ltd., Wintek Corporation
    Inventors: Chia-Huang Lee, Ming-Kung Wu, Heng Chia Kuo
  • Publication number: 20140240936
    Abstract: There is provided an electronic device. The electronic device includes: a wiring board; a first electronic component mounted on the wiring board and configured to emit an electromagnetic wave having a first frequency band; a second electronic component mounted on the wiring board and configured to emit an electromagnetic wave having a second frequency band; a first magnetic thin film covering the wiring board, the first electronic component and the second electronic component, wherein the first magnetic thin film has a composition corresponding to the first frequency band; and a second magnetic thin film covering the first magnetic thin film, wherein the second magnetic thin film has a composition corresponding to the second frequency band.
    Type: Application
    Filed: February 26, 2014
    Publication date: August 28, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Tomoki KOBAYASHI
  • Publication number: 20140240944
    Abstract: A microelectronic circuit having at least one component adjacent a carrier which is not a semiconductor or sapphire.
    Type: Application
    Filed: February 25, 2013
    Publication date: August 28, 2014
    Applicant: ANALOG DEVICES TECHNOLOGY
    Inventors: Bernard P. Stenson, Michael Morrissey, Seamus A. Lynch
  • Publication number: 20140240927
    Abstract: The invention relates to an electronic module comprising at least one electronic or electric component (3), a base plate (4), and a support plate (2), in particular a printed circuit board or a substrate. Said support plate (2) is arranged on the base plate (4) and comprises conductor paths. Said base plate (4) comprises a blind hole-type recess (5) on a side oriented towards the support plate (2). The component (3) is in contact on the support plate (2) and is arranged in the recess (5) of the base plate (4).
    Type: Application
    Filed: February 29, 2012
    Publication date: August 28, 2014
    Applicant: ROBERT BOSCH GMBH
    Inventors: Holger Braun, Helmut Bubeck, Matthias Lausmann, Ralf Schinzel, Klaus Voigtlaender, Thomas Mueller, Benjamin Bertsch
  • Patent number: 8817486
    Abstract: A semiconductor device having a printed circuit board and a semiconductor chip. The printed circuit board includes a chip region, a plurality of first ball lands adjacent to the chip region, and at least one second ball land adjacent to the first ball lands. The semiconductor chip is mounted on the chip region. The first ball lands are arranged to have a first pitch. One of the first ball lands which is nearest to the second ball land, and the second ball land have a second pitch greater than the first pitch.
    Type: Grant
    Filed: February 14, 2013
    Date of Patent: August 26, 2014
    Assignee: SAMSUNG Electronics Co., Ltd.
    Inventors: Tong-Suk Kim, Heung-Kyu Kwon, Jeong-Oh Ha, Hyun-A Kim
  • Publication number: 20140233198
    Abstract: Provided is a video and audio reproduction apparatus including a display unit; a speaker unit; a main board; and a power supply unit, and the main board includes a printed circuit board; a first connector area which is formed on a front side of the printed circuit board; a second connector area which is formed on the front side of the printed circuit board; and a main chip which is surface-mounted on a back side of the printed circuit board.
    Type: Application
    Filed: April 28, 2014
    Publication date: August 21, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Soo KIM, Jong-hee HAN, Il-ki MIN
  • Publication number: 20140233189
    Abstract: A circuit board assembly includes metal plates to be used as conducting medium, an encapsulation enclosing therein the metal plates and provided with holes defined in the encapsulation to allow extension of the metal plates out of the encapsulation for electrical connection and electronic components securely mounted on the encapsulation and electrically connected to the metal plates to form a closed loop.
    Type: Application
    Filed: April 23, 2013
    Publication date: August 21, 2014
    Applicant: King Shing Industrial Co., Ltd
    Inventor: Chun-Chin SHIN
  • Patent number: 8811027
    Abstract: A DC-DC converter includes an insulating substrate with an inductor provided on the top surface thereof, a switching control IC provided therein, and a ground electrode pattern provided on the bottom surface thereof. The ground electrode pattern includes a first pattern and a second pattern separated from each other and a bridge pattern that connects the first and second patterns to each other. A capacitor and the switching control IC is connected to each of the first and second patterns. The bridge pattern faces the inductor and has a smaller width than that of the first and second patterns.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: August 19, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Noboru Kato
  • Publication number: 20140225255
    Abstract: An electrical interconnect including a first circuitry layer with a first surface and a second surface. A first liquid dielectric layer is imaged directly on the first surface of the first circuitry layer to form a first dielectric layer with a plurality of first recesses. Conductive plating substantially fills a plurality of the first recesses to create a plurality of first solid copper conductive pillars electrically coupled to, and extending generally perpendicular to, the first circuitry layer. A second liquid dielectric layer is imaged directly on the first dielectric layer to form a second dielectric layer with a plurality of second recesses. Conductive plating substantially fills a plurality of the second recesses to form a plurality of second solid copper conductive pillars electrically coupled to, and extending parallel with, the first conductive pillars. An IC device is electrically coupled to a plurality of the second conductive pillars.
    Type: Application
    Filed: April 17, 2014
    Publication date: August 14, 2014
    Applicant: HSIO TECHNOLOGIES, LLC
    Inventor: JIM RATHBURN
  • Patent number: 8804360
    Abstract: System-in packages, or multichip modules, are described which can include multi-layer chips and multi-layer dummy substrates over a carrier, multiple through vias blindly or completely through the multi-layer chips and completely through the multi-layer dummy substrates, multiple metal plugs in the through vias, and multiple metal interconnects, connected to the metal plugs, between the multi-layer chips. The multi-layer chips can be connected to each other or to an external circuit or structure, such as mother board, ball grid array (BGA) substrate, printed circuit board, metal substrate, glass substrate, or ceramic substrate, through the metal plugs and the metal interconnects.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: August 12, 2014
    Assignee: Megit Acquisition Corp.
    Inventors: Mou-Shiung Lin, Jin-Yuan Lee
  • Patent number: 8804358
    Abstract: A method for electrically interconnecting two substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: August 12, 2014
    Assignee: Hypres Inc.
    Inventor: Vladimir V. Dotsenko
  • Patent number: 8804339
    Abstract: A power electronics assembly includes a semiconductor device, an insulated metal substrate, and a cooling structure. The insulated metal substrate includes a dielectric layer positioned between first and second metal layers, and a plurality of stress-relief through-features extending through the first metal layer, the second metal layer, the dielectric layer, or combinations thereof. The semiconductor device is thermally coupled to the first metal layer and the plurality of stress relief through-features is positioned around the semiconductor device. The cooling structure is bonded directly to the second metal layer of the insulated metal substrate. Insulated metal substrate assemblies are also disclosed. The insulated metal substrate includes a plurality of stress-relief through-features extending through a first metal layer, a second metal layer, and a dielectric layer. Vehicles having power electronics assemblies with stress-relief through-features are also disclosed.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: August 12, 2014
    Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventor: Brian Joseph Robert
  • Patent number: 8804357
    Abstract: A sliding-type portable electronic apparatus includes a pair of casings slidably coupled to each other, a flexible lead derived from one of the casings, is passed through an opening provided in the other casing and is connected to a circuit board incorporated in this other casing, and a waterproof sheet adapted to close the opening. The flexible lead passed through the opening is extended along a front surface of the circuit board and, thereafter, is folded back from the front surface toward a rear surface at a position on a side end surface of the circuit board, the flexible lead is connected, at its tip end portion, to the circuit board, on the rear surface, and the waterproof sheet is adhered, at its peripheral edge portions, to the flexible lead and to an inner surface of the other casing, at positions on a periphery of the opening.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: August 12, 2014
    Assignee: KYOCERA Corporation
    Inventors: Kengo Suzuki, Norikazu Morioka
  • Patent number: 8802475
    Abstract: A method of fabricating a microelectronic device structure including increased thermal dissipation capabilities. The structure including a three-dimensional (3D) integrated chip assembly that is flip chip bonded to a substrate. The chip assembly including a device substrate including an active device disposed thereon. A cap layer is physically bonded to the device substrate to at least partially define a hermetic seal about the active device. The microelectronic device structure provides a plurality of heat dissipation paths therethrough to dissipate heat generated therein.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: August 12, 2014
    Assignee: General Electric Company
    Inventors: Kaustubh Ravindra Nagarkar, Christopher Fred Keimel
  • Patent number: 8804361
    Abstract: A wiring substrate includes an electronic component and a core substrate. A through hole extends through the core substrate and accommodates the electronic component, which includes a main body and connection terminals. The main body includes opposing first side surfaces, opposing second side surfaces, and opposing third side surfaces. The connection terminals cover the first side surfaces. First projections project from walls of the through hole toward the first side surfaces. Each first projection includes a distal end that contacts one of the connection terminals. Second projections project from walls of the through hole toward the second side surfaces. The opposing second projections include distal ends spaced apart by a distance longer than the distance between the second side surfaces and shorter than the distance between two farthest points on a periphery of each first side surface.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: August 12, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Takemi Machida, Daisuke Takizawa
  • Patent number: 8804359
    Abstract: A device for mounting a riser card includes a base board forming two rods, a motherboard forming an expansion slot to connect the riser card, and a fixing member having two legs at opposite ends. The rods extend through the motherboard and are positioned at opposite ends of the expansion slot. Each rod contains a resilient member inside, and a ball mounted to the resilient member and partly extending out of the rod. The riser card is fixed to the fixing member. Each leg defines a cylindrical hole fitted about one of the rods. The balls partly extend out of the corresponding rods and block tops of the corresponding legs.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: August 12, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Wei Pang, Al-Ling He, Jun-Hui Wang