Connection Of Components To Board Patents (Class 361/760)
  • Patent number: 9036359
    Abstract: A component built-in module of the present invention includes: a flexible substrate that includes a first surface and a second surface on an opposite side of the first surface, the first surface including a concave part recessed in a direction from the first surface toward the second surface; a plurality of electronic components that are mounted on the first surface, mounting heights of the electronic components from the first surface to respective upper surfaces of the electronic components differing from each other; and a resin that seals the first surface. Among the plurality of electronic components, at least an electronic component having a highest mounting height is mounted in the concave part.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: May 19, 2015
    Assignee: LEONOVO INNOVATIONS LIMITED (HONG KONG)
    Inventors: Nozomu Nishimura, Nobuhiro Mikami
  • Patent number: 9035196
    Abstract: Disclosed herein is a circuit board including: a core layer including a via hole; a metal film covering an inner wall of the via hole; a circuit pattern connected to the metal film on the core layer; and a plug surrounded by the metal film in the via hole and having a thickness thinner than a thickness of the core layer.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 19, 2015
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Wook Park, Jae Kul Lee, Jin Gu Kim, Chang Bae Lee
  • Patent number: 9035194
    Abstract: Embodiments of the present disclosure are directed towards a circuit board having integrated passive devices such as inductors, capacitors, resistors and associated techniques and configurations. In one embodiment, an apparatus includes a circuit board having a first surface and a second surface opposite to the first surface and a passive device integral to the circuit board, the passive device having an input terminal configured to couple with electrical power of a die, an output terminal electrically coupled with the input terminal, and electrical routing features disposed between the first surface and the second surface of the circuit board and coupled with the input terminal and the output terminal to route the electrical power between the input terminal and the output terminal, wherein the input terminal includes a surface configured to receive a solder ball connection of a package assembly including the die. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: May 19, 2015
    Assignee: Intel Corporation
    Inventors: M D Altaf Hossain, Jin Zhao, John T. Vu
  • Patent number: 9036366
    Abstract: The terminal unit includes a main board, electronic components implemented on the main board, a sub-board covering above the electronic components and a frame member so disposed between the main board and the sub-board as to surround the electronic components. A flexible printed circuit covers an outer side of a wall portion of the frame member and is so wound around the frame member from upper and lower sides of the wall portion as to cover at least part of an inner side of the wall portion. A wiring pattern formed on the flexible printed circuit is electrically connected to the electronic components, and information to be protected that is stored on the electronic components becomes unreadable if the wiring pattern is cut off or short-circuited.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: May 19, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shunjiro Takemori, Shigeru Narakino
  • Patent number: 9036356
    Abstract: A printed circuit board laminate is provided of a novel structure that is not only capable of enhancing a degree of freedom in design and achieving a further size reduction, but also capable of enhancing heat releasing performance in a space sandwiched in between two printed circuit boards. A lattice-like portion formed of a plurality of connection walls crossed with one another is provided to an insulating plate interposed between two printed circuit boards, and the connection walls are positioned with clearances from the two printed circuit boards, respectively, by a plurality of supporting ribs protruding from the connection walls toward at least one of the two printed circuit boards.
    Type: Grant
    Filed: October 15, 2012
    Date of Patent: May 19, 2015
    Assignee: SUMITOMO WIRING SYSTEMS, LTD.
    Inventors: Akira Baba, Tatsuya Oka
  • Patent number: 9036357
    Abstract: A method of manufacturing a display device includes preparing a display panel that has a display region where an image is displayed and a non-display region adjacent to the display region, and disposing a power supply flexible printed circuit board (FPCB) in a lower surface of the display panel and in the non-display region of an upper surface of the display panel. The method includes disposing a tape on the display panel to cover an upper side of the power supply FPCB disposed on the upper surface of the display panel, and attaching the tape to the display panel by performing a thermal hardening process on the tape to fix the power supply FPCB to the display panel.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: May 19, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Min-Cheol Kim
  • Publication number: 20150131246
    Abstract: A printed circuit board includes a first layer stack and a second layer stack coupled to the first layer stack. The first layer stack includes a first electrically-insulating layer, a first electrically-conductive layer, and a cut-out area defining a void that extends therethrough. The first electrically-insulating layer includes a first surface and an opposite second surface. The first electrically-conductive layer is disposed on the first surface of the first electrically-insulating layer. The second layer stack includes a second electrically-insulating layer. The second electrically-insulating layer includes a first surface and an opposite second surface. One or more electrically-conductive traces are disposed on the first surface of the second electrically-insulating layer. The printed circuit board further includes a device at least partially disposed within the cut-out area.
    Type: Application
    Filed: January 23, 2015
    Publication date: May 14, 2015
    Inventors: WAYNE L. MOUL, ROBERT J. BEHNKE, II, SCOTT E.M. FRUSHOUR, JEFFREY L. JENSEN
  • Publication number: 20150131243
    Abstract: An electronic device includes a circuit board, a connector and a noise suppression assembly. The circuit board includes a substrate having a surface layer. The connector is disposed on the circuit board and has at least one electrical pin. The noise suppression assembly includes a wiring area located on the surface layer and adjacent to the connector and a conductive cover member. The wiring area includes at least one electrical contact, a transmission circuit and at least one ground contact, the electrical contact is used for being in electrical contact with the electrical pin of the connector. The transmission circuit is electrically connected to the electrical contact. The ground contact is located around the wiring area. The conductive cover member has a cover plate and at least one lateral plate. The lateral plate is connected to the cover plate for forming a shielded space.
    Type: Application
    Filed: April 8, 2014
    Publication date: May 14, 2015
    Applicant: Wistron Corp.
    Inventors: Chien-Ju CHEN, Po-Hsien CHU, Chun-Hsiang LEI, Yuan-Cheng SUN
  • Publication number: 20150131244
    Abstract: The electrical device (2, 202) according to the invention comprises a first electrical component (4) and a second electrical component (6) connected to each other via an electrical connection means (26) having an electrically insulating support plate (24), and a weld joint (22) deposited on the support plate (24). The weld joint (22) has a melting temperature (TO significantly lower than an ambient operating temperature (Ta) to which at least one of the two electrical components and the electrical connection means (26) are provided to be subjected. The electrical device (2) comprises a cement (28) that completely covers the exposed weld joint (22), the material of the cement (28) being chosen to maintain its adhesion and its tightness with respect to the weld joint (22) when the ambient operating temperature (Ta) is applied.
    Type: Application
    Filed: April 3, 2013
    Publication date: May 14, 2015
    Inventors: Sylvain Ballandras, Bruno Francois
  • Publication number: 20150131245
    Abstract: Connector inserts and other structures that have a high signal integrity and low insertion loss, are reliable, and are readily manufactured. One example may provide a connector insert formed primarily using a printed circuit board. Contacts on the connector insert may be akin to contacts on a printed circuit board and they may connect to traces having matched impedances on the printed circuit board in order to improve signal integrity and reduce insertion loss. The printed circuit board may be manufactured in a manner for increased reliability. Plating, solder block, and other manufacturing steps that are native to printed circuit board manufacturing may be employed to improve manufacturability. Specialized tools that may provide a chamfered edge on the connector inserts may be employed.
    Type: Application
    Filed: August 22, 2014
    Publication date: May 14, 2015
    Applicant: APPLE INC.
    Inventors: Mahmoud R. Amini, Zheng Gao, Dennis R. Pyper
  • Patent number: 9030839
    Abstract: The present application describes various embodiments of systems and methods for providing internal and external components for portable computing devices having a thin profile. More particularly, the present application describes internal components configured to fit within a relatively thin outer enclosure, wherein the internal components comprise at least one external interface, such as, for example, a track pad interface.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: May 12, 2015
    Assignee: Apple Inc.
    Inventors: William F. Leggett, David M. Rockford, Gavin J. Reid, Matthew P. Casebolt, Changsoo Jang
  • Patent number: 9030836
    Abstract: An apparatus capable of selectively applying different types of connectors to a substrate is disclosed. The memory apparatus includes a substrate having a controller. First and second connector pads may be arranged on edges of top and bottom surfaces of the substrate. A via hole may be arranged between the controller and the first and second connector pads. A first passive device pad may be arranged between the via hole and the first connector pads. A second passive device pad may be arranged between the via hole and the second connector pads. A passive device may be coupled to only one of the first passive device pad or the second passive device pad.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: May 12, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-soo Park, Kyung-suk Kim
  • Patent number: 9025339
    Abstract: On a circuit substrate on which an adhesive is used to couple electronic or structural components to the substrate, an adhesive dam is positioned to prevent the adhesive from interfering with the operation of the circuit. A contact pad can be provided at a selected location and with a selected shape, and solder deposited on the pad, then reflowed to form the dam. The dam can be a structure soldered to a contact pad, or the dam can be supported at its ends by another structure of the device, so that, at the location where it functions to contain the adhesive, it is not attached to the substrate.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: May 5, 2015
    Assignee: STMicroelectronics Pte Ltd.
    Inventors: Jing-En Luan, Hk Looi
  • Publication number: 20150116961
    Abstract: A circuit includes a structure for inhibiting dendrite formation. The circuit includes a first electrode disposed within a first area of the circuit, wherein the first electrode is configured to be coupled to an ionic source that forms ions when a first electric potential is applied to the first electrode. The circuit also includes a second electrode disposed within a second area of the circuit. The second electrode is configured to receive a second electric potential that is less than the first electric potential and that causes the ions to migrate toward the second electrode to contribute to dendrite formation. The circuit further includes a structure disposed within a third area of the circuit. The structure is configured to receive a third electric potential to create a barrier that inhibits the migration of at least some of the ions from the first to the second electrode to inhibit dendrite formation.
    Type: Application
    Filed: October 30, 2013
    Publication date: April 30, 2015
    Inventor: Lakshminarayan Viswanathan
  • Publication number: 20150116962
    Abstract: An electronic device includes an electronic component including a plurality of terminals and a circuit board on which the electronic component is mounted. The circuit board includes a board body, a plurality of electrode pads arranged on the board body, each of the electrode pads being connected to each of the terminals by solder, a first solder resist formed on the board body and having a plurality of first openings, each of the first openings accommodating each of the electrode pads, and a second solder resist formed on the first solder resist and having a plurality of second openings, each of the second openings being larger than each of the first openings and communicating with each of the first openings.
    Type: Application
    Filed: December 31, 2014
    Publication date: April 30, 2015
    Inventors: Yoshiyuki HIROSHIMA, Akiko MATSUI, Mitsuhiko SUGANE, Takahide MUKOYAMA, Tetsuro YAMADA, Takahiro OOI
  • Patent number: 9019714
    Abstract: The present invention provides a circuit component that enables satisfactory connection between a substrate and an IC chip and a method of making the same. The circuit component includes an IC chip and a substrate connected to each other using an electrically conductive adhesive containing electrically conductive particles. Bump electrodes and a non-electrode surface are provided on a mounting surface of the IC chip. The non-electrode surface is a portion of the mounting surface other than a portion where the bump electrodes are formed. Electrically conductive particles are placed in a first state between the surfaces of the substrate and the non-electrode surface so as to be in contact with both surfaces. Electrically conductive particles are placed in a second state between the surfaces of both the substrate and the bump electrodes, so as to be more flattened than the first state and dig into the bump electrodes.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: April 28, 2015
    Assignee: Hitachi Chemical Company, Ltd.
    Inventor: Kazuya Sato
  • Patent number: 9019715
    Abstract: A touch panel includes a substrate, a transparent sensor electrode pattern, a patterned compensation electrode, a passivation layer, a transparent shielding electrode and at least one connection structure. The substrate has a surface and includes a sensor region and a peripheral region. The transparent sensor electrode pattern is disposed on the surface of the substrate and in the sensor region. The patterned compensation electrode is disposed on the surface of the substrate and in the peripheral region, and the patterned compensation electrode and the transparent sensor electrode pattern are electrically isolated. The passivation layer is disposed on the surface of the substrate, covers the transparent sensor electrode pattern, and at least partially exposes the patterned compensation electrode. The transparent shielding electrode is disposed on the passivation layer.
    Type: Grant
    Filed: February 24, 2013
    Date of Patent: April 28, 2015
    Assignee: AU Optronics Corp.
    Inventors: Chia-Chun Yeh, Po-Yuan Liu, Wen-Chi Chuang, Pei-Jung Wu, Cheng-Ta Ho
  • Patent number: 9018537
    Abstract: A surface-mountable electronic device free of leads has a plurality of solderable connection surfaces at its lower side, with at least one of the connection surfaces having a rectangular portion. The outline of this rectangular portion corresponds to a connection surface of the JEDEC Standard MO-236 or of any other standard according to which the respective connection surface should not extend directly up to a side edge of the lower device side. The at least one connection surface furthermore has an extension section which extends, starting from the rectangular portion, in the direction of a side edge of the lower side of the device.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: April 28, 2015
    Assignee: Vishay Semiconductor GmbH
    Inventor: Heinrich Karrer
  • Patent number: 9013891
    Abstract: An electronics package includes one or more insulating layers and an electrically conductive transmission line. The electrically conductive transmission line includes a signal trace disposed substantially parallel to the one or more insulating layers. The electrically conductive transmission line further includes one or more signal vias electrically coupled to the signal trace. The one or more signal vias are configured to pass through at least a portion of the one or more insulating layers. The electronics package further includes one or more electrically conductive ground planes substantially parallel to the one or more insulating layers. The ground planes include one or more signal via ground cuts. The one or more signal via ground cuts provide clearance between the one or more signal vias and the one or more ground planes.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: April 21, 2015
    Assignee: Finisar Corporation
    Inventors: Yunpeng Song, Yongsheng Liu, Hongyu Deng
  • Patent number: 9013890
    Abstract: In one embodiment, a semiconductor package includes an isolating container having a recess, which forms an inner membrane portion and an outer rim portion. The rim portion is thicker than the membrane portion. The package includes a semiconductor chip disposed in the recess and a backplane disposed under the membrane portion of the isolating container.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: April 21, 2015
    Assignee: Infineon Technologies AG
    Inventors: Udo Ausserlechner, Carsten von Koblinski, Sigrid Wabnig, Volker Strutz, Robert Grünberger
  • Patent number: 9013894
    Abstract: A printed circuit board includes: a substrate; a land that is disposed on a surface of the substrate, and includes a central portion and a plurality of extended portions, the central portion having the same shape and the same size as a land of a surface mount device, and the extended portions being up-and-down symmetry and right-and-left symmetry with respect to a straight line which passes through the center of the central portion; gaps that are disposed on the surface of the substrate, each of the gaps being disposed on a periphery of the central portion and between the extended portions; and a resist that is disposed on the surface of the substrate, and has an opening portion formed at a position corresponding to the central portion and the gaps.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: April 21, 2015
    Assignee: Fujitsu Component Limited
    Inventor: Shinya Yamamoto
  • Patent number: 9013892
    Abstract: A chip stacking structure including a plurality of microbump structures, a plurality of first substrates, at least one first space layer, a plurality of second substrates and at least one second space layer is provided. The first substrates are stacked upon each other by a portion of the microbump structures, and each of the first substrates includes at least one first redistribution layer. The first space layer is located between the stacked first substrates. The second substrates are stacked on at least one of the first substrates by another portion of the microbump structures, and each of the second substrates includes at least one second redistribution layer. The second space layer is located between the stacked first and second substrates. The first redistribution layers, the second redistribution layers and the microbump structures form a plurality of impedance elements, and the impedance elements provide a specific oscillation frequency.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: April 21, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Chang-Chih Liu, Hsun Yu, Peng-Shu Chen, Shih-Hsien Wu
  • Patent number: 9012787
    Abstract: An electronic board includes conducting traces having an upper surface at least partially sunken with respect to a gluing surface of the board. A surface mount technology electronic device for mounting to the board includes insulating windows that define gluing sites within one or more pins. An electronic system is formed by one or more of such surface mount technology electronic devices mounted to electronic board. The devices are attached using a wave soldering technique that flows through channels formed by the sunken conductive traces.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: April 21, 2015
    Assignee: STMicroelectronics S.r.l.
    Inventors: Cristiano Gianluca Stella, Rosalba Cacciola
  • Publication number: 20150103504
    Abstract: An electronic device comprising a substrate having a component-side surface and a moisture protection film covering the component-side surface. The moisture protection film includes a first water layer bonded to component-side surface that is an activated surface, wherein the activated surface has a lower water contact angle than the substrate surface before the surface activation. The film includes a first graphed layer of a plasma-reacted first set of precursor molecules graphed to the first water layer, wherein the first water layer forms a first bonding link between the substrate surface and the reacted first set precursor molecules. The film includes a second water layer bonded to the first graphed layer. The film includes a second graphed layer of a plasma-reacted second set of precursor molecules graphed to the second water layer, wherein the second water layer forms a second bonding link between the second water layer and the reacted second set of precursor molecules.
    Type: Application
    Filed: December 22, 2014
    Publication date: April 16, 2015
    Inventors: Edward Maxwell Yokley, Yaw Samuel Obeng
  • Patent number: 9000306
    Abstract: An electronic apparatus (100) has an electronic device (151), a power supply plane (121) and a power supply plane (122) disposed with a gap (123) therebetween, a connection member (152) that electrically connects the power supply plane (122) and the electronic device (151), a ground plane (141) facing the power supply plane (121) or the power supply plane (122), a connection member (153) that electrically connects the ground plane (141) and the electronic device (151), a plurality of conductor elements (131) that is repeatedly arrayed, and open stubs (111) formed at a location overlapping the gap (123) included in an area surrounded by the conductor elements (131). In addition, at least some of the open stubs (111) face the power supply plane (122) which is not in contact with the open stubs (111).
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: April 7, 2015
    Assignee: NEC Corporation
    Inventors: Hiroshi Toyao, Manabu Kusumoto, Naoki Kobayashi, Noriaki Ando
  • Patent number: 9001518
    Abstract: According to an exemplary embodiment, a bondwireless power module residing on a top surface of a substrate includes at least one input power pad providing power to the module and at least one output current pad providing output current from the module. At least one press-fit input power clamp engages a top side of the at least one input power pad, and engages a bottom surface of the substrate. Also, at least one press-fit output current clamp engages a top side of the at least one output current pad, and engages the bottom surface of the substrate. The at least one press-fit input power clamp can include at least one top prong and at least one bottom prong. Furthermore, the at least one bottom prong can press the input power pad into the at least one top prong.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: April 7, 2015
    Assignee: International Rectifier Corporation
    Inventor: Henning M. Hauenstein
  • Patent number: 9001522
    Abstract: Electronic devices may be provided with printed circuits to which integrated circuits and other electrical components may be mounted. A first printed circuit may have a first surface with an array of contact pads arranged in rows and columns. Each column of contact pads may have a series of contact pads separated by gaps. The contact pads in each column may be staggered with respect to the contact pads in adjacent columns such that each contact pad in a given column is horizontally adjacent to associated gaps in the adjacent columns. A component may be mounted to an opposing surface of the printed circuit such that it overlaps one of the gaps between the staggered contact pads. By mounting the component to portions of the first printed circuit that do not overlap the staggered contact pads, the risk of damaging the electrical component during solder reflow operations may be minimized.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: April 7, 2015
    Assignee: Apple Inc.
    Inventors: Wyeman Chen, Michael Nikkhoo, Amir Salehi
  • Patent number: 9001519
    Abstract: A protective circuit module and a battery pack having the same are disclosed. In one embodiment, the protective circuit module includes a printed circuit board, an electronic device mounted on a first surface of the printed circuit board, and a pattern part mounted on a second surface opposite to the first surface of the printed circuit board. The electronic device comprises an integrated circuit chip, and one or more electronic components electrically connected to the integrated circuit chip and at least one of the one or more electronic components is electrically connected to the pattern part.
    Type: Grant
    Filed: October 24, 2012
    Date of Patent: April 7, 2015
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Kwangsig Jung, Doosun Hwang, Jaeseung Ryu
  • Patent number: 9000303
    Abstract: The invention provides a method for preparing a pattern for an electric circuit comprising the steps of: (a) providing a substrate; (b) providing a pattern of an inhibiting material for an electrical circuit onto said substrate by i) applying a layer of the inhibiting material onto said substrate and mechanically removing locally the layer of the inhibiting material to obtain said pattern; or ii) applying a layer of the inhibiting material onto said substrate, wherein said layer has pre-determined pattern which incompletely covers said substrate; (c) establishing a distribution of particles of a first metal or alloy thereof on the layer of the inhibiting material and the pattern as obtained in step.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: April 7, 2015
    Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderzoek TNO
    Inventors: Roland Anthony Tacken, Renatus Marius De Zwart, Erwin Rinaldo Meinders, Maria Peter
  • Patent number: 8995146
    Abstract: An electrical or electro-optical assembly comprising a substrate comprising an insulating material, at least one conductive track present on at least one surface of the substrate, at least one electrical or electro-optical component connected to at least one of the at least one conductive track, and a continuous coating comprising one or more plasma-polymerized polymers completely covering the at least one surface of the substrate, the at least one conductive track and the at least one electrical or electro-optical component.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: March 31, 2015
    Assignee: Semblant Limited
    Inventors: Andrew Simon Hall Brooks, Timothy Allan Von Werne
  • Patent number: 8995142
    Abstract: Provided is a power module invented for easy manufacturing and fatigue reduction at a soldered portion, and a method for manufacturing the same. The power module according to the present invention comprises a substrate where electronic parts are mounted by soldering, and a mold case housing the substrate and including bus bars for electrical connection with an external apparatus. The mold case comprises partition plates forming an electronic part mount area where electronic parts are mounted on the substrate, and a bonding area for bonding to the bus bars, a first resin cast to the electronic part mount area, and a second resin cast to the bonding area.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: March 31, 2015
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Masato Saito, Hiroyuki Abe
  • Patent number: 8995145
    Abstract: A circuit board unit includes a printed circuit board and a terminal block mounted on the printed circuit board and connecting a power module and an electrical wire together. The terminal block includes a terminal connection part to be directly connected to the power module, and a wire connection part to be connected to the electrical wire. In the printed circuit board, a hole having an orthographic projection area larger than that of the terminal connection part as viewed in plane is formed. The terminal connection part is positioned below or above the hole of the printed circuit board.
    Type: Grant
    Filed: October 28, 2010
    Date of Patent: March 31, 2015
    Assignee: Daikin Industries, Ltd.
    Inventors: Sumio Kagimura, Hiroshi Doumae
  • Patent number: 8995141
    Abstract: An electronic device includes a first component electrically coupled to a second component. The first component and the second component are coupled by the base of a spring loaded connector.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: March 31, 2015
    Assignee: Amazon Technologies, Inc.
    Inventors: Nidhi Rathi, Edward A. Lilgegren
  • Patent number: 8995137
    Abstract: A modular mass storage system and method that enables cableless mounting of ATA and/or similar high speed interface-based mass storage devices in a computer system. The system includes a printed circuit board, a system expansion slot interface on the printed circuit board and comprising power and data pins, a host bus controller on the printed circuit board and electrically connected to the system expansion slot interface, docking connectors connected with the host bus controller to receive power and exchange data therewith and adapted to electrically couple with industry-standard non-volatile memory devices without cabling therebetween, and features on the printed circuit board for securing the memory devices thereto once coupled to the docking connectors.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: March 31, 2015
    Assignee: OCZ Storage Solutions Inc.
    Inventor: Franz Michael Schuette
  • Patent number: 8995144
    Abstract: Embodiments of the present disclosure provide an assembly comprising circuitry of a wireless module disposed on a first region of a circuit board, and circuitry of a host controller module disposed on a second region of the circuit board. The first region is removably coupled to the second region.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: March 31, 2015
    Assignee: Marvell International Ltd.
    Inventor: William Weiser
  • Publication number: 20150085457
    Abstract: An electrical connector for electrically connecting a first electronic element having protruding conductive portions in the bottom thereof to a second electronic element, includes an insulating body located below the first and above the second electronic element, a conductor, a solder pad disposed on the lower surface of the insulating body, and a conducting line disposed in the insulating body and conducting the conductor and the solder pad. Upper surface of the insulating body has accommodation holes. Aperture of the accommodation hole is greater than outer diameter of the conductive portion. Wall and bottom of the accommodation holes form the conductor. The accommodation hole has low-melting point liquid metal conductor. When the conductive portion enters the accommodation hole, the liquid metal adheres to the conductive portion, and forms a conductive path between the conductive portion and the conductor. A manufacturing method of the electrical connector.
    Type: Application
    Filed: December 2, 2013
    Publication date: March 26, 2015
    Applicant: LOTES CO., LTD
    Inventor: Ted Ju
  • Publication number: 20150084002
    Abstract: An apparatus, system, and/or method are described to enable optically transparent reconfigurable integrated electrical components, such as antennas and RF circuits to be integrated into an optically transparent host platform, such as glass. In one embodiment, an Ag NW film may be configured as a transparent conductor for antennas and/or as interconnects for passive circuit components, such as capacitors or resistors. Ag NW may also be used as transmission lines and/or interconnect overlays for devices. A graphene film may also be configured as active channel material for making active RF devices, such as amplifiers and switches.
    Type: Application
    Filed: December 4, 2014
    Publication date: March 26, 2015
    Applicant: HRL LABORATORIES LLC
    Inventors: Hyok J. SONG, James H. Schaffner, Jeong-Sun Moon, Kyung-Ah Son
  • Publication number: 20150085454
    Abstract: A power module is disclosed. The power module includes a first substrate, a first metal layer, at least one conductive structure and at least one power device. The first metal layer is disposed on the first substrate. The first metal layer has a first thickness d1. The first thickness d1 satisfies: 5 ?m?d1?50 ?m. The conductive structure is disposed at a position different to the first metal layer on the first substrate. The conductive structure has a second thickness d2. The second thickness d2 satisfies: d2?100 ?m. The power device is disposed on the first substrate, the first metal layer or the conductive structure. The driving electrode of the power device is electrically connected to the first metal layer. The power electrode of the power device is electrically coupled to the conductive structure.
    Type: Application
    Filed: July 14, 2014
    Publication date: March 26, 2015
    Inventors: Shou-Yu HONG, Gan-Yu ZHOU, Jian-Hong ZENG, Zhen-Qing ZHAO
  • Patent number: 8988890
    Abstract: Components may be mounted to printed circuit substrates using solder. A breakaway support tab may be detachably connected to a component and may help prevent the component from shifting or toppling over during reflow operations. The component and breakaway support tab may be formed from sheet metal. The interface that links the component to the breakaway support tab may be perforated or half sheared to allow the breakaway support tab to be easily separated from the component following reflow operations. The breakaway support tab may be fixed in place during reflow operations by mechanically coupling the breakaway support tab to a fixture or by mounting the breakaway support tab to an unused portion of a panel of printed circuit substrates. A breakaway support tab may be mechanically coupled between two components on a printed circuit substrate and may be used to maintain a distance between the components during reflow operations.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: March 24, 2015
    Assignee: Apple Inc.
    Inventors: Michael B. Wittenberg, Jared M. Kole, Sawyer I. Cohen, Shayan Malek
  • Patent number: 8988893
    Abstract: A link device for three-dimensional integrated structure may include a module having a first end face designed to be in front of a first element of the structure, and a second end face designed to be placed in front of a second element of the structure. The two end faces may be substantially parallel, and the module including a substrate having a face substantially perpendicular to the two end faces and carrying an electrically conducting pattern formed in a metallization level on top of the face and enclosed in an insulating region. The electrically conducting pattern may include a first end part emerging onto the first end face and a second end part emerging onto the second end face and connected to the first end part.
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: March 24, 2015
    Assignee: STMicroelectronics SA
    Inventors: Pierre Bar, Sylvain Joblot, Jean-Francois Carpentier
  • Patent number: 8987875
    Abstract: An assembly for packaging one or more electronic devices in die form. The assembly includes substrates on opposite sides of the assembly, with lead frames between the electronic devices and the substrates. The substrates, lead frames, and electronic devices are sintered together using silver-based sintering paste between each layer. The material and thicknesses of the substrates and lead frames are selected so stress experienced by the electronic devices caused by changes in temperature of the assembly are balanced from the center of the assembly, thereby eliminating the need for balancing stresses at a substrate level by applying substantially matching metal layers to both sides of the substrates.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: March 24, 2015
    Assignee: Delphi Technologies, Inc.
    Inventors: Carl W. Berlin, Gary L. Eesley
  • Patent number: 8988888
    Abstract: A meter device which can be mounted and removed easier than conventional meter devices. A meter device is provided with a display plate, a circuit board, a middle case which is disposed on the front surface side of the circuit board and on which the display plate is mounted, an upper case which is disposed on the front surface side of the middle case and through which the front surface can be seen, and a lower case which covers the middle case and the circuit board. A flange section which is sandwiched and held between the upper and lower cases is provided to the peripheral edge of the middle case. One of the upper case and the lower cases is provided with engagement sections, and engagement sections which engage with the engagement sections are provided to the other of cases so as to correspond to the engagement sections.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: March 24, 2015
    Assignee: Nippon Seiki Co., Ltd.
    Inventors: Satoshi Sano, Yuichiro Nakamura, Katsuhito Umezawa
  • Patent number: 8988889
    Abstract: The present invention relates to a connection wire structure of a direct light bar and a connection method thereof. The connection wire structure of the direct light bar includes a plurality of light bars and connection wires, and a circuit board. Each light bar includes a wiring board that includes a first exposed copper zone that includes a hole to serve as a circuit connection contact. The circuit board includes a second exposed copper zone that includes a hole to serve as a circuit connection contact. Each of the connection wires has two ends to each of which a copper ring is connected. The two copper rings of each of the connection wires are respectively connected to the first exposed copper zones or the second exposed copper zones corresponding thereto by coupling pieces so as to establish electrical connection. A connection method of the direct light bar is also provided.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: March 24, 2015
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Yajun Yu, Yuchun Hsiao
  • Publication number: 20150077969
    Abstract: Provided are systems and methods for a control assembly including: a first film that is in-molded that includes decorative graphics, a front surface and a rear surface; and a second film molded to the rear surface of the first film having a printed circuit that includes sensors, control circuits and interconnects and a front and rear surface.
    Type: Application
    Filed: August 12, 2014
    Publication date: March 19, 2015
    Inventor: Scott Moncrieff
  • Publication number: 20150077959
    Abstract: A proposal is made for a plug device (130) for a circuit board of a control unit for a vehicle transmission. At the same time, the circuit board has at least one contact hole. The plug device (130) has a housing (334) and at least one contact device arranged in the housing (334) for a cable (125) of a peripheral module fed into the housing (334) and at least one contact plug (332) that is electrically connected with the contact device and that protrudes at least partially from the housing (334) for producing an electrical and mechanical connection with the contact hole of the circuit board.
    Type: Application
    Filed: February 1, 2013
    Publication date: March 19, 2015
    Inventors: Josef Loibl, Herbert Wallner, Roland Friedl
  • Publication number: 20150077918
    Abstract: Stiffening is provided for an electronic package assembly having a substrate. A first electronic package, having a first function, is electromechanically fastened to a first surface of the substrate with a first array of electrically conductive interconnects, which is disposed over a central area of the substrate first surface. A second electronic package, having a second function, is fastened to the first substrate surface with a second conductive interconnect array. At least a pair of the first array conductors is electrically coupled to at least a pair of the second array conductors for data/signal exchange and at least a component of the first electronic package interacts with at least a component of the second package. A metallic stiffener ring is disposed about an outer periphery of at least the central area of the substrate.
    Type: Application
    Filed: September 19, 2013
    Publication date: March 19, 2015
    Applicant: Nvidia Corporation
    Inventors: Leilei Zhang, Ron Boja, Abraham Yee, Zuhair Bokharey
  • Publication number: 20150077940
    Abstract: An electronic circuit contains a circuit board with conducting tracks to which one or more electronic components with conducting contacts are positioned overlying portions of the conducting tracks and each such electronic component is held in place by a clamp that is in contact with the top surface of the electronic components so as to hold their conducting contacts in electrical contact with the conducting tracks of the circuit board. The clamp can include a resilient layer held between the top surface of electronic components and a rigid clamping sheet.
    Type: Application
    Filed: November 20, 2014
    Publication date: March 19, 2015
    Inventor: Carmen Rapisarda
  • Patent number: 8983399
    Abstract: Provided is an in-millimeter-wave dielectric transmission device. The in-millimeter-wave dielectric transmission device includes a semiconductor chip provided on one interposer substrate and capable of in-millimeter-wave dielectric transmission, an antenna structure connected to the semiconductor chip, two semiconductor packages including a molded resin configured to cover the semiconductor chip and the antenna structure, and a dielectric transmission path provided between the two semiconductor packages to transmit a millimeter wave signal. The semiconductor packages are mounted such that the antenna structures thereof are arranged with the dielectric transmission path interposed therebetween.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: March 17, 2015
    Assignee: Sony Corporation
    Inventors: Hirofumi Kawamura, Yasuhiro Okada
  • Patent number: 8982578
    Abstract: A system configured to protect a load within a vehicle includes a plug subassembly and a sensor connector subassembly. The sensor connector subassembly is selectively connectable to the plug subassembly. A circuit board is secured within the sensor connector subassembly. The circuit board includes at least one positive temperature coefficient (PTC) device electrically connected between an activation switch and a load. The circuit board includes at least one circuit to protect against over-voltage or over-current to the load, detect a fault condition of the load, and determine whether the plug subassembly is connected to the sensor connector subassembly.
    Type: Grant
    Filed: October 10, 2011
    Date of Patent: March 17, 2015
    Assignee: Tyco Electronics Corporation
    Inventors: Lyle Stanley Bryan, John Steven Cowan, Thomas Michael Banas, Ralph Melvin Cooper
  • Patent number: 8982580
    Abstract: In an electronic device according to the present invention, a shield case is disposed at a surface of a main board so as to cover at least a part of a region of the surface of the main board; and an auxiliary board is disposed at a surface of the shield case. The shield case is comprised of a metallic frame that is fixed at the surface of the main board and extends in such a manner as to surround at least the part of the region, and a metallic cover fitted into the metallic frame to cover at least the part of the region. A projecting piece is formed in the metallic frame of the shield case, and penetrates the metallic cover and projects toward the auxiliary board. An end face of the auxiliary board abuts against the projecting piece, so as to position the auxiliary board.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: March 17, 2015
    Assignee: KYOCERA Corporation
    Inventor: Akito Iwai