Error/fault Detection Technique Patents (Class 714/799)
  • Publication number: 20100153828
    Abstract: A method processes a data packet in a first sequence of disjoint original segments of the same length. The method includes modifying a first of the original segments of the first sequence by modifying one or more symbols therein. A start of the data packet is located in the first of the original segments and is positioned after a first digital data symbol therein. The method also includes modifying a last of the original segments of the first sequence by modifying one or more digital data symbols therein. An end of the data packet is located in the last of the original segments and is located before the last digital data symbol therein. The method also includes determining a remainder sequence by effectively performing a polynomial division on a second sequence of disjoint segments that are derived from the first sequence. Each segment of the second sequence corresponds to and is derived from one of the original segments of the first sequence.
    Type: Application
    Filed: November 4, 2009
    Publication date: June 17, 2010
    Inventors: Adriaan J. De Lind Van Wijngaarden, Andreas Bernhard Zottmann
  • Patent number: 7739738
    Abstract: A robust and reliable mechanism is disclosed for detecting whether a system has (or may have) been booted into a compromised or otherwise unprotected environment, so that a persisted clean file cache can be used across boots when appropriate. As such security scanning of files. A clean file cache can be maintained and used by a security application to avoid unnecessarily re-scanning a file that has not been modified since last being scanned and determined clean. Unnecessary scans are therefore avoided.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: June 15, 2010
    Assignee: Symantec Corporation
    Inventors: William E. Sobel, Bruce E. McCorkendale
  • Publication number: 20100138728
    Abstract: An apparatus according to the present invention is an apparatus for supporting dynamic change of event rules in an SDR terminal under an SCA. The apparatus for supporting dynamic change of event rules includes: an event rule DB storing the rules that replicate event signals from an event generator and transmits the replicated event signals to an event consumer; an event manager that updates an event rule table recorded in a domain by using the event rules stored in the event rule DB; and an event relay unit that replicates the event signals from the event generator based on the event rule table and transmits the replicated event signals to the corresponding event consumer.
    Type: Application
    Filed: December 2, 2009
    Publication date: June 3, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hongsoog KIM, Namhoon Park
  • Publication number: 20100138730
    Abstract: Detection of faults in a transmitted signal stream occurs by recovering, from the information stream, a water mark embedded in the stream prior to transmission. The embedded watermark has data characteristic of stream quality. Thereafter, the at least one watermark property is analyzed to detect faults in the received information stream.
    Type: Application
    Filed: May 6, 2008
    Publication date: June 3, 2010
    Inventors: Are Olafsen, Jeffrey Adam Bloom, Kumar Ramaswamy
  • Publication number: 20100128175
    Abstract: Data decoding devices avoiding data error from incorrect sampling points caused by serious interference are disclosed. The data decoding devices receive an analog signal carrying a reference clock and at least one digital data. In the data decoding device, a slicer slices the analog signal at different sampling points by first and second sampling clocks to obtain first and second bitstreams, and the first and second sampling clocks have the same frequency and a predetermined phase difference. A data check unit evaluates whether the first bitstream is erroneous according to an error checking code thereof, outputs the first bitstream if it is error-free, and evaluates whether the second bitstream is erroneous according to the error checking code if the first bitstream is erroneous.
    Type: Application
    Filed: November 24, 2008
    Publication date: May 27, 2010
    Applicant: MEDIATEK INC.
    Inventors: Siou-Shen Lin, Hung Hui Ho
  • Patent number: 7724640
    Abstract: A sender and a receiver are engaged in an automatic repeat request (ARQ) wireless communication with each other. The sender is provided with an incoming data stream of a plurality of protocol data units (PDUs). The sender transmits a plurality of PDUs which are at least partially overlapping, with at least two different transmission power levels being used for the transmission of at least two different PDUs.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: May 25, 2010
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Peter Larsson
  • Patent number: 7725804
    Abstract: A method, wireless receiver, and wireless communication system manage error correction of received wirelessly transmitted messages. A High Level network layer component identifies unique values within a message type associated with a communication link. The High Level network layer component determines a message signature associated with the message type. Decoding rules associated with the message type are generated by the High Level network layer component. The decoding rules include a set of acceptable/unacceptable errors associated with the message type. The decoding rules are sent via the High Level network layer component, to a component at a network layer that is lower than the High Level network layer component. The Low Level network layer component decodes, based on the decoding rules, at least a portion of a wirelessly transmitted message that has been received.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: May 25, 2010
    Assignee: Motorola, Inc.
    Inventor: Jamil M. Shihab
  • Patent number: 7721004
    Abstract: A inter-network interface device usable in a highly reliable industrial control system provides an interface between a producer module transmitting redundant messages in accordance with a communication protocol and a consumer module receiving the messages in accordance with a different communication protocol. The inter-network interface device includes a first network interface receiving two messages from the producer, a microprocessor capable of converting the messages from the producer communication protocol to consumer communication protocol, and a second network interface transmitting the messages to the consumer. One of the messages is reversible altered with respect to the other message. The altered message is uninverted in the consumer module, and compared to the other message to ensure that no transmission errors have occurred.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: May 18, 2010
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: David A. Vasko, Joseph A. Lenner
  • Patent number: 7721072
    Abstract: An information processing method includes generating a state transition diagram based on state transition information; displaying the state transition diagram; manipulating the displayed state transition diagram; updating the state transition information in accordance with how the state transition diagram has been manipulated; and storing a position of a state designated as a transition starting state by the manipulating step. When the position of the transition starting state has been specified by the manipulating step, the displaying step displays as a pointer an icon indicating that the position of the transition starting state has been specified.
    Type: Grant
    Filed: November 2, 2006
    Date of Patent: May 18, 2010
    Assignee: Sony Corproation
    Inventors: Yasuhiro Watanabe, Shuichi Konami
  • Patent number: 7721183
    Abstract: The invention provides circuits that are tolerant to soft errors, such as a single event upset (SEU). The circuits have a chain of permitted state changes. Redundant elements, including redundant literals and assignments, are designed and implemented in the circuit. The design is such that a disruption or change of state on a single element by an SEU will not change the state flow of a circuit or lead to impermissible state changes. In one embodiment, the invention is implemented in quasi-delay-insensitive (QDI) asynchronous circuits.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: May 18, 2010
    Assignee: California Institute of Technology
    Inventors: Alain J. Martin, Wonjin Jang, Mika Nystroem
  • Publication number: 20100118787
    Abstract: An error detection coding processing section of the radio base station performs an error detection coding process with data including both first control data to be used for receiving a downlink signal and second control data to be used for sending an uplink signal as a unit. A sending section sends data on which the error detection coding process has been performed by the error detection coding processing section to the mobile station.
    Type: Application
    Filed: January 19, 2010
    Publication date: May 13, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Tetsuya Yano, Kazuhisa Obuchi, Tsuyoshi Shimomura
  • Publication number: 20100118986
    Abstract: Provided are an acknowledgement (ACK) method and apparatus of an aggregated frame in a wideband high frequency wireless system. The ACK method of a destination apparatus in the wideband high frequency wireless system includes reading subframes included in an aggregated frame during a predetermined period of time when receiving the aggregated frame, and generating an ACK frame including information about a reading result of the aggregated frame during the predetermined period of time.
    Type: Application
    Filed: November 10, 2009
    Publication date: May 13, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Seung Eun HONG, Kyeongpyo Kim, Yong Sun Kim, Woo Yong Lee
  • Publication number: 20100115384
    Abstract: The invention relates to a method for packet-switching transmission of media data and a device for processing media data. Media data may be video, audio or text data, or other data. Transmission of the data is usually effected according to a streaming method. The data is therein transmitted in packets and re-assembled in the receiving device. For Internet applications, the real-time transport protocol is very widely used in the transmission of data streams. However, this data transmission protocol does not enable a secure transmission which is based on a repetition of the defectively transmitted data. Sequence counters are used according to this protocol so that left-out data packets can be detected in the receiving device.
    Type: Application
    Filed: January 24, 2008
    Publication date: May 6, 2010
    Applicant: THOMSON LICENSING
    Inventors: Frank Glaeser, Andreas Matthias Aust
  • Publication number: 20100115385
    Abstract: An embodiment of the present disclosure relates to detection of data access element selection errors during data access in data storage arrays. An embodiment of the disclosure describes a system including a data storage array comprising a first and a second error identifier. The error identifiers generate an error signal in case multiple data access elements are selected or no data access element is selected, respectively. A system for detection of data-access-element-selection errors further comprises a common error-signal generator which provides an output when an error signal is generated by either of said error identifiers.
    Type: Application
    Filed: November 5, 2009
    Publication date: May 6, 2010
    Applicant: STMICROELECTRONICS PVT. LTD.
    Inventors: NAVEEN BATRA, JITENDRA DASANI
  • Publication number: 20100107042
    Abstract: A wireless communication apparatus that operates in a network environment with mixed different packet formats, includes: a first format detecting unit detecting a format by executing signal processing on a preamble of a received packet before decoding; an estimating unit using the preamble to carry out multiple types of estimations; a decoding unit decoding the received packet in accordance with the detected format based on the estimations; a second format detecting unit detecting the format of the received packet based on decoded control information in the preamble of the received packet; an error detection determination unit, when the format detected by the first format detecting unit differs from the format detected by the second format detecting unit, determining that the format detected by the first format detecting unit is error detection; and a control unit controlling operations of the estimating unit and the decoding unit based on a determined result.
    Type: Application
    Filed: September 23, 2009
    Publication date: April 29, 2010
    Applicant: SONY CORPORATION
    Inventors: Ryo SAWAI, Shinichi KURODA
  • Publication number: 20100100798
    Abstract: A method of error detection for a data packet, the method comprising the steps of: i) identifying a set of non-compliances (N), the non-compliances being illegal bit sequences according to a coding standard; ii) identifying a first subset (N+) of non-compliances that are to be treated as errors; iii) identifying a second subset (N.) of non-acceptable near-compliances; iv) decoding the data packet according to the coding standard; and v) adaptively deciding based on the first and second subsets whether to treat a detected non-compliance within the decoded data packet as an error or as an acceptable near-compliance.
    Type: Application
    Filed: March 18, 2008
    Publication date: April 22, 2010
    Applicant: NXP, B.V.
    Inventors: Catalin-Bogdan Visan, Cosmin Ionescu, Eric Barrau
  • Patent number: 7702993
    Abstract: A data recording method for an optical disk drive is implemented by the following steps. First, one or more data blocks are encoded and recorded sequentially, and it detects if a buffer under run occurs. If a buffer under run occurs, the recording does not stop immediately until at least the main data of the data block being currently recorded have been recorded completely. Afterwards, it restarts to encode and record from the data block next to the data block where the recording stops. Moreover, the recording also can stops if a servo error is detected, and the data restart to encode and record from the data block where the recording stops or at least one data block preceding the data block where the recording stops.
    Type: Grant
    Filed: May 11, 2007
    Date of Patent: April 20, 2010
    Assignee: Mediatek Inc.
    Inventors: Yih-Shin Weng, Hong-Ching Chen
  • Publication number: 20100095191
    Abstract: A method and apparatus for deinterleaving in a communication system is disclosed. The method and apparatus deinterleave data units using a data deinterleaver; compressed deinterleave input symbol quality information (SQI) units using a compressed deinterleaver, wherein at least one of the input SQI units deinterleaved by the compressed deinterleaver corresponds to at least one of the plurality of data units deinterleaved by the data deinterleaver; and apply the deinterleaved SQI units to the corresponding deinterleaved data units.
    Type: Application
    Filed: October 9, 2009
    Publication date: April 15, 2010
    Applicant: AUVITEK INTERNATIONAL LTD,
    Inventors: Sriram Mudulodu, Ping Dong, Jordan Christopher Cookman, Tao Yu
  • Patent number: 7694204
    Abstract: An apparatus, system and method for detecting errors in a physical interface during the transmission and/or receipt of data communications between integrated circuits (“ICs”) are disclosed. In one embodiment, an apparatus is configured to operate as or within a receiving physical interface. The apparatus includes a decoder configured to decode a subset of encoded data bits to yield decoded data bits. It also includes a physical interface (“PI”) error detection bit extractor configured to extract a physical interface error detection bit from the decoded data bits. As such, the apparatus uses the physical interface error detection bit to determine whether the encoded data bits include at least one erroneous data bit as an error. In some embodiments, the apparatus includes an error detector configured to operate within a physical layer. In at least one embodiment, the apparatus efficiently transmits error detection codes within, for example, an NB/(N+1)B line coder.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: April 6, 2010
    Assignee: Silicon Image, Inc.
    Inventors: Brian K. Schmidt, Lawrence Llewelyn Butcher
  • Publication number: 20100083073
    Abstract: A data processing apparatus includes a memory, an additional bit generating unit which generates an additional bit to be added to write expectation values, on a basis of the write expectation values to be written respectively to designated addresses in the memory, the additional bit and the write expectation values being supplied to the memory as write data and stored respectively in memory cells at the addresses, and a write state judging unit which reads stored data retained in the memory cells at the addresses and judges a write state of the memory cells.
    Type: Application
    Filed: September 16, 2009
    Publication date: April 1, 2010
    Applicant: NEC Electronics Corporation
    Inventor: Youji Terauchi
  • Patent number: 7689956
    Abstract: First, a yield is calculated by employing conventional SSTA. Next, an independent LL set is determined, the independent LL set being a subset having sets of delay element sets that only include gates and nets not being shared by two or more paths. Next, a yield is calculated by employing SSTA while using only the independent LL set. Thereby, it is understood that the actual yield is between the yield obtained by employing the conventional SSTA and the yield obtained by employing the SSTA using only the independent LL set.
    Type: Grant
    Filed: February 27, 2007
    Date of Patent: March 30, 2010
    Assignee: Fujitsu Limited
    Inventor: Hiroshi Ikeda
  • Publication number: 20100074314
    Abstract: Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data, and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns, and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.
    Type: Application
    Filed: October 26, 2009
    Publication date: March 25, 2010
    Applicant: RAMBUS INC.
    Inventors: Vladimir Stojanovic, Andrew Ho, Bruno W. Garlepp, Fred F. Chen
  • Publication number: 20100077251
    Abstract: A data transport system for transporting data between a server (21) and a client receiver (27) over a network (23) includes a receiving proxy cache (25) coupled to a client receiver (27) via a reliable connection (29), such as a cable connection. The majority of data is transported from the server (21) to the receiving proxy cache (25) over an efficient data transmission channel (41). The receiving proxy cache (25) verifies the status of the data transmitted over the efficient channel (41). If there is an error in the data transmission, a portion of the data associated with the error is retransmitted from the server (21) to the receiving proxy cache (25) over a reliable data transmission channel (43). The complete data at the receiving proxy cache (25) is delivered to a client receiver (27) over a reliable connection (29).
    Type: Application
    Filed: November 30, 2009
    Publication date: March 25, 2010
    Inventors: Hain-Ching Liu, Ji Zhang, Jiangang Ding
  • Publication number: 20100070836
    Abstract: A compression subsystem for a computed tomography system compresses projection data to for efficient data transfer and storage. The compression includes applying an attenuation profile to an array of projection data samples. The attenuation profile is a function of sample coordinates and determines attenuation values applied to the samples. The attenuated samples are encoded and packed for data transfer. Alternatively, difference operators are applied to the attenuated samples and the differences are encoded. The average number of bits per compressed sample is monitored and the attenuation profiles can be modified to achieve a desired number of bits per compressed sample. The compressed samples are decompressed prior to image reconstruction processing. Decompression includes decoding the compressed samples and applying a gain profile to the decoded samples to restore the original dynamic range. This abstract does not limit the scope of the invention as described in the claims.
    Type: Application
    Filed: September 11, 2008
    Publication date: March 18, 2010
    Applicant: Samplify Systems, Inc.
    Inventors: Albert W. Wegener, Yi Ling
  • Publication number: 20100070837
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a variable iteration data processing system is disclosed that includes a first detector, a second detector, a decoder and a unified memory buffer. An input data set is received by the first detector that performs a data detection and provides a first detected data set. The decoder receives a derivative of the first detected data set and performs a decoding operation that yields a decoded data set. In some cases, the derivative of the first detected data set is an interleaved version of the first detected data set. The decoded data set is written to a unified memory buffer. The first decoded data set is retrievable from the unified memory buffer and a derivative thereof is provided to the second detector. In some cases, the derivative of the decoded is a de-interleaved version of the decoded data set.
    Type: Application
    Filed: November 13, 2008
    Publication date: March 18, 2010
    Inventors: Changyou Xu, Shaohua Yang, Hao Zhong, Nils Graef, Ching-Fu Wu
  • Publication number: 20100070824
    Abstract: Providing transport protocol within a communication network having a lossy link. The receiver distinguishes between packets received with non-congestion bit errors and packets having been not at all received due to congestion. When packets are received with non-congestion bit errors, the receiver sends selective acknowledgments indicating that the packets were received with bit errors while suppressing duplicate acknowledgments to prevent the invocation of a congestion mechanism.
    Type: Application
    Filed: November 24, 2009
    Publication date: March 18, 2010
    Applicant: AT&T INTELLECTUAL PROPERTY II, L.P.
    Inventor: Kadangode K. Ramakrishnan
  • Publication number: 20100064202
    Abstract: A decoding apparatus for a high-density recording medium includes a demodulator, a long-distance code (LDC) processing module, a burst indicator subcode (BIS) processing module, an erasure code generator, and a decoder. The demodulator demodulates data from a high-density recording medium to obtain a demodulated data and a demodulation error flag. The LDC processing module and the BIS processing module deinterleave the demodulated data to respectively obtain an LDC data and a BIS data. The erasure code generator sets an erasure flag corresponding to the LDC data according to the demodulation error flag and the BIS error flag. The decoder decodes the LDC data according to the erasure flag. Further, the decoder decodes the BIS data to obtain the BIS error flag.
    Type: Application
    Filed: April 20, 2009
    Publication date: March 11, 2010
    Applicant: SUNPLUS TECHNOLOGY CO., LTD.
    Inventors: Yi-Kai Chen, Sih-Kai Wang, Sun-How Jiang
  • Publication number: 20100064204
    Abstract: Managing and monitoring multiple complex data feeds is a major challenge for data mining tasks in large corporations and scientific endeavors alike. The invention describes an effective method for flagging abnormalities in data feeds using an ensemble of statistical tests that may be used on complex data feeds. The tests in the ensemble are chosen such that the speed and ability to deliver real time decisions are not compromised.
    Type: Application
    Filed: November 16, 2009
    Publication date: March 11, 2010
    Inventors: Tamraparni Dasu, Gregg Vesonder, Jon R. Wright
  • Publication number: 20100064203
    Abstract: A method for managing a storage apparatus includes acquiring error information for each of physical addresses assigned to a logical address, and managing the error information for each of the physical addresses.
    Type: Application
    Filed: July 7, 2009
    Publication date: March 11, 2010
    Applicant: FUJITSU LIMITED
    Inventor: Masami Aihara
  • Patent number: 7676665
    Abstract: Arrangements for initialization-time and run-time integration of firmware and driver software extensions for supporting add-in hardware.
    Type: Grant
    Filed: September 14, 2005
    Date of Patent: March 9, 2010
    Assignee: Intel Corporation
    Inventor: David A. Wyatt
  • Publication number: 20100058141
    Abstract: A storage device stores identification information for identifying a pseudo-uncorrectable error sector, which is treated in a pseudo manner as a sector including an uncorrectable error, in the pseudo-uncorrectable error sector. The storage device further performs data processing on the sector by using the identification information stored in the sector. Moreover, the storage device stores log process information indicating whether an error log is registered in the pseudo-uncorrectable error sector in an error process related to the uncorrectable error that is treated to be included in a pseudo manner in the pseudo-uncorrectable error sector. In addition, the storage device performs data processing by using the log process information and the identification information.
    Type: Application
    Filed: July 20, 2009
    Publication date: March 4, 2010
    Applicant: FUJITSU LIMITED
    Inventor: Junichi Fukase
  • Publication number: 20100058052
    Abstract: A secure supervisory control and data acquisition (SCADA) system includes a SCADA control host system and any number of remote terminal unit (RTU) systems. Each RTU system includes an RTU transceiver, an RTU and a remote security device (RSD) coupling the RTU to the RTU transceiver. The SCADA control host system includes a SCADA control host configured to exchange SCADA information with each of the RTUs in a SCADA format, and a host security device (HSD) coupling the SCADA control host to a host transceiver. The host transceiver is configured to establish communications with each of the plurality of RTU transceivers. The HSD communicates with the RSDs to transparently encrypt the SCADA information using a cryptographic protocol that is independent of the SCADA protocol to thereby secure the communications between the HSD and each of the RSDs.
    Type: Application
    Filed: April 29, 2009
    Publication date: March 4, 2010
    Inventors: Andrew Bartels, Mike Guillote, Peter Schneider
  • Publication number: 20100058138
    Abstract: A method and system for large data transfer between a sender and a receiver. The sender transmits to the receiver a plurality of data packets in sequence. The time elapsed for each of the plurality of data packets after transmission of said each of the plurality of data packets is determined. The receiver transmits a message from the receiver to the sender notifying the sender that an identified one of the plurality of the data packets is missing. The sender retransmits to the receiver the identified one of the plurality of data packets only when the elapsed time determined for the identified one of the plurality of the data packets is greater than a predetermined time interval.
    Type: Application
    Filed: February 26, 2009
    Publication date: March 4, 2010
    Inventors: Magdolna Gerendai, Mihaly Toth, Tamas Szabo
  • Publication number: 20100058133
    Abstract: In some embodiments, a mobile device includes interface to receive multicast and broadcast service (MBS) signals and to transmit uplink signals, The mobile device also includes logic to detect errors in the transmission of the received MBS signals and provide negative acknowledge (NACK) signals indicating at least some of the errors in a contention-based MBS feedback channel in at least some of the uplink signals. Other embodiments are described.
    Type: Application
    Filed: May 28, 2009
    Publication date: March 4, 2010
    Inventor: Jeong Eun Lee
  • Patent number: 7673207
    Abstract: A semiconductor device that includes a module under test that is integrated with the semiconductor device, that receives an input signal from a test module, and that provides an output signal to at least one output terminal based on the input signal. An error detecting module is integrated with the semiconductor device, samples values of the output signal, and outputs the sampled values to the test module.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: March 2, 2010
    Assignee: Marvell International Ltd.
    Inventors: Masayuki Urabe, Akio Goto
  • Patent number: 7673214
    Abstract: A method of verifying the accuracy of blocks of data. In one embodiment, a method of verifying the accuracy of data in a message that includes a checking mechanism with hidden data is provided. The method comprises observing two or more initial messages. Comparing the residual error of each of the observed initial messages. If the residual errors of at least two of the initial messages match each other, storing the matched residual error. For subsequent messages, comparing residual errors of the subsequent messages with the stored matched residual error.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: March 2, 2010
    Assignee: Honeywell International Inc.
    Inventors: Brendan Hall, Kevin R. Driscoll
  • Publication number: 20100050046
    Abstract: Systems for identifying potentially erroneous and/or erased data are provided. Systems have a bit detector, an accumulator, and a data reconstruction processor. The bit detector assigns values to bits read in a data signal. The bit detector illustratively assigns multiple values to each of the bits. The accumulator accumulates a count of the multiple values assigned by the bit detector for each of the bits. The accumulator associates each bit with a particular value based at least in part on its accumulated count. The data reconstruction processor determines for each of the bits a confidence level of the particular value associated to it. The data reconstruction process sets flags for a portion of the bits. The flags identify the portion of the bits as possible erased or erroneous data. The flags are set based at least in part on the confidence levels of the portion of the bits.
    Type: Application
    Filed: November 5, 2009
    Publication date: February 25, 2010
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Michael H. Chen, Rajita Shrestha, James C. Alexander
  • Publication number: 20100050062
    Abstract: The system has, provided in a sending device, a generator generating transmission data including data, a data error detection code generated from the data and a safety flag indicating a degree of reliability, and transmission data; has, provided in a receiving device, a plurality of components of extracting transmission data, a safety flag, and a data error detection code from a received frame, and detecting a data error, a comparator comparing the matching of a plurality of received frames, and a selector selecting one received frame, from the frame error detection result, the safety flag, the data error detection result, and the matching comparison result; and determines the validity of transmitted data by the detection corresponding to the degree of reliability set with the safety flag.
    Type: Application
    Filed: October 29, 2009
    Publication date: February 25, 2010
    Inventors: Akihiro ONOZUKA, Masakazu ISHIKAWA, Masamitsu KOBAYASHI, Takashi UMEHARA, Shin KOKURA, Hiromichi ENDOH, Satoru FUNAKI, Hisao NAGAYAMA, Masahiro SHIRAISHI, Akira BANDO, Eiji KOBAYASHI, Yasuyuki FURUTA, Naoya MASHIKO
  • Patent number: 7668248
    Abstract: Transceiver circuitry for use in a multiple-input, multiple-output (MIMO), orthogonal frequency-division multiplexing (OFDM), communications environment, is disclosed. Error correction coding according to a fixed-block size code, such as low density parity check (LDPC) coding, is implemented. A specific LDPC code with excellent error rate performance is disclosed.
    Type: Grant
    Filed: October 18, 2006
    Date of Patent: February 23, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Dale E. Hocevar
  • Patent number: 7668930
    Abstract: A Web Service distribution system with the standard combination of a general protocol for the transporting and handling of data entities to and from Web stations, e.g. SOAP layered over HTTP, including means for detecting fault conditions in these general protocol transport and handling means with standard Web Services Description Language (WSDL) definitions for accessing specific Web Services for said data entities. There are standard processes for detecting fault conditions in said WSDL combined with routines responsive to the detection of WSDL fault conditions for sending WSDL fault message data to selected applications at display stations. There is prohibition of the sending of general protocol fault message data (e.g.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: February 23, 2010
    Assignee: International Business Machines Corporation
    Inventor: Joseph Herbert McIntyre
  • Publication number: 20100042909
    Abstract: A device includes a taxonomy schema; a display link base; a calculation link base; an XBRL document memory unit which stores an instance; an error inference unit which compares a calculated value of an input value of the instance corresponding to an item element of the calculation value in accordance with the calculation link base with the input value of the instance corresponding to the calculated value based on the display link base, detects a discrepancy between the calculation value and the input value, specifies a calculation tree structure of the calculation link base including the item element in which the discrepancy is detected and a display tree structure of the display link base including the item element in which the discrepancy is detected, and infers that a state of too many or too few item elements is regarded as a discrepancy error in the case that such an item element is set only in either one of the trees and that the item element has an input that is consistent with an absolute value of the
    Type: Application
    Filed: March 24, 2009
    Publication date: February 18, 2010
    Applicant: FUJITSU LIMITED
    Inventor: Kazuya Tanahashi
  • Publication number: 20100042877
    Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a data transfer system is disclosed that includes a data detector, a defect detector and a gating circuit. The data detector provides a soft output, and the defect detector is operable to receive the soft output and the data signal, and to assert a defect indication based at least in part on the soft output and the data signal. The gating circuit is operable to modify the soft output of the detector whenever the defect indication is asserted.
    Type: Application
    Filed: October 1, 2007
    Publication date: February 18, 2010
    Inventor: Weijun Tan
  • Publication number: 20100042897
    Abstract: In one embodiment, an LDPC decoder has a plurality of check-node units (CNUs) and a controller. Initially, the CNUs generate check-node messages based on an initial offset value selected by the controller. If the decoder converges on a trapping set, then the controller selects new offset values for missatisfied check nodes (MSCs), the locations of which are approximated, and/or unsatisfied check nodes (USCs). In particular, offset values are selected such that (i) the messages corresponding to the MSCs are decreased relative to the messages that would be generated using the initial offset value and/or (ii) the messages corresponding to the USCs are increased relative to the messages that would be generated using the initial offset value. Decoding is then continued for a specified number of iterations to break the trapping set. In other embodiments, the controller selects scaling factors rather than, or in addition to, offset values.
    Type: Application
    Filed: August 11, 2009
    Publication date: February 18, 2010
    Applicant: LSI Corporation
    Inventors: Yang Han, Kiran Gunnam, Shaohua Yang, Hao Zhong, Nils Graef, Yuan Xing Lee
  • Patent number: 7664898
    Abstract: A framing mechanism may be provided that enables passing of messages over an addressed bus. This creates a form of information hiding, which passes information by converting an addressed bus interface to a message-based bus interface. Address-based information in a transaction may be replaced with additional information that specifies framing details comprising, for example, a check pattern and length information. The check pattern provides a mechanism for determining whether frame information may be valid. An end device may utilize this length information to determine an actual length of an incoming frame. The combination of the check pattern and the length information may provide a pattern for resynchronizing a data stream when errors are detected. The framing mechanism may operate over existing addressed buses without requiring host side controller hardware modifications and additional host side software driver may be utilized to add the framing information.
    Type: Grant
    Filed: February 1, 2006
    Date of Patent: February 16, 2010
    Assignee: Broadcom
    Inventors: Changxi Jin, Stephen G. Siener, Neal Nuckolls, Guillermo A. Loyola
  • Publication number: 20100037124
    Abstract: A wireless communication apparatus, a wireless LAN system, an interference detecting method, and an interference avoidance method which detect the occurrence of a communication error caused by the occurrence of interference. A wireless communication apparatus (100) comprises a transmitted packet interference error detecting circuit (120) composed of an ED value detecting circuit (105) for measuring the ED value prior to packet transmission, an Ack error detecting circuit (106) for detecting an Ack error in the transmitted packet, and a transmitted packet interference error determining circuit (107). When the Ack error is detected in a packet transmitted on condition that the measured ED value exceeds the threshold value of interference determination, the apparatus (100) determines it to be an interference error.
    Type: Application
    Filed: January 18, 2007
    Publication date: February 11, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Yoshiyuki Hoshi, Yasuharu Hashimoto
  • Publication number: 20100037112
    Abstract: A mechanism is provided to allow an HARQ retransmission to more closely match the receiver's need for energy with the additional energy sent over the wireless link. In one aspect, the receiver sends the transmitter qualitative feedback which indicates to the transmitter an approximate amount of additional energy that the receiver needs to successfully decode the transmission.
    Type: Application
    Filed: July 2, 2009
    Publication date: February 11, 2010
    Applicant: NextWave Broadband Inc.
    Inventor: Peter Graumann
  • Patent number: 7660915
    Abstract: A process control system is provided having a plurality of I/O devices in communication using a bus. A primary redundant I/O device and a secondary redundant I/O device are coupled to the bus, where the secondary redundant I/O device is programmed to detect a primary redundant I/O device fault. The secondary redundant I/O device, upon detecting the primary redundant I/O device fault, publishes a primary redundant I/O device fault message on the bus. The controller may deactivate the primary redundant I/O device and activate the secondary redundant I/O device responsive to the primary redundant I/O device fault message.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: February 9, 2010
    Assignee: Fisher-Rosemount Systems, Inc.
    Inventors: Michael D. Apel, Steven L. Dienstbier
  • Publication number: 20100030607
    Abstract: A digital content management system with methodologies for lifecycle management of digital content is shown and described. In one embodiment, for example, a digital content management system is described that comprises: an ingestion module for receiving from clients various components used to create digital content releases; a polishing module for matching received components to a particular release being created; a packaging module for encoding the received components that were matched for the particular release into a digital package suitable for delivery to one or more digital content providers; and a delivery module for delivering the digital package of the particular release to one or more digital content providers.
    Type: Application
    Filed: March 24, 2009
    Publication date: February 4, 2010
    Applicant: RoyaltyShare, Inc.
    Inventors: Scott A. Holcombe, Kyle Wright, William French, Ryan Daniels, John Knott
  • Publication number: 20100031131
    Abstract: A method for processing noise interference in a serial advanced technology attachment (SATA) interface. In the method, when a receiver does not receive a SOF primitive (start of frame primitive) but does receive an EOF primitive (end of frame primitive) or WTRM primitive (wait for frame termination primitive), the receiver outputs a R_ERR primitive (reception error primitive) to enable a transmitter to resend original data and thus to eliminate the interference. In addition, if the transmitter detects an error during the data transmission, a HOLD primitive (hold data transmission primitive) will be issued to temporarily stop the data transmission.
    Type: Application
    Filed: October 7, 2009
    Publication date: February 4, 2010
    Inventors: Pao-Ching Tseng, Shu-Fang Tsai, Chuan Liu
  • Patent number: 7657798
    Abstract: A semiconductor integrated circuit has a cell array, a redundancy cell capable of replacing a defective cell, a redundancy control circuit, a plurality of first fuses, a plurality of second fuses, a plurality of third fuses, a first shift register configured to hold states of the plurality of first fuses, a second shift register configured to be connected in cascade to the first shift register and to hold states of the plurality of second fuses, a third shift register configured to be connected to the first and second shift registers in cascade and to hold states of the plurality of third fuses, a CRC remainder calculator configured to sequentially input information held by the first to third shift registers to a CRC generating equation to calculate a remainder obtained by division, and a CRC determination part that outputs information indicative of whether the first to third fuses are correctly programmed.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: February 2, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Natsuki Kushiyama, Shigeaki Iwasa