Making Device Or Circuit Emissive Of Nonelectrical Signal Patents (Class 438/22)
  • Patent number: 8766297
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structural body, first and second electrodes, a high resistance layer and a transparent conductive layer. The stacked structural body includes first and second semiconductor layers and a light emitting layer. The first semiconductor layer is disposed between the first electrode and the second semiconductor layer. The second semiconductor layer is disposed between the second electrode and the first semiconductor layer. The second electrode has reflectivity with respect to luminescent light. The high resistance layer is in contact with the second semiconductor layer between the second semiconductor layer and the second electrode and includes a portion overlapping with the first electrode. The transparent conductive layer is in contact with the second semiconductor layer between the second semiconductor layer and the second electrode.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: July 1, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshihide Ito, Toshiyuki Oka, Kotaro Zaima, Taisuke Sato, Shinya Nunoue
  • Patent number: 8766337
    Abstract: A first thin film diode (100A) has a first semiconductor layer (10A) and a first light blocking layer (12A) disposed on the substrate side of the first semiconductor layer. A second thin film diode (100B) has a second semiconductor layer (10B) and a second light blocking layer (12B) disposed on the substrate side of the second semiconductor layer. An insulating film (14) is formed between the first semiconductor layer (10A) and the first light blocking layer (12A) and between the second semiconductor layer (10B) and the second light blocking layer (12B). A thickness D1 of a portion of the insulating film (14) positioned between the first semiconductor layer (10A) and the first light blocking layer (12A) is different from a thickness D2 of a portion of the insulating film (14) positioned between the second semiconductor layer (10B) and the second light blocking layer (12B).
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: July 1, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hiroshi Aichi
  • Patent number: 8766293
    Abstract: A light-emitting device includes a first cladding layer, a light-emitting layer, a second cladding layer, an epitaxial structure including an indium-containing oxide, and an electrode unit for supplying external electricity, The electrode unit includes a first electrode disposed to be electrically connected to the first cladding layer, and a second electrode disposed above the epitaxial structure to be electrically connected to the second cladding layer through the epitaxial structure such that the external electricity is permitted to be transmitted to the light-emitting layer through the first and second electrodes. A method for manufacturing the light-emitting device is also disclosed.
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: July 1, 2014
    Assignee: Genesis Photonics Inc.
    Inventors: Jyun-De Wu, Yu-Chu Li
  • Patent number: 8766285
    Abstract: A display includes: a light-emitting element formed by laminating a first electrode layer, an organic layer including a light-emitting layer and a second electrode layer in order on a base; and an auxiliary wiring layer being arranged so as to surround the organic layer and being electrically connected to the second electrode layer, in which the auxiliary wiring layer includes a two-layer configuration including a first conductive layer and a second conductive layer, the first conductive layer has lower contact resistance to the second electrode layer than that of the second conductive layer, the two-layer configuration in the auxiliary wiring layer is formed so that an end surface of the second conductive layer is recessed inward from an end surface of the first conductive layer, thereby a part of a top surface of the first conductive layer is in contact with the second electrode layer.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: July 1, 2014
    Assignee: Sony Corporation
    Inventor: Hiroshi Sagawa
  • Publication number: 20140175372
    Abstract: A semiconductor nanowire device includes at least one semiconductor nanowire having a bottom surface and a top surface, an insulating material which surrounds the semiconductor nanowire, and an electrode ohmically contacting the top surface of the semiconductor nanowire. A contact of the electrode to the semiconductor material of the semiconductor nanowire is dominated by the contact to the top surface of the semiconductor nanowire.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Applicant: SOL VOLTAICS AB
    Inventors: Ingvar Åberg, Martin Magnusson, Damir Asoli, Lars Ivar Samuelson, Jonas Ohlsson
  • Publication number: 20140175470
    Abstract: The light-emitting device includes a first lower electrode, a second lower electrode, a partition, a layer with high conductivity, light-emitting layers, and an upper electrode. The conductivity of the layer with high conductivity is higher than the conductivity of each of the light-emitting layers and lower than the conductivity of each of the lower electrodes and the upper electrode. The partition includes a first slope located on a first lower electrode side and a second slope located on a second lower electrode side. The thickness of the layer with high conductivity located over the first slope in a direction perpendicular to the first slope is different from the thickness of the layer with high conductivity located over the second slope in a direction perpendicular to the second slope.
    Type: Application
    Filed: December 18, 2013
    Publication date: June 26, 2014
    Applicants: Sharp Kabushiki Kaisha, Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kohei Yokoyama, Tomohiro Kosaka, Fumikazu Shimoshikiryoh, Shinichi Kawato, Katsuhiro Kikuchi, Manabu Niboshi, Takashi Ochi, Yuto Tsukamoto, Tomofumi Osaki
  • Publication number: 20140175495
    Abstract: A die bonding method and a die bonding structure of a light emitting diode package are provided. The die bonding structure includes a light transmissive adhesive layer formed on a surface of a base plate of a light emitting diode chip, a first metal layer formed on the adhesive layer, a second metal layer formed on a packaging base plate and multiple metallic compound layers. The metallic compound layers are formed by spreading a third metal layer disposed on at least one of the first metal layer and the second metal layer into the first metal layer and the second metal layer after the third metal layer is heated up. The melting points of the first metal layer and the second metal layer are higher than the melting point of the third metal layer.
    Type: Application
    Filed: May 24, 2013
    Publication date: June 26, 2014
    Inventors: Tung-Han Chuang, Jian-Shian Lin, Ying-Tsun Su, Meng-Chi Huang
  • Patent number: 8759848
    Abstract: The application provides a light-emitting device, comprising a substrate; a plurality of first light-emitting diode units on the substrate, wherein every first light-emitting diode unit has a first electrode structure; and a plurality of second light-emitting diode units among the plurality of first light-emitting diode units, wherein every second light-emitting diode unit has a second electrode structure. The second electrode structure of the second light-emitting diode unit is flipped over and electrically connected with the adjacent first electrode structure of the first light-emitting diode unit.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: June 24, 2014
    Assignee: Epistar Corporation
    Inventors: Chao-Hsing Chen, Chien-Kai Chung, Hsin-Mao Liu, Chiu-Lin Yao, Chien-Fu Huang
  • Patent number: 8759859
    Abstract: Disclosed is a light-emitting element including a semiconductor substrate, an island structure formed on the semiconductor substrate and including at least a current confining layer and p-type and n-type semiconductor layers, a light-emitting thyristor formed in the island structure and having a pnpn structure, and a shift thyristor formed in the island structure and having a pnpn structure, wherein a groove portion having a depth such that the groove portion reaches at least the current confining layer is formed between a formation region of the shift thyristor of the island structure and a formation region of the light-emitting thyristor, and an oxidized region that is selectively oxidized from a side surface of the island structure and a side surface of the groove portion is formed in the current confining layer.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: June 24, 2014
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Taku Kinoshita, Kazutaka Takeda, Takashi Kondo, Hideo Nakayama
  • Patent number: 8759121
    Abstract: An LED array includes a substrate and a plurality of LEDs formed on the substrate. The LEDs are electrically connected with each other. Each of the LEDs includes a connecting layer, an n-type GaN layer, an active layer, and a p-type GaN layer formed on the substrate in sequence. The connecting layer is etchable by alkaline solution. A bottom surface of the n-type GaN layer which connects the connecting layer has a roughened exposed portion. The bottom surface of the n-type GaN layer has an N-face polarity. A method for manufacturing the LED array is also provided.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: June 24, 2014
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Tzu-Chien Hung, Chia-Hui Shen
  • Patent number: 8759120
    Abstract: A silicon solar cell includes a first silicon layer with an emitter layer which has a thickness in a range of 50 nanometers to few hundreds nanometers. The emitter layer has at least one region which is porosified by chemical or electrochemical etching, wherein at least one part of the porosified region is embodied as metal silicide layer. A second silicon layer is disposed underneath the emitter layer, with the metal silicide extending from a top side of the emitter layer in a direction to the second silicon layer. At least one metal layer is applied on the metal silicide layer.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: June 24, 2014
    Assignee: Atotech Deutschland GmbH
    Inventors: Mike Becker, Dietmar Lütke-Notarp
  • Patent number: 8759881
    Abstract: A heterostructure that includes, successively, a support substrate of a material having an electrical resistivity of less than 10?3 ohm·cm and a thermal conductivity of greater than 100 W·m?1·K?1, a bonding layer, a first seed layer of a monocrystalline material of composition AlxInyGa(1-x-y)N, a second seed layer of a monocrystalline material of composition AlxInyGa(1-x-y)N, and an active layer of a monocrystalline material of composition AlxInyGa(1-x-y)N, and being present in a thickness of between 3 and 100 micrometers. The materials of the support substrate, the bonding layer and the first seed layer are refractory at a temperature of greater than 750° C., the active layer and second seed layer have a difference in lattice parameter of less than 0.005 ?, the active layer is crack-free, and the heterostructure has a specific contact resistance between the bonding layer and the first seed layer that is less than or equal to 0.1 ohm·cm2.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: June 24, 2014
    Assignee: Soitec
    Inventors: Jean-Marc Bethoux, Fabrice Letertre, Chris Werkhoven, Ionut Radu, Oleg Kononchuck
  • Patent number: 8759122
    Abstract: A method for making a light emitting chip package, comprises: providing a substrate; forming a plurality of recesses on the bottom surface of the substrate; forming an etch stop layer on the bottom surface; forming a step hole on the top surface; forming an insulation layer on the top surface; defining a plurality of first through holes in the insulation layer and a plurality of second through holes in the etch stop layer, the number of the first through holes being different from the number of the second through holes; filling the first through holes and the second through holes with metal to respectively form first electrical conductor portions and second electrical conductor portions; forming a patterned electric conductive layer on the insulation layer; arranging a light emitting chip on the electric conductive layer; and encapsulating the light emitting chip with an encapsulation.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: June 24, 2014
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Jian-Shihn Tsang
  • Patent number: 8759845
    Abstract: A light emitting device (10) comprises a body (12) of a semiconductor material. A first junction region (14) is formed in the body between a first region (12.1) of the body of a first doping kind and a second region (12.2) of the body of a second doping kind. A second junction region (16) is formed in the body between the second region (12.2) of the body and a third region (12.3) of the body of the first doping kind. A terminal arrangement (18) is connected to the body for, in use, reverse biasing the first junction region (14) into a breakdown mode and for forward biasing at least part (16.1) of the second junction region (16), to inject carriers towards the first junction region (14). The device (10) is configured so that a first depletion region (20) associated with the reverse biased first junction region (14) punches through to a second depletion region associated with the forward biased second junction region (16).
    Type: Grant
    Filed: January 21, 2009
    Date of Patent: June 24, 2014
    Assignee: Insiava (Pty) Limited
    Inventors: Lukas Willem Snyman, Monuko Du Plessis
  • Patent number: 8759847
    Abstract: A white LED assembly includes a string of series-connected blue LED dice mounted on a substrate. The substrate has a plurality of substrate terminals. A first of the substrate terminals is coupled to be a part of first end node of the string. A second of the substrate terminals is coupled to be a part of an intermediate node of the string. A third of the substrate terminals is coupled to be a part of a second end node of the string. Other substrate terminals may be provided and coupled to be parts of corresponding other intermediate nodes of the string. A single contiguous amount of phosphor covers all the LED dice, but does not cover any of the substrate terminals. In one example, the amount of phosphor contacts the substrate and has a circular periphery. All the LEDs are mounted to the substrate within the circular periphery.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: June 24, 2014
    Assignee: Bridgelux, Inc.
    Inventors: Tao Xu, Michael Solomensky
  • Patent number: 8753910
    Abstract: A method of manufacturing a vertical structure light emitting diode device, the method including: sequentially forming a first conductivity type III-V group compound semiconductor layer, an active layer, and a second conductivity type III-V group compound semiconductor layer on a substrate for growth; bonding a conductive substrate to the second conductivity type III-V group compound semiconductor layer; removing the substrate for growth from the first conductivity type III-V group compound semiconductor layer; and forming an electrode on an exposed portion of the first conductive III-V group compound semiconductor layer due to the removing the substrate for growth, wherein the bonding a conductive substrate comprises partially heating a metal bonding layer by applying microwaves to a bonding interface while bringing the metal bonding layer into contact with the bonding interface.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: June 17, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myong Soo Cho, Ki Yeol Park, Sang Yeob Song, Si Hyuk Lee, Pun Jae Choi
  • Patent number: 8754406
    Abstract: An organic light emitting diode device includes a substrate, a transparent electrode disposed on the substrate, an emission layer disposed on the transparent electrode, a reflecting electrode disposed on the emission layer, and a gate insulating layer interposed between the substrate and the transparent electrode, the gate insulating layer being in contact with the transparent electrode and including a first inorganic dielectric layer having a thickness of about 1000 ? or less.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: June 17, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jung-Bae Song, Sang-Pil Lee, Young-Rok Song, Beohm-Rock Choi
  • Publication number: 20140159059
    Abstract: A method of manufacturing a display substrate includes forming a gate insulation layer on the base substrate on which a gate metal pattern, forming a data metal pattern on the gate insulation layer, sequentially forming a insulation layer and an organic layer on the base substrate on which the data metal pattern is formed, partially exposing the organic layer, developing the organic layer to partially remove the organic layer on the data metal pattern and to expose at least a portion of the protecting layer on the gate metal pattern, forming a common electrode on the organic layer, forming a pixel electrode on the on the organic layer, and forming an insulation layer between the pixel electrode and the common electrode. An etching degree of a data metal may be controlled by controlling a thickness of a remained organic layer to reduce a damage of the data metal.
    Type: Application
    Filed: April 24, 2013
    Publication date: June 12, 2014
    Applicant: Samsung Display Co., LTD.
    Inventors: Yu-Gwang JEONG, Ji-Young PARK, Shin-Il CHOI, Sang-Gab KIM
  • Patent number: 8748903
    Abstract: A semiconductor light emitting element (1) provided with an n-type semiconductor layer (140), a light emitting layer (150), a p-type semiconductor layer (160), a transparent electrode (170), a p-side electrode (300) formed on the transparent electrode, and an n-side electrode (400) formed on the n-type semiconductor layer. The p-side electrode has a p-side joining layer (310) and a p-side bonding pad electrode (320), which are laminated on the transparent electrode, and the n-side electrode has an n-side joining layer (410) and an n-side bonding pad electrode (420), which are laminated on the n-type semiconductor layer. The p-side joining layer and the n-side joining layer are configured of a mixed layer composed of TaN and Pt, and the p-side bonding pad electrode and the n-side bonding pad electrode are configured of a laminated structure composed of Pt and Au.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: June 10, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Koji Kamei, Honglin Wang
  • Patent number: 8748321
    Abstract: Epitaxial growth methods and devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice mismatch between an epitaxial material and the substrate. Devices formed by the methods described exhibit better interfacial adhesion and lower defect density than devices formed without texture. Silicon substrates are shown with gallium nitride epitaxial growth and devices such as LEDs are formed within the gallium nitride.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: June 10, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Anton deVilliers, Erik Byers, Scott E. Sills
  • Patent number: 8748908
    Abstract: A semiconductor optical emission device comprising a layer of material containing a plurality of stress variations and adhering to a surface of a semiconductor is described. In one embodiment the semiconductor is an indirect band gap semiconductor and is silicon in one aspect, the material of the layer comprises silicon and metal oxides and is prepared by a sol-gel process including thermal annealing in one aspect. The layer urges a plurality of randomly distributed elastic deformations in the semiconductor that substantially enhances the radiative recombination interactions among free carriers in the semiconductor.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: June 10, 2014
    Inventors: Sufian Abedrabbo, Anthony Thomas Fiory
  • Patent number: 8748923
    Abstract: A material such as a phosphor is optically coupled to a semiconductor structure including a light emitting region disposed between an n-type region and a p-type region, in order to efficiently extract light from the light emitting region into the phosphor. The phosphor may be phosphor grains in direct contact with a surface of the semiconductor structure, or a ceramic phosphor bonded to the semiconductor structure, or to a thin nucleation structure on which the semiconductor structure may be grown. The phosphor is preferably highly absorbent and highly efficient. When the semiconductor structure emits light into such a highly efficient, highly absorbent phosphor, the phosphor may efficiently extract light from the structure, reducing the optical losses present in prior art devices.
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: June 10, 2014
    Assignee: Philips Lumileds Lighting Company LLC
    Inventors: Michael R. Krames, Gerd O. Mueller
  • Patent number: 8748926
    Abstract: A chip package includes: a substrate having a first and a second surfaces; a device region formed in or disposed on the substrate; a dielectric layer disposed on the first surface; at least one conducting pad disposed in the dielectric layer and electrically connected to the device region; a planar layer disposed on the dielectric layer, wherein a vertical distance between upper surfaces of the planar layer and the conducting pad is larger than about 2 ?m; a transparent substrate disposed on the first surface; a first spacer layer disposed between the transparent substrate and the planar layer; and a second spacer layer disposed between the transparent substrate and the substrate and extending into an opening of the dielectric layer to contact with the conducting pad, wherein there is substantially no gap between the second spacer layer and the conducting pad.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: June 10, 2014
    Inventors: Kuo-Hua Liu, Yi-Ming Chang, Hsi-Chien Lin
  • Patent number: 8748203
    Abstract: A method of making a LED includes steps of providing a substrate having an epitaxial growth surface. A buffer layer and an intrinsic semiconductor layer are grown thereon in that order. A carbon nanotube layer is placed on the intrinsic semiconductor layer. A first semiconductor layer, an active layer, and a second semiconductor layer are grown in that order on the intrinsic semiconductor layer, the first semiconductor layer covering the carbon nanotube layer. A first electrode is applied to a surface of the second semiconductor layer and the substrate, the buffer layer, and the intrinsic semiconductor layer are removed to expose the carbon nanotube layer. A second electrode is applied to make electrical connections with the carbon nanotube layer.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: June 10, 2014
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Yang Wei, Shou-Shan Fan
  • Patent number: 8748930
    Abstract: The manufacturing method of the light-emitting device is provided in which an auxiliary electrode in contact with an electrode formed using a transparent conductive film of a light-emitting element is formed using a mask, and direct contact between the auxiliary electrode and an EL layer is prevented by oxidizing the auxiliary electrode. Further, the light-emitting device manufactured according to the method and the lighting device including the light-emitting device are provided.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: June 10, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisao Ikeda, Kohei Yokoyama, Satoshi Seo
  • Publication number: 20140151720
    Abstract: A semiconductor device adapted for being disposed on a substrate is provided. The semiconductor device includes a pixel electrode, a drain, a semiconductor channel layer, a source, a gate insulation layer and a side-gate. The pixel electrode is disposed on the substrate. The drain is disposed on the pixel electrode and exposes a portion of pixel electrode. The semiconductor channel layer is disposed on the drain. The source is disposed on the semiconductor channel layer. The gate insulation layer is disposed on the substrate, at least covers the source and surrounds the semiconductor channel layer. The side-gate is disposed on the gate insulation layer and extendedly covers the substrate along at least one side of the gate insulation layer. An extending direction of a portion of the side-gate is identical to a stacking direction of the drain, the semiconductor channel layer and the source.
    Type: Application
    Filed: September 13, 2013
    Publication date: June 5, 2014
    Applicant: E Ink Holdings Inc.
    Inventors: Wei-Chou Lan, Ted-Hong Shinn
  • Patent number: 8741669
    Abstract: In a method for producing an organic light emitting illuminant, a base electrode layer is formed over a substrate, an organic light emitting layer is formed over at least one portion of the base electrode layer, and a top electrode layer is formed over at least one portion of the organic light emitting layer, the layers being formed in the shape of strips. The strip-shaped formation of the layers is carried out in a coating process in an in-line vacuum coating system having stationary shadowing masks on the advancing substrate such that at least one area of the base electrode layer remains uncoated once the layers have been formed.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: June 3, 2014
    Assignee: VON ARDENNE Anlagentechnik GmbH
    Inventors: Carsten Deus, Joerk Richter, Ruben Seifert, Lutz Gottsmann
  • Patent number: 8742411
    Abstract: An adhesive film, and a product and method of encapsulating an organic electronic device (OED) using the same are provided. The adhesive film serves to encapsulate the OED and includes a curable hot-melt adhesive layer including a curable resin and a moisture absorbent, and the curable hot-melt adhesive layer includes a first region coming in contact with the OED upon encapsulation of the OED and a second region not coming in contact with the OED. Also, the moisture absorbent is present at contents of 0 to 20% and 80 to 100% in the first and second regions, respectively, based on the total weight of the moisture absorbent in the adhesive layer.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: June 3, 2014
    Assignee: LG Chem, Ltd.
    Inventors: Hyun Jee Yoo, Yoon Gyung Cho, Jung Sup Shim, Suk Chin Lee, Kwang Jin Jeong, Suk Ky Chang
  • Publication number: 20140147946
    Abstract: Provided is a method of fabricating a vertical light emitting diode (LED). Initially, a semiconductor structure layer including an active layer is formed on a front surface of a growth substrate. A conductive support substrate is formed on the semiconductor structure layer. A rear surface of the growth substrate is abraded to reduce the thickness of the growth substrate. The rear surface of the growth substrate whose thickness is reduced due to the abrasion is dry etched to remove the growth substrate.
    Type: Application
    Filed: November 19, 2013
    Publication date: May 29, 2014
    Inventor: Chang Yeon KIM
  • Patent number: 8735190
    Abstract: A semiconductor structure includes a module with a plurality of die regions, a plurality of light-emitting devices disposed upon the substrate so that each of the die regions includes one of the light-emitting devices, and a lens board over the module and adhered to the substrate with glue. The lens board includes a plurality of microlenses each corresponding to one of the die regions, and at each one of the die regions the glue provides an air-tight encapsulation of one of the light-emitting devices by a respective one of the microlenses. Further, phosphor is included as a part of the lens board.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: May 27, 2014
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Ching-Yi Chen, Yu-Sheng Tang, Hao-Yu Yang, Hsin-Hung Chen, Tzu-Wen Shih
  • Patent number: 8735186
    Abstract: The energy distribution of the beam spot on the irradiated surface changes due to the change in the oscillation condition of the laser or before and after the maintenance. The present invention provides an optical system for forming a rectangular beam spot on an irradiated surface including a beam homogenizer for homogenizing the energy distribution of the rectangular beam spot on the irradiated surface in a direction of its long or short side. The beam homogenizer includes an optical element having a pair of reflection planes provided oppositely for reflecting the laser beam in the direction where the energy distribution is homogenized and having a curved shape in its entrance surface. The entrance surface of the optical element means a surface of the optical element where the laser beam is incident first.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: May 27, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Tomoaki Moriwaka
  • Patent number: 8735185
    Abstract: The present invention relates to a method of fabricating a patterned substrate for fabricating a light emitting diode (LED), the method including forming an aluminum layer on a substrate, forming an anodic aluminum oxide (AAO) layer having a large number of holes formed therein by performing an anodizing treatment of the aluminum layer, partially etching a surface of the substrate using the aluminum layer with the large number of the holes as a shadow mask, thereby forming patterns, and removing the aluminum layer from the substrate.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: May 27, 2014
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Yeo Jin Yoon, Chang Yeon Kim
  • Publication number: 20140139458
    Abstract: A transparent emissive device is provided. The device may include one or more OLEDs having an anode, a cathode, and an organic emissive layer disposed between the anode and the cathode. In some configurations, the OLEDs may be non-transparent. The device may also include one or more locally transparent regions, which, in combination with the non-transparent OLEDs, provides an overall device transparency of 5% or more. The device also may include a double-sided display capable of displaying different, identical, or related images on each side of the device.
    Type: Application
    Filed: October 9, 2013
    Publication date: May 22, 2014
    Applicant: Universal Display Corporation
    Inventors: Mauro Premutico, Ruiqing Ma, Michael Hack
  • Patent number: 8729404
    Abstract: A method and apparatus for filling a via with transparent material is presented, including the steps of providing a panel having a via, occluding the via with transparent material in a workable state so that a portion of the occluding material is internal to the via and a portion of the material is external to said via. The external and internal portions are separated so the transparent filler material, when set, forms a smooth and featureless surface. This causes the filled via to have a substantially even and uniform appearance over a wide range of viewing angles when lit.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: May 20, 2014
    Assignee: Electro Scientific Industries, Inc.
    Inventors: Glenn Simenson, William Antoni, Steven Cohen, Jeffery Howerton
  • Patent number: 8728704
    Abstract: A donor substrate includes a base substrate, a light to heat conversion layer, a buffer layer and a transfer layer. The light to heat conversion layer may be disposed on the base substrate. The buffer layer may be disposed on the light to heat conversion layer. The buffer layer may include at least one porous layer having a plurality of pores. The transfer layer may be disposed on the buffer layer.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 20, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sang-Woo Pyo, Ha-Jin Song, Byeong-Wook Yoo, Hyo-Yeon Kim, Kwan-Hee Lee
  • Patent number: 8728237
    Abstract: A method for growing nitride semiconductor crystals contains: growing a first semiconductor layer containing InxGa1-xN (0<x?1) on a substrate at a first growth temperature, using a first carrier gas containing an inert gas; growing a second semiconductor layer containing InyGa1-yN (0?y<1, y<x) on the first semiconductor layer at a second growth temperature higher than the first growth temperature, using a second carrier gas containing the inert gas and H2 gas, an amount of the H2 gas being smaller than an amount of the inert gas; and growing a third semiconductor layer containing InzGa1-zN (0?z<1, z<x) on the second semiconductor layer at the second growth temperature, using a third carrier gas containing the inert gas and H2 gas, an amount of the H2 gas in the third carrier gas being a smaller than the amount of H2 gas in the second carrier gas.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: May 20, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Toshiki Hikosaka, Yoshiyuki Harada, Koichi Tachibana, Shinya Nunoue
  • Patent number: 8729578
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a second semiconductor layer and a light emitting layer. The second semiconductor layer is provided on a [0001]-direction side of the first semiconductor layer. The light emitting layer includes a first well layer, a second well layer and a first barrier layer. An In composition ratio of the barrier layer is lower than that of the first well layer and the second well layer. The barrier layer includes a first portion and a second portion. The second portion has a first region and a second region. The first region has a first In composition ratio higher than that of the first portion. The second region is provided between the first region and the first well layer. The second region has a second In composition ratio lower than the first In composition ratio.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 20, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeya Kimura, Hajime Nago, Koichi Tachibana, Shinya Nunoue
  • Patent number: 8729591
    Abstract: Non-planar via designs for sub-mounts on which to mount a LED or other optoelectronic device include a continuous layer of metal to conduct the current from the front-side (e.g., LED side) to the backside (e.g., SMD side) through the via and to provide a sufficiently stable and reliable under bump metallization for SMD soldering. Each UBM can be structured so that it does not fully cover the sidewall surfaces of the via that forms the front-to-backside interconnect. In some implementations, each via structure for the feedthrough metallization extends to a respective side-edge of the sub-mount.
    Type: Grant
    Filed: April 20, 2009
    Date of Patent: May 20, 2014
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Jochen Kuhmann, Lior Shiv
  • Patent number: 8729575
    Abstract: The semiconductor light emitting device according to an embodiment includes an N-type nitride semiconductor layer, a nitride semiconductor active layer disposed on the N-type nitride semiconductor layer, and a P-type nitride semiconductor layer disposed on the active layer. The P-type nitride semiconductor layer includes an aluminum gallium nitride layer. The indium concentration in the aluminum gallium nitride layer is between 1E18 atoms/cm3 and 1E20 atoms/cm3 inclusive. The carbon concentration is equal to or less than 6E17 atoms/cm3. Where the magnesium concentration is denoted by X and the acceptor concentration is denoted by Y, Y>{(?5.35e19)2?(X?2.70e19)2}1/2?4.63e19 holds.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: May 20, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Hung Hung, Yasushi Hattori, Rei Hashimoto, Shinji Saito, Masaki Tohyama, Shinya Nunoue
  • Publication number: 20140131690
    Abstract: An organic light emitting element (10) includes: an anode layer (12) formed on a substrate (11); a first dielectric layer (13) formed on the anode layer (12); a cathode layer (14) formed on the first dielectric layer (13); plural through-hole portions (16) passing through at least the anode layer (12) and the first dielectric layer (13); a second dielectric layer (19) formed in contact with an upper surface of the substrate (11) and a side surface of the anode layer (12); and a light emitting portion (17) formed in contact with the cathode layer (14), the side surface of the anode layer (12) and the upper surface of the second dielectric layer (19). Consequently, the organic light emitting element or the like having high light extraction efficiency and high light emission efficiency is provided.
    Type: Application
    Filed: June 24, 2011
    Publication date: May 15, 2014
    Applicant: SHOWA DENKO K.K.
    Inventors: Kunio Kondo, Kanjiro Sako, Masaru Tajima, Katsumasa Hirose
  • Publication number: 20140133508
    Abstract: Various embodiments of a photonic device and fabrication method thereof are provided. In one aspect, a device includes a substrate, a current confinement layer disposed on the substrate, an absorption layer disposed in the current confinement layer, and an electrical contact layer disposed on the absorption layer. The current confinement layer is doped in a pattern and configured to reduce dark current in the device. The photonic device may be a photodiode or a laser.
    Type: Application
    Filed: November 13, 2013
    Publication date: May 15, 2014
    Applicant: SiFotonics Technologies Co., Ltd.
    Inventors: Mengyuan Huang, Liangbo Wang, Wang Chen, Ching-yin Hong, Dong Pan
  • Publication number: 20140131683
    Abstract: Provided is a flexible organic electroluminescent device and a method for fabricating the same. The device includes a switching thin film transistor and a drive thin film transistor formed at an each pixel region on the substrate; an interlayer insulating layer formed on the substrate; a partition wall pattern formed in the non-display area of the substrate; a first electrode formed on the interlayer insulating layer; a bank formed around each pixel region; an organic light emitting layer separately formed on the first electrode; a second electrode formed on an entire surface of the display area; a first passivation layer formed on an entire surface of the substrate; an organic layer and a second passivation layer formed on the first passivation layer of the display area; a barrier film located to face the substrate.
    Type: Application
    Filed: November 7, 2013
    Publication date: May 15, 2014
    Applicant: LG DISPLAY CO., LTD.
    Inventors: DoHyung KIM, Taro HASUMI
  • Publication number: 20140131731
    Abstract: A light-emitting device according to an exemplary embodiment of the present invention includes a first conductivity-type semiconductor layer disposed on a substrate; an active layer disposed on the first conductivity-type semiconductor layer; a second conductivity-type semiconductor layer disposed on the active layer; and an irregular convex-concave pattern disposed on a surface of the first conductivity-type semiconductor layer. The irregular convex-concave pattern includes convex portions and concave portions, and the convex portions have irregular heights and the concave portions have irregular depths. The first conductivity-type semiconductor layer including the irregular convex-concave pattern is exposed from the active layer and the second conductivity-type semiconductor layer.
    Type: Application
    Filed: November 11, 2013
    Publication date: May 15, 2014
    Applicant: Seoul Viosys Co., Ltd.
    Inventors: Ye Seul KIM, Shin Hyoung Kim, Kyoung Wan Kim, Yeo Jin Yoon, Jun Woong Lee, Tae Gyun Kim
  • Publication number: 20140131745
    Abstract: An LED device includes first and second LED elements containing a lower layer of first conductivity type, an active layer, and an upper layer of second conductivity type, wherein the second LED element has third and fourth electrodes on the lower layer, recessed portion having a side surface exposing the upper, active and lower layers, and reaching the third electrode, fifth electrode disposed on the upper layer extending on the side surface of the recessed portion, and connected with the third electrode, and groove extending from the upper layer and reaching the active layer between the third and fourth electrodes to electrically separate the third electrode from the fourth electrode.
    Type: Application
    Filed: November 13, 2013
    Publication date: May 15, 2014
    Applicant: STANLEY ELECTRIC CO., LTD.
    Inventors: Ryosuke KAWAI, Mamoru MIYACHI, Tatsuma SAITO, Takako HAYASHI, Takanobu AKAGI
  • Publication number: 20140131682
    Abstract: Disclosed are a flexible organic electroluminescent device, and a method for fabricating the same. The flexible organic electroluminescent device comprises a non-active area formed outside an active area of a substrate; a switching thin film transistor and a driving thin film transistor on the substrate; an interlayer insulating layer formed on the substrate; a first electrode formed on the interlayer insulating layer; a bank formed in the non-active area of the substrate; an organic light-emitting layer formed on the first electrode; a second electrode formed on the organic light-emitting layer; a first passivation layer formed on the substrate; an organic layer formed on the first passivation layer; a partition wall pattern formed on the first passivation layer; a second passivation layer formed on the first passivation layer; and a barrier film disposed to face the substrate.
    Type: Application
    Filed: November 7, 2013
    Publication date: May 15, 2014
    Applicant: LG Display Co., Ltd.
    Inventors: Do Hyung KIM, Mi So KIM, Chi Min CHOI
  • Publication number: 20140134762
    Abstract: Provided are a method and an apparatus for manufacturing an organic EL device which enable deposition of a vaporized material onto a substrate in a desired pattern, while eliminating the need for a conventional strip-shaped shadow mask. A shielding portion is configured to be switchable between a shield position where the shielding portion is arranged between an evaporation source and a substrate so as to shield the substrate and a shield release position where the shielding portion is withdrawn from between the evaporation source and the substrate so as to release the shielding of the substrate. The shielding portion is moved in a transportation direction at the same speed as the substrate when the shielding portion is located at the shield position, whereas the shielding portion is moved in a direction opposite to the transportation direction when the shielding portion is located at the shield release position.
    Type: Application
    Filed: December 10, 2012
    Publication date: May 15, 2014
    Inventors: Ryohei Kakiuchi, Satoru Yamamoto, Kanako Hida
  • Patent number: 8722433
    Abstract: A method for fabricating light emitting diode (LED) dice includes the steps of mixing wavelength conversion particles in a base material to a first weight percentage, mixing reflective particles in the base material to a second weight percentage, curing the base material to form a wavelength conversion layer having a selected thickness, and attaching the wavelength conversion layer to a die.
    Type: Grant
    Filed: May 27, 2013
    Date of Patent: May 13, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventor: Jui-Kang Yen
  • Publication number: 20140124819
    Abstract: A light-emitting device comprises a first semiconductor layer; and a transparent conductive oxide layer comprising a diffusion region having a first metal material and a non-diffusion region devoid of the first metal material, wherein the non-diffusion region is closer to the first semiconductor layer than the diffusion region.
    Type: Application
    Filed: April 12, 2013
    Publication date: May 8, 2014
    Applicant: EPISTAR CORPORATION
    Inventors: Ting-Chia Ko, De-Shan Kuo, Chun-Hsiang Tu, Po-Shun Chiu, Chien-Kai Chung, Hui-Chun Yeh, Min-Yen Tsai, Tsun-Kai Ko
  • Publication number: 20140126597
    Abstract: The invention relates, inter alia, to a method for producing an electro-optical component (10, 200) suitable for emitting electromagnetic radiation (120), wherein in the method a first intermediate layer (60) is applied on a carrier, a second intermediate layer (70) is applied on the first intermediate layer, and after the second intermediate layer has been applied, the buried first intermediate layer is locally modified, wherein as a result of the local modification of the buried first intermediate layer in a lateral direction a refractive index jump is produced which brings about a lateral wave guiding of the electromagnetic radiation (120) in the unmodified region of the first intermediate layer.
    Type: Application
    Filed: June 21, 2012
    Publication date: May 8, 2014
    Inventors: André Strittmatter, Jan-Hindrik Schulze, Tim David Germann
  • Patent number: 8716058
    Abstract: An organic light-emitting display device including a substrate; at least one thin-film transistor (TFT) formed on the substrate; a planarizing layer covering the TFT; a pixel electrode, which is formed on the planarizing layer and is connected to the TFT; a protective layer surrounding an edge of the pixel electrode; a pixel defining layer (PDL), which has an overhang (OH) structure protruding more than the top surface of the protective layer, covers the protective layer and the edge of the pixel electrode, and exposes a portion of the pixel electrode surrounded by the protective layer; a counter electrode facing the pixel electrode; and an intermediate layer, which is interposed between the pixel electrode and the counter electrode and includes a light-emitting layer and at least one organic layer, where the thickness of the intermediate layer is greater than the thickness of the protective layer.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: May 6, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong-Hyun Choi, Jong-Yun Kim, Jin-Goo Kang, Dae-Hyun Noh