For Device Having Potential Or Surface Barrier (e.g., Phototransistor) (epo) Patents (Class 257/E31.053)

  • Patent number: 8110883
    Abstract: Electromagnetic radiation detecting and sensing systems using carbon nanotube fabrics and methods of making the same are provided. In certain embodiments of the invention, an electromagnetic radiation detector includes a substrate, a nanotube fabric disposed on the substrate, the nanotube fabric comprising a non-woven network of nanotubes, and first and second conductive terminals, each in electrical communication with the nanotube fabric, the first and second conductive terminals disposed in space relation to one another. Nanotube fabrics may be tuned to be sensitive to a predetermined range of electromagnetic radiation such that exposure to the electromagnetic radiation induces a change in impedance between the first and second conductive terminals. The detectors include microbolometers, themistors and resistive thermal sensors, each constructed with nanotube fabric. Nanotube fabric detector arrays may be formed for broad-range electromagnetic radiation detecting.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: February 7, 2012
    Assignee: Nantero Inc.
    Inventors: Jonathan W. Ward, Elwood James Egerton, Rahul Sen, Brent M. Segal
  • Patent number: 8084790
    Abstract: An image sensing device and packaging method thereof is disclosed. The packaging method includes the steps of a) providing an image sensing module, having a light-receiving region exposed, on a first substrate; b) forming a plurality of first contacts around the light-receiving region on the image sensing module; c) providing a second substrate, having a plurality of second contacts corresponding to the plurality of first contacts and an opening for allowing the light-receiving region to be exposed while the second substrate is placed over the image sensing module, the plurality of second contacts being disposed around the opening; d) connecting the plurality of first contacts and the plurality of second contacts; and e) disposing a transparent lid above the light-receiving region, on a side of the second substrate which is opposite to the plurality of second contacts.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: December 27, 2011
    Assignee: Tong Hsing Electronic Industries, Inc.
    Inventors: Chi-Chih Huang, Chih-Yang Hsu
  • Patent number: 8084837
    Abstract: In a rear surface incidence type CMOS image sensor having a wiring layer 720 on a first surface (front surface) of an epitaxial substrate 710 in which a photodiode, a reading circuit (an n-type region 750 and an n+ type region 760) and the like are disposed, and a light receiving plane in a second surface (rear surface), the photodiode and a P-type well region 740 on the periphery of the photodiode are disposed in a layer structure that does not reach the rear surface (light receiving surface) of the substrate, and an electric field is formed within the substrate 710 to properly lead electrons entering from the rear surface (light receiving surface) of the substrate to the photodiode. The electric field is realized by providing a concentration gradient in a direction of depth of the epitaxial substrate 710. Alternatively, the electric field can be realized by providing a rear-surface electrode 810 or 840 for sending a current.
    Type: Grant
    Filed: April 19, 2010
    Date of Patent: December 27, 2011
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8072009
    Abstract: A gas sensor having a field-effect transistor for detecting gases or gas mixtures is provided. The gas sensor includes a substrate having a source, drain and gate region, a gas-sensitive layer being applied on the gate region. A porous adhesive agent is provided for the adhesion of the gas-sensitive layer in the gate region.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: December 6, 2011
    Assignee: Robert Bosch GmbH
    Inventor: Andreas Krauss
  • Patent number: 8067261
    Abstract: A solid-state imaging device includes a photoelectric conversion unit, a transistor, and an element separation region separating the photoelectric conversion unit and the transistor. The photoelectric conversion unit and the transistor constitute a pixel. The element separation region is formed of a semiconductor region of a conductivity type opposite to that of a source region and a drain region of the transistor. A part of a gate electrode of the transistor protrudes toward the element separation region side beyond an active region of the transistor. An insulating film having a thickness substantially the same as that of a gate insulating film of the gate electrode of the transistor is formed on the element separation region continuing from a part thereof under the gate electrode of the transistor to a part thereof continuing from the part under the gate electrode of the transistor.
    Type: Grant
    Filed: March 8, 2010
    Date of Patent: November 29, 2011
    Assignee: Sony Corporation
    Inventor: Kazuichiro Itonaga
  • Patent number: 8053783
    Abstract: A high voltage diamond based switching device capable of sustaining high currents in the on state with a relatively low impedance and a relatively low optical switching flux, and capable of being switched off in the presence of the high voltage being switched. The device includes a diamond body having a Schottky barrier contact, held in reverse bias by the applied voltage to be switched, to an essentially intrinsic diamond layer or portion in the diamond body, a second metal contact, and an optical source or other illuminating or irradiating device such that when the depletion region formed by the Schottky contact to the intrinsic diamond layer is exposed to its radiation charge carriers are generated. Cain in the total number of charge carriers then occurs as a result of these charge carriers accelerating under the field within the intrinsic diamond layer and generating further carriers by assisted avalanche breakdown.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: November 8, 2011
    Assignee: Element Six Limited
    Inventors: Gehan Anil Joseph Amaratunga, Mihai Brezeanu, Jeremy Suhail Rashid, Nalin Lalith Rupesinghe, Antonella Tajani, Daniel James Twitchen, Florin Udrea, Christopher John Howard Wort
  • Publication number: 20110266645
    Abstract: Provided is an image sensor device. The image sensor device includes a substrate having a front side and a back side. The image sensor also includes an isolation feature disposed in the substrate. The image sensor further includes a radiation-sensing region disposed in the substrate and adjacent to the isolation feature. The radiation-sensing region is operable to sense radiation projected toward the radiation-sensing region from the back side. The image sensor also includes a transparent conductive layer disposed over the back side of the substrate.
    Type: Application
    Filed: April 28, 2010
    Publication date: November 3, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Calvin Yi-Ping Chao
  • Patent number: 8049288
    Abstract: An image sensor is provided. The image sensor comprises a readout circuitry, interconnections, a first image sensing device, and a second image sensing device. The readout circuitry is disposed on a first substrate. The interconnections comprise a first interconnection and a second interconnection on the first substrate to be electrically connected to the readout circuitry. The first image sensing device is disposed over the first interconnection. The second image sensing device is disposed over the first image sensing device and electrically connected to the second interconnection.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: November 1, 2011
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Gun Hyuk Lim
  • Publication number: 20110215298
    Abstract: A photodetector is provided that includes a FET structure with a channel structure having one or more nanowire structures. Noble metal nanoparticles are positioned on the channel structure so as to produce a functionalized channel structure. The functionalized channel structure exhibits pronounced surface plasmon resonance (SPR) absorption near the SPR frequency of the noble metal nanoparticles.
    Type: Application
    Filed: March 2, 2010
    Publication date: September 8, 2011
    Inventors: Jin Young Kim, Ramses Martinez, Francesco Stellacci, Javier Martinez, Ricardo Garcia
  • Patent number: 8008690
    Abstract: An amorphous-silicon thin film transistor and a shift resister shift resister having the amorphous-silicon TFT include a first conductive region, a second conductive region and a third conductive region. The first conductive region is formed on a first plane spaced apart from a substrate by a first distance. The second conductive region is formed on a second plane spaced apart from the substrate by a second distance. The second conductive region includes a body conductive region and two hand conductive regions elongated from both ends of the body conductive region to form an U-shape. The third conductive region is formed on the second plane. The third conductive region includes an elongated portion. The elongated portion is disposed between the two hand conductive regions of the second conductive region. The amorphous-silicon TFT and the shift resister having the amorphous TFT reduce a parasitic capacitance between the gate electrode and drain electrode.
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: August 30, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-Hwan Moon, Back-Won Lee
  • Patent number: 8004025
    Abstract: In a light sensing element having simplified structure, an array substrate having the light sensing element and an LCD apparatus having the light sensing element, the light sensing element includes a first electrode, a control electrode and a second electrode. An alternating bias voltage is applied to the first electrode. An off voltage is applied to the control electrode. The second electrode outputs a light-induced leakage current based on an externally provided light and the bias voltage. Therefore, the array substrate includes one light sensing switching element corresponding to one pixel so that structure of the array substrate is simplified and opening ratio is increased.
    Type: Grant
    Filed: April 5, 2010
    Date of Patent: August 23, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Jin Pak, Hyung-Guel Kim, Kee-Han Uh, Jong-Whan Cho, Jin Jeon, Young-Bae Jung
  • Publication number: 20110199602
    Abstract: A sensor, including a plurality of photo gate pairs on a semiconductor substrate, each of the photo gate pairs including a first photo gate and a second photo gate, a first shared floating diffusion region in the semiconductor substrate, and a plurality of first transmission transistors on the semiconductor substrate, wherein each of the plurality of first transmission transistors is adapted to transmit charges to the first shared floating diffusion region in response to a first transmission control signal, the charges being generated in the semiconductor substrate under the first photo gate of each of the plurality of photo gate pairs.
    Type: Application
    Filed: February 17, 2011
    Publication date: August 18, 2011
    Inventors: Suk Pil KIM, Yoon Dong Park, Dong Seok Suh, Young Gu Jin, Seung Hoon Lee
  • Publication number: 20110169055
    Abstract: A process and structure of a back side illumination (BSI) image sensor are disclosed. An n-type doped region is formed in a substrate, and a transfer gate is formed on top of the semiconductor substrate. A p-type doped region is formed in the n-type doped region either using the transfer gate as a mask or is non-self aligned formed.
    Type: Application
    Filed: June 7, 2010
    Publication date: July 14, 2011
    Applicant: HIMAX IMAGING, INC.
    Inventors: YANG WU, CHI-SHAO LIN
  • Publication number: 20110147876
    Abstract: A solid-state imaging device including an imaging area formed of a plurality of pixels arrayed in a two-dimensional matrix is provided. The solid-state imaging device includes: a photoelectric conversion portion including a charge accumulation region provided on a semiconductor substrate; a read transistor for reading electric charges from the photoelectric conversion portion; and a gettering site for separating metal impurities within the semiconductor substrate from at least the photoelectric conversion portion. The photoelectric conversion portion is provided on the surface side of the semiconductor substrate, and the gettering site is provided on the rear side away from the semiconductor substrate.
    Type: Application
    Filed: February 28, 2011
    Publication date: June 23, 2011
    Applicant: SONY CORPORATION
    Inventor: Yasushi Maruyama
  • Patent number: 7943976
    Abstract: A CMOS image sensor includes isolation regions and a photo diode region formed in a substrate, gate electrodes formed on the substrate, impurity injection regions formed in the substrate respectively positioned between the gate electrodes and the isolation regions, silicide regions formed on upper surfaces of the gate electrodes and the impurity injection regions, a first insulating layer formed on a surface of the photodiode region and sides of the gate electrodes, a second insulating layer formed on the first insulating layer, a third insulating layer formed on the second insulating layer, an interlayer insulating layer formed to cover the third insulating layer, and via plugs vertically passing through the interlayer insulating layer and connected to the silicide regions.
    Type: Grant
    Filed: October 15, 2009
    Date of Patent: May 17, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Byung-jun Park
  • Patent number: 7939875
    Abstract: A method of fabricating a pixel structure of a thin film transistor liquid crystal display is provided. A transparent conductive layer and a first metallic layer are sequentially formed over a substrate. The first metallic layer and the transparent conductive layer are patterned to form a gate pattern and a pixel electrode pattern. A gate insulating layer and a semiconductor layer are sequentially formed over the substrate. A patterning process is performed to remove the first metallic layer in the pixel electrode pattern while remaining the gate insulating layer and the semiconductor layer over the gate pattern. A second metallic layer is formed over the substrate. The second metallic layer is patterned to form a source/drain pattern over the semiconductor layer. A passivation layer is formed over the substrate and then the passivation layer is patterned to expose the transparent conductive layer in the pixel electrode pattern.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: May 10, 2011
    Assignee: Au Optronics Corp.
    Inventors: Mao-Tsun Huang, Tzufong Huang
  • Publication number: 20110102620
    Abstract: A solid-state imaging device is provided, which includes a photodiode having a first conductivity type semiconductor area that is dividedly formed for each pixel; a first conductivity type transfer gate electrode formed on the semiconductor substrate via a gate insulating layer in an area neighboring the photodiode, and transmitting signal charges generated and accumulated in the photodiode; a signal reading unit reading a voltage which corresponds to the signal charge or the signal charge; and an inversion layer induction electrode formed on the semiconductor substrate via the gate insulating layer in an area covering a portion or the whole of the photodiode, and composed of a conductor or a semiconductor having a work function. An inversion layer is induced, which is formed by accumulating a second conductivity type carrier on a surface of the inversion layer induction electrode side of the semiconductor area through the inversion layer induction electrode.
    Type: Application
    Filed: October 22, 2010
    Publication date: May 5, 2011
    Applicant: SONY CORPORATION
    Inventors: Yorito Sakano, Takashi Abe, Keiji Mabuchi, Ryoji Suzuki, Hiroyuki Mori, Yoshiharu Kudoh, Fumihiko Koga, Takeshi Yanagita, Kazunobu Ota
  • Publication number: 20110089312
    Abstract: A solid state imaging device having a light sensing section that performs photoelectric conversion of incident light includes: an insulating layer formed on a light receiving surface of the light sensing section; a layer having negative electric charges formed on the insulating layer; and a hole accumulation layer formed on the light receiving surface of the light sensing section.
    Type: Application
    Filed: December 23, 2010
    Publication date: April 21, 2011
    Applicant: SONY CORPORATION
    Inventors: Itaru Oshiyama, Takashi Ando, Susumu Hiyama, Tetsuji Yamaguchi, Yuko Ohgishi, Harumi Ikeda
  • Publication number: 20110089313
    Abstract: A solid state imaging device having a light sensing section that performs photoelectric conversion of incident light includes: an insulating layer formed on a light receiving surface of the light sensing section; a layer having negative electric charges formed on the insulating layer; and a hole accumulation layer formed on the light receiving surface of the light sensing section.
    Type: Application
    Filed: December 23, 2010
    Publication date: April 21, 2011
    Applicant: SONY CORPORATION
    Inventors: Itaru Oshiyama, Takashi Ando, Susumu Hiyama, Tetsuji Yamaguchi, Yuko Ohgishi, Harumi Ikeda
  • Publication number: 20110086459
    Abstract: There are provided a CMOS image sensor and a method for fabrication thereof. The CMOS image sensor having a reset transistor, a select transistor, a drive transistor and a photodiode, includes an active region in shape of a line, a gate electrode of the drive transistor, which is intersected with the active region, a blocking layer interposed between the active region and the gate electrode in which the blocking layer is formed on an intersection region of the active region and the gate electrode, and a metal contact electrically connected to the gate electrode, wherein the metal contact is not electrically connected to the active region by the blocking layer.
    Type: Application
    Filed: December 16, 2010
    Publication date: April 14, 2011
    Applicant: Crosstek Capital, LLC
    Inventors: Won-Joon Ho, Kyung-Lak Lee
  • Publication number: 20110086458
    Abstract: Provided is a CMOS image sensor with an asymmetric well structure of a source follower. The CMOS image sensor includes: a well disposed in an active region of a substrate; a drive transistor having one terminal connected to a power voltage and a first gate electrode disposed to cross the well; and a select transistor having a drain-source junction between another terminal of the drive transistor and an output node, and a second gate electrode disposed in parallel to the drive transistor. A drain region of the drive transistor and a source region of the select transistor are asymmetrically arranged.
    Type: Application
    Filed: December 16, 2010
    Publication date: April 14, 2011
    Applicant: CROSSTEK CAPITAL, LLC
    Inventor: Hee-Jeong Hong
  • Publication number: 20110084322
    Abstract: Disclosed is a CMOS image sensor and a manufacturing method thereof. According to an aspect of the present invention, each pixel of CMOS image sensor includes a photo detector that includes an electon Collection layer doped with a concentration of 5×1015/cm3 to 2×1016/cm3; and a transfer transistor that is connected to the photo detector and is formed of a vertical type trench gate of which the equivalent oxide thickness is 120 ? or more.
    Type: Application
    Filed: October 6, 2010
    Publication date: April 14, 2011
    Applicant: Electronics and Telecommunications Research Institute
    Inventor: Jin Yeong KANG
  • Patent number: 7915702
    Abstract: An image sensor that includes a plurality of pixels disposed on a substrate, each pixel includes at least one photosensitive region that collects charges in response to incident light; a charge-to-voltage conversion node for sensing the charge from the at least one photosensitive region and converting the charge to a voltage; an amplifier transistor having a source connected to an output node, having a gate connected to the charge-to-voltage conversion node and having a drain connected to at least a portion of a power supply node; and a reset transistor connecting the output node and the charge-to-voltage conversion node.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: March 29, 2011
    Assignee: Eastman Kodak Company
    Inventor: Christopher Parks
  • Patent number: 7898052
    Abstract: A component comprising a semiconductor junction (HU) is proposed which is formed from crystalline doped semiconductor layers. A semiconductor circuit (IC) is formed on the surface of the component, and a diode is formed internally and directly below the circuit. Integrated circuit and diode are connected to one another and formed and integrated diode component, in particular a photodiode array.
    Type: Grant
    Filed: November 28, 2005
    Date of Patent: March 1, 2011
    Assignee: Austriamicrosystems AG
    Inventors: Anton Prantl, Franz Schrank, Rainer Stowasser
  • Publication number: 20110031578
    Abstract: A semiconductor photodiode includes a semiconductor substrate; a first conduction type first semiconductor layer formed above the semiconductor substrate; a high resistance second semiconductor layer formed above the first semiconductor layer; a first conduction type third semiconductor layer formed above the second semiconductor layer; and a second conduction type fourth semiconductor layer buried in the second semiconductor layer, in which the fourth semiconductor layer is separated at a predetermined distance in a direction horizontal to the surface of the semiconductor substrate.
    Type: Application
    Filed: July 17, 2010
    Publication date: February 10, 2011
    Inventors: Makoto MIURA, Shinichi Saito, Youngkun Lee, Katsuya Oda
  • Publication number: 20110031529
    Abstract: A semiconductor photodiode device includes a semiconductor substrate, a first buffer layer containing a material different from that of the semiconductor substrate in a portion thereof, a first semiconductor layer formed above the buffer layer and having a lattice constant different from that of the semiconductor substrate, a second buffer layer formed above the first semiconductor layer and containing an element identical with that of the first semiconductor layer in a portion thereof, and a second semiconductor layer formed above the buffer layer in which a portion of the first semiconductor layer is formed of a plurality of island shape portions each surrounded with an insulating film, and the second buffer layer allows adjacent islands of the first semiconductor layer to coalesce with each other and is in contact with the insulating film.
    Type: Application
    Filed: July 17, 2010
    Publication date: February 10, 2011
    Inventors: Makoto MIURA, Shinichi Saito, Youngkun Lee, Katsuya Oda
  • Publication number: 20110024810
    Abstract: A method of manufacturing a CMOS image sensor is disclosed. A silicon-on-insulator substrate is provided, which includes providing a silicon-on-insulator substrate including a mechanical substrate, an insulator layer substantially overlying the mechanical substrate, and a seed layer substantially overlying the insulator layer. A semiconductor substrate is epitaxially grown substantially overlying the seed layer. The mechanical substrate and at least a portion of the insulator layer are removed. An ultrathin oxide layer is formed substantially underlying the semiconductor substrate. A mono layer of metal is formed substantially underlying the ultrathin oxide layer.
    Type: Application
    Filed: July 27, 2010
    Publication date: February 3, 2011
    Inventor: James Robert Janesick
  • Publication number: 20110024808
    Abstract: A CMOS image sensor is disclosed. The CMOS imager includes a lightly doped semiconductor substrate of a first conductivity type. At least one CMOS pixel of a second conductivity type is formed in the semiconductor substrate. The semiconductor substrate is configured to receive a bias voltage applied for substantially depleting the semiconductor substrate and for forming a depletion edge within the semiconductor substrate. A well of the second conductivity type substantially surrounds the at least one CMOS pixel to form a depletion region about the at least one CMOS pixel operable to form a minimum predetermined barrier to the depletion edge within the semiconductor substrate to pinch off substrate bias in proximity to the return contact.
    Type: Application
    Filed: July 27, 2010
    Publication date: February 3, 2011
    Inventor: James Robert Janesick
  • Patent number: 7880169
    Abstract: A display apparatus includes a gate electrode, a first insulating layer pattern formed over the gate electrode, a second insulating layer pattern formed over the first insulating layer pattern, exposing a portion of the first insulating layer, a semiconductor film pattern formed over the second insulating layer pattern and over the first insulating layer pattern, an impurity-doped semiconductor film pattern formed on the semiconductor film pattern, wherein the impurity-doped semiconductor film pattern contacts the top surface of the semiconductor film pattern and exposes a portion of the semiconductor film pattern formed over the gate electrode, a source electrode and a drain electrode each formed over a portion of the impurity doped semiconductor film pattern, a protection film pattern formed over the source electrode and the drain electrode in a TFT area, the protection film pattern having a contact hole over the drain electrode, a pixel electrode pattern formed on the protection film pattern and_electrical
    Type: Grant
    Filed: January 5, 2009
    Date of Patent: February 1, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Myung-Koo Hur
  • Publication number: 20110019063
    Abstract: A solid-state imaging device includes a pixel including a buried photodiode formed inside a substrate, a buried floating diffusion formed at a depth equal to that of the buried photodiode in the substrate so as to face a bottom of a trench portion formed in the substrate, and a buried gate electrode formed at the bottom of the trench portion in order to transfer a signal charge from the buried photodiode to the buried floating diffusion.
    Type: Application
    Filed: July 20, 2010
    Publication date: January 27, 2011
    Applicant: SONY CORPORATION
    Inventors: Taiichiro Watanabe, Kazufumi Watanabe
  • Patent number: 7875915
    Abstract: An integrated circuit includes at least one photodiode associated with a read transistor. The photodiode is formed from a stack of three semiconductor layers comprising a buried layer, an floating substrate layer and an upper layer. The drain region and/or the source region of the transistor are incorporated within the upper layer. The buried layer is electrically isolated from the upper layer so as to allow the buried layer to be biased independently of the upper layer.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: January 25, 2011
    Assignee: STMicroelectronics S.A.
    Inventors: François Roy, Arnaud Tournier
  • Publication number: 20110001165
    Abstract: A unit cell for use in an imaging system may include an absorber layer of semiconductor material formed on a semiconductor substrate, at least one contact including semiconductor material formed on the semiconductor substrate and electrically coupled to the absorber layer, and a cap layer of semiconductor material formed on the semiconductor substrate and electrically coupled to and formed between the absorber layer and the at least one contact. The absorber layer may be configured to absorb incident photons such that the absorbed photons excite electrons in the absorber layer to generate a photocurrent. The at least one contact may be configured to conduct the photocurrent to one or more electrical components external to the unit cell. The cap layer may be configured to conduct the photocurrent between the absorber layer and the at least one contact.
    Type: Application
    Filed: July 6, 2009
    Publication date: January 6, 2011
    Inventors: Edward Peter Gordon Smith, Gregory Mark Venzor, Eric J. Beuville
  • Publication number: 20100327332
    Abstract: A solid state imaging device having a pixel area in which a plurality of light receiving elements are arranged, and a peripheral circuit area adjacent to the pixel area includes: a semiconductor substrate 102 of a first conductivity type or a second conductivity type; a first semiconductor layer 103 of the first conductivity type provided on the semiconductor substrate 102, where the first semiconductor layer 103 is lower in impurity concentration than the semiconductor substrate 102; first impurity regions 104 of the second conductivity type provided in upper portions of the first semiconductor layer 103 in the pixel area; second impurity regions 105 of the first conductivity type provided between the plurality of the first impurity regions 104 adjacent to each other in the pixel area and in the peripheral circuit area; and third impurity regions 106 of the first conductivity type expanded from a position directly under the second impurity regions 105 toward the semiconductor substrate 102 in the pixel area.
    Type: Application
    Filed: June 29, 2009
    Publication date: December 30, 2010
    Inventors: Toru Okino, Mitsuyoshi Mori, Kazuo Jujiwara
  • Patent number: 7859075
    Abstract: An image sensor for minimizing a dark level defect is disclosed. The image sensor includes an isolation layer formed on a substrate. A field region and an active region are defined on the substrate by the isolation layer. A photodiode is formed in the image sensor in such a structure that a first region is formed below a surface of the substrate in the active region and a second region is formed under the first region. A first conductive type impurity is implanted into the first region and a second conductive type impurity is implanted into the second region. A dark current suppressor is formed on side and bottom surfaces of the isolation layer adjacent to the first region, and the dark current suppressor is doped with the second conductive type impurity. The dark current suppressor suppresses the dark current to minimize the dark level defect caused by the dark current.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: December 28, 2010
    Assignee: Samsung Electronics, Co., Ltd.
    Inventor: Sang-Il Jung
  • Publication number: 20100320514
    Abstract: A method of forming an imaging array includes providing a single crystal silicon substrate having an internal separation layer, forming a patterned conductive layer proximate a first side of the single crystal silicon substrate, forming an electrically conductive layer on the first side of the single crystal silicon substrate and in communication with the patterned conductive layer, securing the single crystal silicon substrate having the patterned conductive layer and electrically conductive layer formed thereon to a glass substrate with the first side of the single crystal silicon substrate proximate the glass substrate, separating the single crystal silicon substrate at the internal separation layer to create an exposed surface opposite the first side of the single crystal silicon substrate and forming an array comprising a plurality of photosensitive elements and readout elements on the exposed surface.
    Type: Application
    Filed: June 19, 2009
    Publication date: December 23, 2010
    Inventors: Timothy J. Tredwell, Jackson Lai
  • Publication number: 20100308213
    Abstract: A detector for detecting electromagnetic radiation includes a semiconductor substrate of a first doping type, and a well in the semiconductor substrate, the well being of a second doping type. The first doping type and the second doping type are different and the well has an increasing dopant concentration in a direction parallel to a surface of the semiconductor substrate. In addition, the detector includes a detector terminal doping region which is arranged at least partly in the well in a terminal region of the well. The detection of electromagnetic radiation is based on a generation of free charge carriers by the electromagnetic radiation in a detection region of the well. The detection region has a maximum dopant concentration which is lower than a maximum dopant concentration of the terminal region of the well.
    Type: Application
    Filed: May 6, 2010
    Publication date: December 9, 2010
    Inventors: Daniel Durini Romero, Werner Brockherde, Bedrich Hosticka
  • Publication number: 20100309358
    Abstract: A solid-state imaging device includes: a photoelectric conversion section (PCS) generating signal charge from light; a charge accumulating section (CAS) accumulating the signal charge; a first charge transfer section (CTS1) between the PCS and the CAS transferring the signal charge from the PCS to the CAS responsive to a control signal; and a second charge transfer section (CTS2) provided for the CAS to transfer the signal charge from the CAS in response to a control signal. The CAS includes: a charge accumulation gate electrode; and a gate insulating film between the charge accumulation gate electrode and a semiconductor substrate. The gate insulating film includes: a first region (R1) provided on a side of CTS1 in a region corresponding to the CAS; and a second region (R2) provided on a side of CTS2 in the region corresponding to the CAS. R2's gate insulating film is thicker than R1's.
    Type: Application
    Filed: June 1, 2010
    Publication date: December 9, 2010
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Junichi Yamamoto
  • Publication number: 20100301440
    Abstract: A mesa photodiode which includes a mesa, the sidewall of the mesa is a surface that is inclined in the direction in which the bottom of the mesa becomes wider. At least the sidewall of the mesa is covered with a semiconductor layer of a first conductivity type, a second conductivity type, a semi-insulating type, or an undoped type. The semiconductor layer is grown on at least the sidewall of the mesa. The inclined angle of the inclined surface of the mesa at the upper end portion is smaller than the inclined angle of the inclined surface of the mesa at the lower end portion.
    Type: Application
    Filed: April 20, 2010
    Publication date: December 2, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Isao Watanabe, Tomoaki Koi
  • Publication number: 20100301443
    Abstract: A method of fabricating an imaging array includes providing a single crystal silicon substrate and bonding the single crystal silicon substrate to an insulating substrate. One or more portions of an exposed surface of the single-crystal silicon substrate are removed to form a pattern of first areas having a first height measured from the insulating substrate and second areas having a second height measured from the insulating substrate. Photosensitive elements are formed on the first areas and readout elements are formed on the second areas. The single-crystal silicon substrate is treated by hydrogen implantation to form an internal separation boundary and a portion of the single-crystal silicon substrate is removed at the internal separation boundary to form the exposed surface.
    Type: Application
    Filed: May 29, 2009
    Publication date: December 2, 2010
    Inventors: Timothy J. Tredwell, Jackson Lai
  • Publication number: 20100295099
    Abstract: An image sensing device and packaging method thereof is disclosed. The packaging method includes the steps of a) providing an image sensing module, having a light-receiving region exposed, on a first substrate; b) forming a plurality of first contacts around the light-receiving region on the image sensing module; c) providing a second substrate, having a plurality of second contacts corresponding to the plurality of first contacts and an opening for allowing the light-receiving region to be exposed while the second substrate is placed over the image sensing module, the plurality of second contacts being disposed around the opening; d) connecting the plurality of first contacts and the plurality of second contacts; and e) disposing a transparent lid above the light-receiving region, on a side of the second substrate which is opposite to the plurality of second contacts.
    Type: Application
    Filed: August 2, 2010
    Publication date: November 25, 2010
    Inventors: Chi-Chih HUANG, Chih-Yang Hsu
  • Publication number: 20100289107
    Abstract: A photodiode includes a first doped layer and a second doped layer adjacent to the first doped layer and sharing a common face. A deep isolation trench is provided adjacent the photodiode having a face contiguous with the first doped layer and the second doped layer. A free face of the second doped layer is in contact with a conducting layer. A protective layer capable of generating a layer of negative charge is provided at the interface between, on one side, the first doped layer and the second doped layer and, on the other side, the deep isolation trench.
    Type: Application
    Filed: May 14, 2010
    Publication date: November 18, 2010
    Applicants: STMICROELECTRONICS S.A., STMICROELECTRONICS (CROLLES 2) SAS
    Inventors: Jorge Regolini, Luc Pinzelli
  • Publication number: 20100282948
    Abstract: An optical semiconductor device comprises a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type formed on the first semiconductor region. The device further comprises a third semiconductor region of the first conductivity type formed in a semiconductor layer, which is separated from the first and second semiconductor regions by an element separation region, and a fourth semiconductor region of the first conductivity type formed between a semiconductor substrate and third semiconductor region. The device further comprises a fifth semiconductor region of the first conductivity type formed across the semiconductor substrate and the first semiconductor region. An upper portion of the fifth semiconductor region penetrates into a specific depth of the first semiconductor region. Amplification of a current signal occurs when a reverse voltage is applied between the second semiconductor region and a surface portion of the third semiconductor region.
    Type: Application
    Filed: July 19, 2010
    Publication date: November 11, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Tsutomu MIYAJIMA, Hisatada YASUKAWA
  • Publication number: 20100270589
    Abstract: Provided is a photodetector converting an optical signal into an electrical signal. The photodetector includes: a plurality of semiconductor layers sequentially stacked on a substrate; a plurality of photoelectric conversion units formed in the semiconductor layers, respectively, and having different spectral sensitivities from each other; and buffer layers interposed between the adjacent semiconductor layers, respectively. Each of the buffer layers alleviates stress between the adjacent semiconductor layers.
    Type: Application
    Filed: May 8, 2008
    Publication date: October 28, 2010
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Dong-Woo Suh, Gyung-Ock Kim, Sang-Hun Kim
  • Patent number: 7821093
    Abstract: A solid-state imaging device with a structure such that an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal V is applied to a light-shielding film formed to cover an image pickup area except the light-receiving sensor portion; a second-conductivity-type semiconductor area is formed in the center on the surface of a first-conductivity-type semiconductor area constituting a photo-electric conversion area of the light-receiving sensor portion; and areas containing a lower impurity concentration than that of the second-conductivity-type semiconductor area is formed on the surface of the first-conductivity-type semiconductor area at the end on the side of the electrode and at the opposite end on the side of a pixel-separation area.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: October 26, 2010
    Assignee: Sony Corporation
    Inventors: Yoshiaki Kitano, Hideshi Abe, Jun Kuroiwa, Kiyoshi Hirata, Hiroaki Ohki, Nobuhiro Karasawa, Ritsuo Takizawa, Mitsuru Yamashita, Mitsuru Sato, Katsunori Kokubun
  • Patent number: 7816755
    Abstract: A pixel space is narrowed without increasing PN junction capacitance. A photoelectric conversion device includes a plurality of pixels arranged therein, each including a first impurity region of a first conductivity type forming a photoelectric conversion region, a second impurity region of a second conductivity type forming a signal acquisition region arranged in the first impurity region, a third impurity region of the first conductivity type and a fourth impurity region of the first conductivity type are arranged in a periphery of each pixel for isolating the each pixel, the fourth impurity region is disposed between adjacent pixels, and an impurity concentration of the fourth impurity region is smaller than an impurity concentration of the third impurity region.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: October 19, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuo Yamazaki, Tetsunobu Kochi
  • Patent number: 7808009
    Abstract: There is provided a high quality liquid crystal panel having a thickness with high accuracy, which is designed, without using a particulate spacer, within a free range in accordance with characteristics of a used liquid crystal and a driving method, and is also provided a method of fabricating the same. The shape of a spacer for keeping a substrate interval constant is made such that it is a columnar shape, a radius R of curvature is 2 ?m or less, a height H is 0.5 ?m to 10 ?m, a diameter is 20 ?m or less, and an angle ? is 65° to 115°. By doing so, it is possible to prevent the lowering of an opening rate and the lowering of light leakage due to orientation disturbance.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: October 5, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiharu Hirakata, Yuugo Goto, Yuko Kobayashi, Shunpei Yamazaki
  • Publication number: 20100243864
    Abstract: A solid-state imaging device includes plural photodiodes which are formed in a photodiode area of a unit pixel with no element separating area interposed therebetween and in which impurity concentrations of pn junction areas are different from each other.
    Type: Application
    Filed: March 22, 2010
    Publication date: September 30, 2010
    Applicant: SONY CORPORATION
    Inventor: Kazuichiro Itonaga
  • Publication number: 20100237455
    Abstract: A phototransistor used for an image sensor is provided. The phototransistor can reduce a dark current that occurs in the phototransistor and improve sensitivity at low luminance without crosstalk with a neighboring pixel or an image lag by including a buried collector. In the phototransistor including the buried collector, since the collector is not directly connected to outside, the phototransistor has a low dark current and a high photosensitive characteristic at low luminance. Since each image sensor is isolated, crosstalk between pixels or an image lag does not occur.
    Type: Application
    Filed: May 7, 2008
    Publication date: September 23, 2010
    Applicant: SILICONFILE TECHNOLOGIES INC.
    Inventor: Byoung-Su Lee
  • Publication number: 20100237392
    Abstract: The invention relates to a DEPFET transistor (1) for detecting a radio-generated signal charge (2) and for generating an electronic output signal in a manner dependent on the detected signal charge (2) according to a predetermined characteristic curve. The invention provides for the characteristic curve to have a degressive characteristic curve profile in order to combine a high measurement sensitivity in the case of small signal charges (2) with a large measurement range through to large signal charges (2).
    Type: Application
    Filed: October 8, 2008
    Publication date: September 23, 2010
    Applicant: Max-Planck-Gesellschaft zur Foerderung der Wissenschaften e.V.
    Inventors: Lothar Strueder, Gerhard Lutz
  • Publication number: 20100213440
    Abstract: A mesoporous silica having adjustable pores is obtained to form a template and thus a three-terminal metal-oxide-semiconductor field-effect transistor (MOSFET) photodetector is obtained. A gate dielectric of a nano-structural silicon-base membrane is used as infrared light absorber in it. Thus, a semiconductor photodetector made of pure silicon having a quantum-dot structure is obtained with excellent near-infrared optoelectronic response.
    Type: Application
    Filed: February 9, 2010
    Publication date: August 26, 2010
    Applicant: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Jia-Min Shieh, Wen-Chein Yu, Chao-Kei Wang, Bau-Tong Dai, Ci-Ling Pan, Hao-Chung Kuo, Jung-Y. Huang