Abstract: A method of manufacturing a resin multilayer substrate with a cavity, includes stacking insulation substrates including thermoplastic resins and thermocompression-bonding the insulation substrates. At least one of the insulation substrates is formed by affixing a peelable carrier film to one main surface of the insulation substrate, making a cut in the insulation substrate having the carrier film affixed thereto, the cut being designed to form the cavity, penetrating the insulation substrate in a thickness direction and not penetrating the carrier film in a thickness direction, and removing the carrier film and a portion of the insulation substrate that is cut out by the cut.

Abstract: Provided is a wiring board including: an insulating board having a mounting portion configured such that a semiconductor element is mounted on an upper surface thereof; a semiconductor element connection pad formed on the mounting portion; a conductor pillar formed on the semiconductor element connection pad; and a solder resist layer adhered on the insulating board. The solder resist layer has a first region with a thickness such that the semiconductor element connection pad and a lower end portion of the conductor pillar are embedded while an upper end portion of the conductor pillar protrudes, and a second region having a thickness larger than that of the first region and surrounding the first region.

Abstract: A method for manufacturing a probe card prepares a plurality of probes, each having a metal layer on an attaching portion, and hot-melt material covering the metal layer. Each probe is attached to a probe substrate by inserting its attaching portion into a different through hole of the probe substrate so that at least a part of the metal layer is located in the through hole. The hot-melt material of each attaching portion is melted and thereafter solidified such that the hot-melt material contacts the metal layer and a part of a wall surface of the through hole, to fix each probe to the probe substrate.

Abstract: A method for manufacturing a probe card includes inserting an attaching portion of each probe into one of first through holes provided on a probe substrate at least in a row, inserting a probe tip portion of each probe into second through holes respectively provided on a plurality of plate-like positioning members piled in their thickness directions at least in a row, relatively displacing the adjacent positioning members in opposite directions to two-dimensionally position the probe tip portions of the probes, and thereafter softening a conductive jointing material to position the attaching portions of the respective probes against the first through holes.

Abstract: A micro device may comprise a substrate, a first micro structure coupled to the substrate, a second micro structure coupled to the substrate, and port configured to receive an input. The first micro structure is configured to move into engagement with the second micro structure in response to the input.

Abstract: A high-frequency module has a multilayer board formed by laminating a plurality of sheets made of a thermoplastic resin material and subjecting the laminated sheets to thermocompression bonding, and an IC chip placed in a cavity provided in the multilayer board. A gap is provided between a side of the IC chip and an inner wall of the cavity. The multilayer board includes a via-hole conductor provided near the inner wall of the cavity for preventing the resin sheets from being softened and flowing into the cavity upon thermocompression bonding.

Abstract: A method of making articles from electrically active textiles. First and second fabric pieces include conductors therein. A seam is established between the first and second fabric pieces. A determination is made, at the seam, based on one or more predetermined factors, which conductors of the first fabric piece intersect or overlap with which conductors of the second fabric piece. At the seam, an electrical and mechanical connection is formed between select conductors of the first fabric piece and select conductors of the second fabric piece.

Abstract: Disclosed herein is a method for manufacturing a high frequency inductor, the method including; forming a primary coil for manufacturing the high frequency inductor on a wafer; coating a primary PSV on the wafer on which the primary coil is formed; forming a secondary coil for manufacturing the high frequency inductor, after the coating of the primary PSV; coating a secondary PSV, after the forming of the secondary coil; forming a barrier layer on an electrode portion to be exposed of the high frequency inductor, after the coating of the secondary PSV; filling and curing an insulating resin on the wafer, after the forming of the barrier layer; and polishing the cured resin up to the barrier layer to expose the electrode.

Abstract: A common mode filter with a multi spiral layer structure includes a first coil, a second coil, a third coil connected in series with the first coil, a fourth coil connected in series with the second coil, a first material layer and a second material layer. The second coil is disposed between the first and third coils, and the third coil is disposed between the second and fourth coils. At least one of the first and second material layers comprises magnetic material. The first, second, third, and fourth coils are disposed between the first and second material layers.

Abstract: The invention provides methods to mass laminate and interconnect high density interconnect circuit layers fabricated through parallel processing. Invention methods employ an inside-out interconnection strategy that eliminates plating of vias and provides defect-free outer circuit layers. Conductive paste and via layers are also key features of the invention.

Abstract: Printed circuit board apparatus with electromagnetic interference shields and methods of making the same.

Abstract: An electronic component package includes a substrate and dielectric structure. The dielectric structure includes a top surface having a protrusion portion and a lower portion. The protrusion portion is located at first height that is greater than a second height of the lower portion. A conductive bond pad is located over the dielectric structure. A ball bond electrically couples the bond pad and a bond wire. An intermetallic compound located between the ball bond and bond pad is formed of material of the ball bond and bond pad and electrically couples the bond pad to the ball bond. A portion of the bond pad is vertically located between a portion of the lower portion of the top surface of the dielectric structure and the intermetallic compound. No portion of the bond pad is vertically located between at least a portion of the protrusion portion and the intermetallic compound.

Abstract: Electrified access-control technology devices for a door, particularly electrified locks for a door, having embedded circuitry therein, and methods of making the same. One or more printed circuit boards (PCBs) having various electronic circuitry are secured inside a housing that encases an access-control device, particularly a lock, for a door. The one or more PCB(s) may be embedded on an internal surface of the housing such that the embedded PCB resides inside the housing along with the lock itself. The embedded PCB(s) avoid interference of both any working components of the lock inside the housing and any openings residing in the housing.

Abstract: A reusable electronic circuit assembling system facilitates assembly and testing of electronic circuits. The system has at least one baseboard and one or more assembling blocks magnetically or mechanically attached to the baseboard. Each assembling block has at least two electrically connected conductive clips located separately in the opening holes of the assembly block. Discrete electronic components are connected by selectively inserting the electrodes of the to-be-connected electronic components into the clips of the assembling blocks. A complete circuit is constructed by attaching the above block-component assemblies on the baseboard and connecting them in accordance with the desired circuit diagram.

Abstract: In one aspect, a circuit board includes a base board and a layer of an elastic material comprising a first surface and a second surface. The layer of elastic material is adhered to the base board via the first surface. The circuit board further includes an electrical trace disposed on the second surface of the layer of elastic material. At least a portion of the layer of elastic material stretches or shrinks when the base board expands or contracts. A method of manufacturing a circuit includes obtaining an aluminum board, obtaining a layer of an elastic material, and applying a layer of adhering material to a surface of the aluminum board. The method further includes disposing the layer of the elastic material onto the layer of adhering material, and adhering the layer of the elastic material onto the aluminum board via the layer of adhering material.

Abstract: In an electronic component, an outer electrode includes a sintered layer containing a sintered metal, an insulation layer containing an electric insulation material, and a Sn-containing layer containing Sn. The sintered layer extends from each of end surfaces of an element assembly onto at least one main surface thereof so as to cover each of the end surfaces of the element assembly. The insulation layer is directly provided on the sintered layer at each of the end surfaces of the element assembly so as to extend in a direction perpendicular or substantially perpendicular to a side surface of the element assembly, and defines a portion of a surface of the outer electrode. The Sn-containing layer covers the sintered layer except for a portion of the sintered layer that is covered by the insulation layer, and constitutes another portion of the surface of the outer electrode.

Abstract: A method for producing a Cu—Sn layer and an Sn-based surface layer are formed in this order on the surface of a Cu-based substrate through an Ni-based base layer, and the Cu—Sn layer is composed of a Cu3Sn layer arranged on the Ni-based base layer and a Cu6Sn5 layer arranged on the Cu3Sn layer; the Cu—Sn layer obtained by bonding the Cu3Sn layer and the Cu6Sn5 layer is provided with recessed and projected portions on the surface which is in contact with the Sn-based surface layer; thicknesses of the recessed portions are set to 0.05 ?m to 1.5 ?m, the area coverage of the Cu3Sn layer with respect to the Ni-based base layer is 60% or higher, and the ratio of the thicknesses of the projected portions to the thicknesses of the recessed portions in the Cu—Sn layer is 1.2 to 5.

Abstract: A method for forming an acoustical stack for an ultrasound probe comprises partly dicing a single crystal piezoelectric material to form single crystal pieces that are partly separated by a plurality of kerfs. The single crystal piezoelectric material comprises a carrier layer. The kerfs are filled with a kerf filling material to form a single crystal composite and the carrier layer is removed. At least one matching layer is attached to the single crystal composite, and dicing within the kerfs is accomplished to form separate acoustical stacks from the single crystal composite.

Abstract: Adhesiveness between a wiring layer and a resin layer is improved by forming a nitrided resin layer by nitriding a surface of a substrate by plasma, and furthermore, thinly forming a copper nitride film prior to forming a copper film.

Abstract: The invention relates to an arrangement for increasing the insulation coordination between at least two electric potentials on a printed circuit board (2), said arrangement comprising the printed circuit board (2) and an insulation barrier (3), wherein the printed circuit board (2) has an opening (7) between the electric potentials, and the insulation barrier (3) is disposed on the printed circuit board (2) so as to be displaceble through the opening (7) and is designed such that the isolating distance between the two electric potentials can be enlarged by displacing the insulation barrier (3) relative to the printed circuit board (2). The arrangement makes it possible obtain a high packing density on the printed circuit board (2).

Abstract: In some embodiments, selective electroless plating for electronic substrates is presented. In this regard, a method is introduced including receiving a coreless substrate strip, forming a stiffening mold on a backside of the coreless substrate strip adjacent to sites where solder balls are to be attached, and attaching solder balls to the backside of the coreless substrate strip amongst the stiffening mold. Other embodiments are also disclosed and claimed.

Abstract: A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.

Abstract: A method of manufacturing a micro structure, includes the steps of: preparing separate first and second substrates, the first substrate having a first surface on which a first structural body having a first height and a second structural body having a second height greater than the first height of the first structural body are arranged, the second substrate having a second surface; then placing the first and second substrates to cause the first and second surfaces to face each other across the first and second structural bodies; and then bonding the first and second substrates to each other while compressing the second structural body in a height direction thereof between the first and second surfaces to cause the second structural body to have a height defined by the first structural body.

Abstract: Wire probes are described that resist rotation during assembly into a probe head of a die tester. One example includes probe wires with a protrusion at a pre-determined position along the length of the wire. A probe substrate with pads on one side each to attach to and electrically connect with a probe wire and a pads on the opposite side to connect to test equipment and a probe holder above the substrate with holes. Each hole holds a respective one of the probe wires against the probe substrate. Each hole also has a key to mate with a protrusion of a respective probe wire so that the protrusions engage the keys to prevent rotation of the respective wire.

Abstract: A method of preparing an OGS touch screen is disclosed. The method includes forming a first film layer on a provided substrate, where the first film layer includes at least one hollow region and a protection film surrounding each hollow region. The method also includes tempering each hollow region by tempering the substrate, and removing the protection film on the substrate.

Abstract: A method of manufacturing a multilayered printed wiring board including forming a multilayered core substrate including insulation layers and one or more stacked via structures formed through the insulation layers, the stacked via structure including vias formed in the insulation layers, respectively, the insulation layers in the multilayered core substrate including at least three insulation layers and each of the insulation layers in the multilayered core substrate including a core material impregnated with a resin, and forming a build-up structure over the multilayered core substrate and including interlaminar insulation layers and conductor circuits, each of the interlaminar insulation layers including a resin material without a core material.

Abstract: A method of manufacturing a sensor network is described which includes stretching a silicon substrate over a desired area, and generating a plurality of nodes fabricated on the stretchable silicon substrate. The nodes include at least one of an energy harvesting and storage element, a communication device, a sensing device, and a processor. The nodes are interconnected via interconnecting conductors formed in the substrate.

Abstract: A circuit board structure manufacturing method includes the following steps. A circuit substrate is provided including an insulating layer, a first metal layer, and a second metal layer. The insulating layer is disposed between the first metal layer and the second metal layer. The first metal layer has a first cavity. The insulating layer has a second cavity and a provisional region. A width of the first cavity is larger than a width of the second cavity. The provisional region is defined between a sidewall of the first metal layer defining the first cavity and another sidewall of the first metal layer defining the second cavity. A first masking layer is formed to cover the first metal layer and provisional region. The second cavity is exposed from the first masking layer. A heat-dissipating metal member is formed in the second cavity. Furthermore, the first masking layer is removed.

Abstract: A manufacturing method of electronic module components according to the present invention includes: forming a plurality of module components on a principal surface of a substrate; forming a groove by dicing between the module components; spraying a conductive paste toward the principal surface of the substrate; and separating the module components. The spraying is performed so that an angle formed between a spray direction and the principal surface is an angle ?. The angle ? is set so as to satisfy the following expression (1), assuming that a depth of the groove is D and a width of the groove is w.

Abstract: A method for decreasing the number of assembly workstations, the method comprising the steps of providing a first workstation at a first location, supplied with power from a first power source; providing a product to the first workstation and supplying the product with power from the first power source; providing a second workstation at a second location, supplied with power from a second power source; transporting a product from the first workstation to the second workstation including disconnecting the first power source from the product in order to transport the product; connecting the product to the second power supply at the second workstation; the method further comprising the steps of: prior to supplying the product with power from the first power source placing the product in a device capable of supplying the product with power from a battery; disconnecting the first power source from the device; supplying the product from the battery, so that the product remains supplied with power between the discon

Abstract: A method of manufacturing a core substrate having an electronic component, including providing a core substrate having a first surface and a second surface on an opposite side of the first surface, forming a through hole extending from the first surface to the second surface in the core substrate, attaching an adhesive tape to the second surface of the core substrate such that the through hole formed in the core substrate is closed on the second surface, attaching an electronic component to the adhesive tape inside the through hole, filling the through hole with a filler, and removing the adhesive tape from the second surface of the core substrate.

Abstract: In one embodiment, a meta-module having circuitry for two or more modules is formed on a substrate, which is preferably a laminated substrate. The circuitry for the different modules is initially formed on the single meta-module. Each module will have one or more component areas in which the circuitry is formed. A metallic structure is formed on or in the substrate for each component area to be shielded. A single body, such as an overmold body, is then formed over all of the modules on the meta-module. At least a portion of the metallic structure for each component area to be shielded is then exposed through the body by a cutting, drilling, or like operation. Next, an electromagnetic shield material is applied to the exterior surface of the body of each of the component areas to be shielded and in contact with the exposed portion of the metallic structures.

Abstract: A system and method for a semiconductor wafer carrier is disclosed. An embodiment comprises a semiconductor wafer carrier wherein conductive dopants are implanted into the carrier in order to amplify the coulombic forces between an electrostatic chuck and the carrier to compensate for reduced forces that result from thinner semiconductor wafers. Another embodiment forms conductive layers and vias within the carrier instead of implanting conductive dopants.

Abstract: The present invention discloses a liquid crystal grating, a manufacturing method and a drive method thereof, and an optical phased array. In the liquid crystal grating, plurality of first electrodes are formed on a lower substrate with first gaps formed between adjacent first electrodes, second electrodes are further provided above the first gaps with second gaps formed between adjacent second electrodes, and an insulation layer is provided between the first electrodes and the second electrodes. When voltages are applied to the first electrodes and the second electrodes, continuously and smoothly changing electric field is generated inside the liquid crystal grating, and then phases of incident light may be controlled continuously and smoothly, which improves the ability of the liquid crystal grating to modulate light beam.

Abstract: A method for manufacturing an LED module includes following steps: providing a SMT apparatus having a CCD image sensor, providing a PCB having an LED mounted on, and fixing the PCB in the SMT apparatus; providing a lens, the CCD image sensor imaging the lens, and then the SMT apparatus obtaining a location of the lens relative to the LED, and the SMT apparatus positioning the lens on the PCB to cover the LED; providing an optical diffusing board located above the lens, and electrifying the LED for emitting light towards the optical diffusing board; providing a luminance colorimeter to measure luminance and chroma of light exited from the optical diffusing board, and obtaining a light-emitting data; calculating the light-emitting data, and the SMT apparatus adjusting a position of the lens relative to the LED; and fixing the lens on the PCB.

Abstract: The present invention provides a complex type fusible link which includes an insulative block base including a plurality of cavities; a conductive connecting plate which is integrally embedded in the insulative block base, a part of the conductive connecting plate being exposed to at least one of the cavities; a plurality of fusible elements each of which is accommodated in corresponding one of the cavities and includes a first end which is connected to the part of the conductive connecting plate and a second end; and a plurality of terminals each of which is integrally embedded in the insulative block base and includes a first end which is connected to the second end of corresponding one of the fusible elements and a second end which is exposed from the insulative block base.

Abstract: Provided are a wiring substrate; a multi-piece wiring substrate array; and a method for reliably producing the multi-piece wiring substrate array. The wiring substrate includes a substrate main body, which has first and second main surfaces, side surfaces, a groove surface, and a fracture surface; and a notch which has a concave shape in plan view, and which is provided on a side surface on a side toward the first main surface, wherein, in the side surface having the notch, the boundary between the groove surface and the fracture surface has first curved portions on opposite sides of the notch, the first curved portions being convex toward the first main surface in side view; and also has a second curved portion on a second-main-surface side of the notch, the second curved portion being convex toward the second main surface of the substrate main body in side view.

Abstract: A mountable device includes a bio-compatible structure embedded in a polymer that defines at least one mounting surface. The bio-compatible structure has a first side defined by a first layer of bio-compatible material, a second side defined by a second layer of bio-compatible material, an electronic component, and a conductive pattern that defines sensor electrodes. A portion of the second layer of bio-compatible material is removed by etching to create at least one opening in the second side in which the sensor electrodes are exposed. The etching further removes a portion of the first layer of bio-compatible material so as to create at least one opening in the first side that is connected to the at least opening in the second side. With this arrangement of openings, analytes can reach the sensor electrodes from either the first side or the second side of the bio-compatible structure.

Abstract: A fabricating method of an embedded package structure includes following steps. First and second boards are combined to form an integrated panel. First and second circuit structures are respectively formed on the first and second boards that are then separated. An embedded element is electrically disposed on the first circuit structure. First and second conductive bumps are respectively formed on a conductive circuit substrate and the second circuit structure. First and second semi-cured films are provided; a laminating process is performed to laminate the first circuit structure on the first board, the first and second semi-cured films, the conductive circuit substrate, and the second circuit structure on the second board. The first and second semi-cured films encapsulate the embedded element. The first and second conductive bumps respectively pierce through the first and second semi-cured films and are electrically connected to the first circuit structure and the conductive circuit substrate, respectively.

Abstract: A programmable logic controller (PLC) assembly includes a bottom housing with a base, a first plurality of elongate alignment features extending from the bottom housing transverse to the base, and a first connection feature. The PLC assembly includes a central processing unit with a circuit board and at least two receptacles therethrough configured to engage and slide along at least two of the first plurality of alignment features. The at least two of the first plurality of alignment features are positioned asymmetrically with respect to the base. The PLC assembly includes an upper housing with a second connection feature configured to slidably couple with the first connection feature and a second plurality of elongate alignment features configured to slidably engage at least two of the first plurality of alignment features, which are positioned asymmetrically with respect to the base.

Abstract: A method of manufacturing a circuit board includes: forming a first through hole in a core material; forming a first conductive film on an inner wall of the first through hole; forming an insulating layer on both surfaces of the core material and in the first through hole; forming a second through hole in the insulating layer in the first through hole; forming a second conductive film on an inner wall of the second through hole; and forming, on surfaces of the insulating layers formed on the both surfaces of the core material, a signal circuit layer electrically connected to the second conductive film.

Abstract: Certain example embodiments of this invention relate to cross-functional architectural greenhouse glass, greenhouses including cross-functional architectural greenhouse glass, and/or associated methods. Certain example embodiments involve combining sensor, functional coating, glass patterning, and/or glass composition selection technologies to produce flat or bent substrates suitable for use in such example applications. It advantageously becomes possible in certain example instances to give growers more control over their individual greenhouses (including portions thereof), while also switching from a more qualitative, to a more quantitative, growing operational approach.

Abstract: A wafer carrier is described. In one embodiment, the wafer carrier includes a variable aperture shield. The wafer carrier may include an electrically conductive wafer plating jig base having a plurality of concentric overlapping cavities of different depths, each cavity configured to receive a semiconductor wafer of a different size, a plurality of concentric magnetic attractors, at least one positioned within each of the plurality of overlapping cavities, and a cover plate comprising an open center surrounded by a support, the cover plate comprising an attractive material positioned within the support adjacent to the open center and aligned with at least one of the magnetic attractors when the cover plate is positioned over the wafer plating jig base.

Abstract: A manufacturing method of electrical bridges, wherein a conductive pattern (2) from electroconductive material, such as metal foil, is applied over a substrate (1) made of electrically insulating material and the electroconductive material has at least one strip tongue (3) unattached to the substrate, one side of the tongue is attached to the conductive pattern (2), and the said strip tongue (3) is folded over an area insulated electrically from the conductive pattern (2), and the strip tongue (3) is connected electroconductively to a predetermined other part (5) of the conductive pattern (2).

Abstract: A method of manufacturing a flex-rigid wiring board includes disposing a non-flexible substrate and a flexible board side by side in the horizontal direction of the substrate and board such that an end of the substrate is positioned adjacent to an end of the board and forms boundary between the board and the substrate with respect to the end of the board, covering the boundary between the board and the substrate with an insulating layer such that the insulating layer is positioned on the board and the substrate across the boundary, forming a second conductor pattern on the insulating layer, forming a via hole which passes through the insulating layer and reaches a first conductor pattern of the board, and plating the via hole such that a via conductor connecting the first and second patterns. The flexible board includes a flexible substrate and the first pattern formed over the substrate.

Abstract: Probe tip formation is described for die sort and test. In one example, the tips of wires of a test probe head are prepared for use as test probes. The wires are attached to a test probe head substrate. The end opposite the substrate has a tip. The tips of the wires are polished when attached to the test probe head to form a sharpened point.

Abstract: A wiring board includes an insulating board, a wiring sub board having a wiring layer, and an insulating layer. The insulating layer has a via hole in which a conductor is formed by plating. The insulating board and the wiring sub board are horizontally laid out. The insulating layer is laid out to cover a boundary portion between the insulating board and the wiring sub board and continuously extends from the insulating board to the wiring sub board. A resin which constitutes the insulating layer is filled in the boundary portion. The conductor is electrically connected to the wiring layer.

Abstract: Methods and structures for controlling wafer curvature during fabrication of integrated circuits caused by stressed films. The methods include controlling the conductor density of wiring levels, adding compensating stressed film layers and disturbing the continuity of stress films with the immediately lower layer. The structure includes integrated circuits having compensating stressed film layers.

Abstract: A method of forming an electrical component is provided. The method comprises preparing a subassembly by electrically connecting an integrated circuit to a flexible circuit; and attaching the subassembly to a multilayer ceramic capacitor having a mounting surface with a curvature deviation exceeding 0.008 inches per inch.

Abstract: A method is for making a multilayer circuit board from circuit board layers, each including a dielectric layer and conductive traces thereon including a first metal. The method includes forming a through-via in a first circuit board layer, plating the through-via with the first metal, and coating a second metal onto the first metal of the first circuit board layer, the plated through-via, and the first metal. The method also includes aligning the first and second circuit board layers together so that the plated through-via of the first circuit board layer is adjacent a feature on the second circuit board layer, and heating and pressing the aligned first and second circuit board layers so as to laminate the dielectric layers together and form an intermetallic compound of the first and second metals bonding adjacent metal portions together.