Fault Detecting In Electric Circuits And Of Electric Components Patents (Class 324/500)
  • Patent number: 8049455
    Abstract: Specific anomalies and details of failures as well as measures thereagainst are described that might possibly occur in electric power converters that drive and control permanent-magnet synchronous motors. An electric power converter capable of stable operation has a protective function of taking proper measures against such failures that might possibly occur.
    Type: Grant
    Filed: October 19, 2006
    Date of Patent: November 1, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hidetoshi Kitanaka
  • Patent number: 8045302
    Abstract: A compressor monitoring system includes current and voltage monitors, current and voltage averaging modules, a control module, and a switch. The current monitor measures a current drawn by a motor of a compressor. The current averaging module generates first and second average current values based on the current measured by the current monitor. The voltage monitor measures a utility power voltage. The voltage averaging module generates first and second average voltage values based on the voltage measured by the voltage monitor. The control module selectively generates a fault signal when a first ratio is greater than a first predetermined threshold and a second ratio is less than a second predetermined threshold. The first ratio is based on the first and second average current values. The second ratio is based on the first and second average voltage values. The switch deactivates the motor when the fault signal is generated.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: October 25, 2011
    Assignee: Emerson Climate Technologies, Inc.
    Inventors: Nagaraj Jayanth, George Ramayya
  • Patent number: 8040096
    Abstract: In a rotary electric system, a switch member includes at least one of a first switch and a second switch. The first switch is connected between a neutral point of multiphase stator windings and a high-side electrode of a direct current power source. The second switch is connected between the neutral point and a low-side electrode of the direct current power source. A controller works to turn the switch member off and on thereby switching control of the multiphase inverter between full-wave driving mode and half-wave driving mode. The full-wave driving mode allows the controller to drive all of the high-side and low-side switching elements per phase of the multiphase stator windings. The half-wave driving mode allows the controller to drive any one of the high-side switching element and the low-side switching element per phase of the multiphase stator windings.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: October 18, 2011
    Assignee: Denso Corporation
    Inventor: Makoto Taniguchi
  • Patent number: 8023235
    Abstract: An electrical fault detection device for use in a branch of a power circuit that utilizes signals from an AC line current sensor coupled to an electrical distribution line having a primary and neutral lines, a line high-frequency sensor coupled to the electrical distribution line, a differential current sensor coupled to the primary and neutral lines, and a ground fault current sensor coupled to the primary and neutral lines. A signal conditioner receives the signals outputted by AC current line current sensor, the line high frequency sensor, the differential current sensor and the ground fault current sensor and generates a signal indicative of the load current associated with a branch of the power circuit. Output of the signal conditioner is sampled and processed by a processing resource. The processing resource has stored therein data representing a plurality of time-versus-current curves that define a plurality of regions in which tripping may or may not occur.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: September 20, 2011
    Assignee: Siemens Industry, Inc.
    Inventors: Mario Bilac, Carlos Restrepo, Hugh T. Kinsel, Amit Nayak
  • Patent number: 8023126
    Abstract: An image forming apparatus includes a main power unit that outputs a first DC power and an auxiliary power unit that outputs a second DC power to the components of the image forming apparatus. The auxiliary power unit includes a rechargeable capacitor. A measuring unit measures performance of the capacitor and a determining unit determines performance insufficiency of the capacitor based on the measured performance and the system configuration of the image forming apparatus. The performance is, for example, changes in a capacitance of the capacitor with time. When the determining unit determines performance insufficiency of the capacitor, a control unit adjusts, for example, a use range of the capacitor.
    Type: Grant
    Filed: February 13, 2007
    Date of Patent: September 20, 2011
    Assignee: Ricoh Company, Ltd.
    Inventors: Toshitaka Semma, Yoshihisa Kimura, Tetsuya Yano, Kazuo Ogawa, Kazuhito Kishi
  • Patent number: 8024623
    Abstract: In a proximity communication system, transmit elements on one chip are aligned with receive elements on a second chip juxtaposed with the first chip. However, if the elements are misaligned, either statically or dynamically, the coupling between chips is degraded. The misalignment may be compensated by controllably degrading performance of the system. For example, the transmit signal strength may be increased. The bit period or the time period for biasing each bit may be increased, thereby decreasing the bandwidth. Multiple coupling elements, such as capacitors, may be ganged together, thereby decreasing the number of channels. The granularity of symbols, such as images, may be increased by decreasing the number of bits per symbol.
    Type: Grant
    Filed: November 3, 2008
    Date of Patent: September 20, 2011
    Assignee: Oracle America, Inc.
    Inventors: Ronald Ho, Ashok V. Krishnamoorthy, John E. Cunningham, Robert J. Drost
  • Patent number: 8013590
    Abstract: A method of measuring signals related to a photodiode based sensor and calculating a corrected data value thereof is disclosed. A nominal reset voltage value of the photodiode may be measured. A knee point voltage may be applied to the photodiode and resets a voltage on the photodiode to the knee point voltage when the voltage on the photodiode falls below the knee point voltage. Applying the knee point voltage may extend the dynamic range of the sensor. An output voltage of the photodiode at end of an integration time of the photodiode may be measured. The knee point voltage may be applied again after the end of the integration time. A voltage value of the photodiode of the knee point voltage may be measured. The nominal reset voltage value, the output voltage of a sensor and the knee point voltage may be reported to calculate the corrected data value.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: September 6, 2011
    Assignee: ON Semiconductor Trading, Ltd
    Inventor: Tom Walschap
  • Patent number: 8006156
    Abstract: Various exemplary embodiments provide methods and apparatuses for generating test conditions that efficiently detect delay faults while preventing overkill. According to an exemplary embodiment, i) test timing correcting block sets test timing faster than the actual operation timing of a logical circuit to be tested, ii) logical simulation block performs simulation by using delay times of signal paths corrected by adding minimum slack margin, and iii) when the simulation indicates that an end-side flip-flop cannot acquire data after an expected transition of logical value, masking block generates mask data that masks data held in the end-side flip-flop.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: August 23, 2011
    Assignee: Kawasaki Microelectronics, Inc.
    Inventor: Hiromi Kojima
  • Patent number: 7999559
    Abstract: Digital fault detection circuit with an input circuit having input and output, wherein a first signal state at the input causes a predetermined signal state at the output and a second signal state at the input leaves the output floating; a signal line with signal line input and output, wherein the signal line input is coupled to the output of the input circuit; a keeper circuit coupled to the signal line output and configured to keep the signal line at the predetermined signal state, after the signal state at the input has changed from the first signal state to the second signal state; and a fault detector cell, which is coupled to the signal line between the signal line input and the signal line output and which is configured to change the state of the signal line which is otherwise kept by the keeper circuit, in response to a fault.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: August 16, 2011
    Assignee: Infineon Technologies AG
    Inventor: Thomas Kuenemund
  • Patent number: 8000519
    Abstract: A method of evaluating an inline inspection recipe compares the capture rate of metal pattern defects in bounding boxes arising from failed electrical test vectors to the capture rate after the bounding box is shifted. A difference between the first and second capture rates indicates whether the inline inspection recipe is valid for capturing killer defects, or if the inline inspection recipe needs to be adjusted. In a particular example, the electrical test vectors are directed at a selected patterned metal layer of an FPGA (M6), and the metal pattern defect data for the selected patterned metal layer is mapped to the bounding box determined by the electrical test vector.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: August 16, 2011
    Assignee: Xilinx, Inc.
    Inventors: Yongjun Zheng, David Mark, Joe W. Zhao, Felino Encarnacion Pagaduan
  • Patent number: 7999558
    Abstract: Systems and methods for overvoltage and undervoltage detection may be implemented with a fully differential circuit that includes a coarse comparator and a band gap based fine comparator. The coarse comparator may determine if the battery is closer to an OV condition or an UV condition. Based on the output of the coarse comparator, the trip point of the fine comparator is adjusted. The outputs of both comparators are pull-up circuits whose output is decoded to determine if an OV or a UV condition has occurred. The systems and methods accomplish valid circuit outputs even when the voltage across the battery reduces to zero volts. This may be achieved by using an active low signal for the UV condition and an active high signal for the OV condition. Thus, when the battery voltage goes to zero, the circuit evaluates to the correct output.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: August 16, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Umar Jameer Lyles, Karthik Kadirvel, John H. Carpenter, Jr.
  • Patent number: 7994807
    Abstract: An analog device under test circuit and a built-in test circuit for testing an AC transfer characteristic of the analog device under test are fabricated on an integrated circuit. The built-in test circuit includes an amplitude detector that detects the amplitude of the output signal of the analog device under test. The test time is reduced by sampling in real-time the DC value corresponding to the amplitude of the analog device under test. An additional reduction in the test time is achieved by using comparators with upper and lower limit reference signals and a pass-fail logic test.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: August 9, 2011
    Assignee: National Semiconductor Corporation
    Inventors: Yongseon Koh, Babak Matinpour, Vijaya Ceekala
  • Patent number: 7994811
    Abstract: Test devices and integrated circuits with improved productivity are provided. In accordance with example embodiments, a test device may include a first test region with a first test element and a second test region with a second test element defined on a semiconductor substrate. The first test element may include a pair of first secondary test regions in the semiconductor substrate and a pair of first test gate lines. One of the first test gate lines may overlap one of the first secondary test regions and the other first test gate line may overlap the other first secondary test region. The second test element may include structures corresponding to the first test element except the second test element does not include structures corresponding to the pair of first secondary test regions and the pair of first test gate lines.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: August 9, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Jin Lee, Gin-Kyu Lee
  • Publication number: 20110175617
    Abstract: During a transient operating condition in an electric machine, a diagnostic routine associated with the electric machine may erroneously indicate a fault. According to the disclosure, a flag is set when a transient condition is detected. The flag is communicated to the diagnostic routine. The output of the diagnostic routine may be altered when the flag is set, i.e., when a transient is detected.
    Type: Application
    Filed: September 24, 2010
    Publication date: July 21, 2011
    Applicant: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Ji Wu, Joe Youqing Xiang
  • Patent number: 7979754
    Abstract: A method of testing a proximity communication system for voltage margin by impressing a voltage upon the data link between the transmitter on one chip and the receiver on the other chip coupled to the transmitter through a capacitively coupling circuit formed by juxtaposed capacitor pads on the respective two chips. The impressed voltage is varied and the output of the receiver is monitored to determine an operational voltage margin. The floating inputs on the receiver may be continuously biased by connecting them to variable biasing supply voltages through high impedances. When the floating inputs are periodically refreshed to a refresh voltage during a quiescent data period, the refresh voltage is varied between successive refresh cycles. The variable test voltage may be applied to transmitter output when it is in a high-impedance state, and the output of the receiver is measured.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: July 12, 2011
    Assignee: Oracle America, Inc.
    Inventors: Robert J. Drost, Ronald Ho, Justin M. Schauer
  • Patent number: 7979221
    Abstract: An electric power meter is disclosed which includes an analog to digital converter for converting sensed voltage and/or current signals to digital signals corresponding thereto. The meter further comprises storage for storing the digital signals. The meter further comprises a processor for performing power calculations upon the digital signals, and converting the calculations and the digital signals into at least one network protocol. The meter further comprises a network interface for interfacing with an external network. A system for modifying the functionality of the electric power meter is also disclosed.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: July 12, 2011
    Assignee: Power Measurement Ltd.
    Inventors: Bryan J. Gilbert, J. Bradford Forth, Jordon M. Dagg, Martin A. Hancock, Markus F. Hirschbold, Geoffrey T. Hyatt, Simon H. Lightbody
  • Publication number: 20110156745
    Abstract: The invention relates to a tester apparatus of the kind including a portable supporting structure for removably holding and testing a substrate carrying a microelectronic circuit. An interface on the stationary structure is connected to the first interface when the portable structure is held by the stationary structure and is disconnected from the first interface when the portable supporting structure is removed from the stationary structure. An electrical tester is connected through the interfaces so that signals may be transmitted between the electrical tester and the microelectronic circuit to test the microelectronic circuit.
    Type: Application
    Filed: February 8, 2011
    Publication date: June 30, 2011
    Applicant: Aehr Test Systems
    Inventors: Steven C. Steps, Scott E. Lindsey, Kenneth W. Deboe, Donald P. Richmond, II, Alberto Calderon
  • Patent number: 7969046
    Abstract: The present invention is to provide a power supply control apparatus which can connect a ground to a suitable electric potential when the ground is disconnected. The power supply control apparatus includes a control circuit having a switch element and a switch control unit, and a load. One terminal of load is connected to a direct-current power supply through the switch element, and the other terminal is connected to a ground electric potential. The switch control unit has a ground terminal connected to the ground electric potential and outputting a ground current flowing toward the ground electric potential. The control circuit includes a bypass device having a load side bypass system for passing the ground current to the ground electric potential through the load when connection between the ground terminal and the ground electric potential is disconnected.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: June 28, 2011
    Assignees: Yazaki Corporation, Toyota Jidosha Kabushiki Kaisha
    Inventors: Masashi Nakayama, Shigemi Ishima, Kazuhiro Aoki, Akihito Tsukamoto
  • Patent number: 7944366
    Abstract: Systems and methods of detecting occlusions and fluid-loss conditions (e.g., disconnects and/or leakages) in an infusion pump are discussed. For example, electrokinetic infusion pumps may develop an occlusion in the fluid flow path, which can disrupt control of fluid dispersed from the pump. As well, an infusion set disconnect can also result in a fluid-loss that can be disruptive. Such disruptions can be troublesome to systems that control the infusion pump, such as closed loop controllers. Accordingly, systems and methods described herein can be used to detect such occlusions and fluid-loss conditions during infusion pump operation. For example, a position sensor can be used to monitor fluid flow from the infusion pump, with the measurement being compared with an expected value to detect an occlusion or fluid-loss condition. Other algorithms for utilizing the position sensor are also described.
    Type: Grant
    Filed: September 18, 2006
    Date of Patent: May 17, 2011
    Assignee: Lifescan, Inc.
    Inventors: Peter Krulevitch, Sebastian Bohm, Mingqi Zhao, Deon Anex
  • Patent number: 7944365
    Abstract: Systems, methods, and apparatuses may be provided for stray voltage detection. The systems, methods and apparatuses may include providing a first antenna at a first location relative to a monitored equipment or structure, where the first antenna may be operative to detect a first electric field strength at the first location, providing a second antenna at a second location relative to the monitored equipment or structure, where the second antenna may be operative to detect a second electric field strength at the second location, and detecting a stray voltage based at least in part upon the detected first electric field strength and the second electric field strength.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: May 17, 2011
    Assignee: ABL IP Holding LLC
    Inventors: Jeff Walters, Emil Simion, Michael Dorogi
  • Patent number: 7940681
    Abstract: A system and method for discovering a cable type using an automated, systematic process. A PHY can be designed to measure electrical characteristics (e.g., insertion loss, cross talk, length, etc.) of the cable to enable determination of the cable type. The determined cable type can be used in diagnosis of cabling infrastructure or in a dynamic configuration or operation process.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: May 10, 2011
    Assignee: Broadcom Corporation
    Inventors: Wael William Diab, Minshine Shih
  • Publication number: 20110074436
    Abstract: A method, system and computer program product are disclosed for identifying false positive indications of high impedance faults in an AC electric power transmission and distribution network. In one embodiment, the method comprises using a procedure to monitor a phase conductor of the network for faults, said procedure generating a fault signal indicating a specified fault in the conductor. In this embodiment, the voltage and current waveform of the electric power conducted through the conductor are monitored. When a phase shift in said waveform is detected over a defined period of time, and said detected phase shift meets one or more given criteria, a correction signal is generated indicating that said fault signal is a false indication of the specified fault. The given criteria may include, for example, that the phase shift is more than a threshold value for a specified period of time.
    Type: Application
    Filed: September 29, 2009
    Publication date: March 31, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tomasz J. Nowicki, Grzegorz M. Swirszcz
  • Publication number: 20110068800
    Abstract: The present invention relates to an apparatus for evaluating an internal short circuit of a battery. An object of the invention is to provide an apparatus capable of evaluating whether or not an internal short circuit has occurred in an electrode group in consideration of pressure applied to the electrode group. An internal short circuit evaluation apparatus according to one embodiment of the invention includes at least a pressure member capable of operating independently and applying pressure to at least a predetermined position of the surface of the electrode group, and a short-circuiting member that is pressed into the predetermined position. An internal short circuit evaluation apparatus according to another embodiment of the invention includes a pressure member having an integrated short-circuiting member.
    Type: Application
    Filed: January 18, 2010
    Publication date: March 24, 2011
    Inventors: Hajime Nishino, Masato Fujikawa, Mikinari Shimada
  • Patent number: 7909509
    Abstract: A sensor configuration (1) for measuring the temperature of a surface, in particular of a screen (2), comprises a temperature sensor (3) which is disposed on a circuit board (4) and is positioned in the area of a front face (4?) of the circuit board (4) in the vicinity of the surface to be measured, and a further circuit board (6). The circuit boards (4) and (6) are connected by means of at least two connecting elements (5), at least one of which is designed in a resilient fashion.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: March 22, 2011
    Assignee: Sitronic Ges. fuer Elektrotechnische Ausruestung mbH & Co. KG
    Inventor: Gert Mau
  • Publication number: 20110057707
    Abstract: A multiplexed input/output (I/O) system detects leakage currents on a selected input channel. The system includes a leakage detection multiplexer connected to provide an output selected from one of a plurality of input channels. In addition, the leakage detection multiplexer provides as part of the output measured leakage currents associated with the selected input channel. Based on the detected leakage currents, a determination can made regarding whether the detected leakage currents have compromised the integrity of the multiplexer output. In addition, the detected leakage current can be used to compensate the output provided by the multiplexer to account for the presence of leakage currents on the selected channel.
    Type: Application
    Filed: September 4, 2009
    Publication date: March 10, 2011
    Applicant: Rosemount Inc.
    Inventors: Andrew James Bronczyk, Charles Edwin Goetzinger, Jason Harold Rud
  • Patent number: 7904768
    Abstract: A probing system for an integrated circuit device, which transmits a testing data/signal between an automatic test equipment (ATE) and an integrated circuit device, is disclosed. The probing system includes a test head having a first transceiving module. There is a test station having a test unit coupled to the test head to perform a test operation. A communication module has a second transceiving module configured to exchange data with the first transceiving module in a wireless manner. There is an integrated circuit device having a core circuit being tested, and a test module having a self-test circuit coupled to the core circuit and the communication module for performing the core circuit self-testing.
    Type: Grant
    Filed: May 3, 2008
    Date of Patent: March 8, 2011
    Assignee: National Tsing Hua University
    Inventors: Cheng-Wen Wu, Chih-Tsun Huang, Yu-Tsao Hsing
  • Patent number: 7901131
    Abstract: In a method for determining a state of an apparatus, detected temperatures are received from a plurality of sensors and are compared to at least one preset condition. The state of the apparatus is determined based upon the comparison.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: March 8, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Cullen E. Bash, Ratnesh Sharma
  • Patent number: 7899630
    Abstract: A metering device of a power substation and method are provided for operating on a secondary analog waveform output by a transformer assembly receiving a primary waveform. The method includes stepping down the secondary waveform and generating a corresponding output signal; operating on the corresponding output signal for generating a corresponding first digital signal having a value proportional to the corresponding output signal and within a first range; and operating on the corresponding output signal for generating a corresponding second digital signal having a value proportional to the corresponding output signal and within a second range. The method further includes processing the first digital signal and outputting a corresponding first output signal; processing the second digital signal and outputting a corresponding second output signal; processing the first and second output signals; and generating output corresponding to the processing of the first and second output signals.
    Type: Grant
    Filed: February 25, 2008
    Date of Patent: March 1, 2011
    Assignee: Electro Industries/Gauge Tech
    Inventor: Erran Kagan
  • Publication number: 20110037478
    Abstract: Disclosed is a field device which determines whether or not an abnormality which was detected is the type of abnormality which may not allow the output of a burn-out H signal, and sets a signal output for the abnormality to a burn-out L signal when the type of abnormality was one which may not allow the output of a burn-out H signal. For example, an abnormality in the D/A converter or the power supply. Therefore, a burn-out L signal is always output for an abnormality judged likely not to be able to output a burn-out H signal, and the certainty of reporting an abnormality when burn-out H is set is enhanced.
    Type: Application
    Filed: April 20, 2009
    Publication date: February 17, 2011
    Applicant: YAMATAKE CORPORATION
    Inventor: Kentaro Ohya
  • Publication number: 20110040423
    Abstract: A system for automatically determining a temperature tolerance range of an electronic device directs a temperature regulator to regulate a temperature equaling a previous regulated temperature plus or less a temperature difference. When a determination module determines the electronic device has failed to power on or a test of the electronic device for testing hardware of the electronic device has failed after the electronic device is powered on at a regulated temperature, a limit value of a temperature tolerance range for the electronic device is ascertained. The limit value is equal to the regulated temperature, under which the electronic device has failed to power on or test has failed, less or plus the temperature difference.
    Type: Application
    Filed: September 14, 2009
    Publication date: February 17, 2011
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: CHENG-CHI CHEN
  • Patent number: 7890283
    Abstract: The present invention is applicable to various sensor outputs including pulse signals and reduces cost for detecting malfunction. The malfunction detection system detects a malfunction in a sensor, and the malfunction detection system includes a sensor including a first terminal, and which outputs a sensor output current that varies a voltage level of the first terminal, a current output unit which varies the voltage level of the first terminal by outputting a constant current for judging to the sensor via the first terminal, and a judging unit which judges that the sensor is malfunctioning when the current for judging causes the voltage level of the first terminal to be equal to or higher than a threshold in a period different from a first period where the sensor output current causes the voltage level of the first terminal to be equal to or higher than the threshold.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: February 15, 2011
    Assignee: Panasonic Corporation
    Inventors: Eiichi Sadayuki, Tatsumi Sumi
  • Patent number: 7890288
    Abstract: A method and system for optimizing a test plan of an Integrated Circuit (IC). The test plan includes two or more test sequences. A test sequence includes the measurement of a parameter of the IC. The total test time of the IC is reduced by performing one or more activities during a desired wait time associated with the measurement of the parameter. The test plan may be further optimized by modifying the one or more activities performed during the desired wait time.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: February 15, 2011
    Assignee: Anadigics, Inc.
    Inventor: Michael Joseph Raneri
  • Patent number: 7876539
    Abstract: Various electrical apparatuses which include a current dampening device are disclosed. In one embodiment, an electrical apparatus is provided which includes a motor and a switch having an “on” position and an “off” position to control the operation of the motor. A current dampening device is connected in parallel with the motor downstream from the switch to dampen transient current. In another embodiment a ground fault circuit interrupter (GFCI) is electrically connected to the motor upstream from the switch.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: January 25, 2011
    Assignee: Pentair Pump Group, Inc.
    Inventor: Bill Tharp
  • Patent number: 7872478
    Abstract: A method and an adaptive distance protection relay for compensating for a remote line end infeed effect during determination of a distance to a resistive fault on a three-phase power transmission line. It is assumed that a fault current flows through the fault resistance. A fault loop impedance is first calculated by a known algorithm from phase voltages and phase currents. A shift of the fault loop impedance is determined from the fault loop impedance, the impedance of the transmission line for the positive current sequence and the phase angle of a complex fault current distribution factor, where the fault current distribution factor is the ratio of the fault loop current to the fault current. The distance to fault is calculated by subtracting the impedance shift from the fault loop impedance and dividing the result by the impedance of the transmission line for the positive current sequence.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: January 18, 2011
    Assignee: ABB Technology Ltd.
    Inventors: Murari Saha, Eugeniusz Rosolowski, Jan Izykowski
  • Patent number: 7868624
    Abstract: An approach is provided for correcting the feedback from electrical measurement converters to the device under test in the case of measurements in the high-frequency and/or microwave range. At least three measurements are implemented with respectively different input impedances of the measurement converter, and that the feedback-free measured value is then calculated from these.
    Type: Grant
    Filed: February 2, 2006
    Date of Patent: January 11, 2011
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventor: Thomas Reichel
  • Publication number: 20110001485
    Abstract: Energy management of an electronic device using multiple electric power sources. The electric power sources may include a parasitic electric power source, a rechargeable electric power source, an intermittent electric power source, and a continuous electric power source. The electronic device further may include a power supply for receiving the electric power from the source(s) and supplying electric power to the various components of the electronic device that require power. The electronic device may include a source selector for controlling which power source supplies electric power to the power supply. Energy management of the electronic device may be configured to use a permanently exhaustible power source such as a battery only when other power sources are unavailable.
    Type: Application
    Filed: July 6, 2009
    Publication date: January 6, 2011
    Inventors: Laurence V. Feight, Ryan W. Swartzendruber
  • Patent number: 7862944
    Abstract: An isolation fault detection system for detecting isolation faults in a fuel cell system associated with a fuel cell hybrid vehicle. The isolation fault detection system measures a stack voltage potential, a positive fuel cell voltage potential, a negative fuel cell voltage potential, a positive battery voltage potential, and an overall battery voltage potential. The isolation fault detection system then uses these voltage potentials in mesh equations to compare the measured voltage potentials to voltage potentials that would occur during a loss of isolation. In one embodiment, the isolation fault detection system uses these five measured voltage potentials to determine whether an isolation fault has occurred at four separate locations in the fuel cell hybrid vehicle. The system also can detect the location of the isolation fault.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: January 4, 2011
    Assignee: GM Global Technology Operations, Inc.
    Inventors: Hartmut Hinz, Steffen Doenitz
  • Patent number: 7863565
    Abstract: An electron beam inspection apparatus images reflected electrons and cancels negative charging derived from electron-beam irradiation. Ultraviolet rays are irradiated and an irradiated area of ultraviolet rays is displayed as a photoelectron image. The photoelectron image and a reflected-electron image are displayed on a monitor while being superposed on each other, to easily grasp the positional relationship between the images and the difference in size between them. Specifically, the shape of the irradiated area of an electron beam includes the shape of the irradiated area of ultraviolet rays on a display screen. The intensity of the ultraviolet rays in the irradiated area of the electron beam is adjusted while the reflected-electron imaging conditions for the reflected-electron image are sustained.
    Type: Grant
    Filed: May 2, 2008
    Date of Patent: January 4, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Masaki Hasegawa, Hiroya Ohta
  • Patent number: 7855563
    Abstract: A system is provided for detecting a fault in a signal transmission path. In one embodiment, the system can include a variable amplitude signal attenuator which is operable to modify an input signal by variably attenuating a signal voltage swing of the input signal. Desirably, the input signal is attenuated only when transitioning from a high signal voltage level towards a low signal voltage level d variably, such that a larger high-to-low signal voltage swing is attenuated more than a smaller high-to-low signal voltage swing. Desirably, a comparator, which may apply hysteresis to the output signals, may detect a crossing of a reference voltage level by the modified input signal. In this way, when the comparator does not detect an expected crossing of the reference voltage level by the modified input signal, a determination can be made that a fault exists in the signal transmission path.
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: December 21, 2010
    Assignee: International Business Machines Corporation
    Inventors: Huihao Xu, Louis L. Hsu, Kevin G. Kramer, James D. Rockrohr, Michael A. Sorna
  • Patent number: 7851758
    Abstract: In accordance with at least one embodiment of the present invention, a portable inspection system is disclosed to capture inspection data, such as for example an infrared image, sound information, and/or electrical measurement information. The inspection data may be securely recorded (e.g., with an encryption algorithm) along with associated information, which may include for example date, time, system settings, operator identification, and location.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: December 14, 2010
    Assignee: Flir Systems, Inc.
    Inventors: Tom Scanlon, James T. Woolaway, Robert P. Madding
  • Patent number: 7844873
    Abstract: A fault location estimation system includes single-fault-assumed diagnostic unit nodes; error-observation node basis candidate classification unit; inclusion fault candidate group selection unit; inter-pattern overlapping unit; and multiple-fault simulation checking unit.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: November 30, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Yukihisa Funatsu
  • Publication number: 20100295551
    Abstract: Method for nondestructive and noncontact detection of faults in a test piece, with a transmitter coil arrangement with at least one transmitter coil that transmits periodic electromagnetical AC fields to a test piece, a receiver coil arrangement with at least one receiver coil for detecting a periodic electrical signal having a carrier oscillation whose amplitude and/or phase is modulated by a fault in the test piece. A signal processing unit produces a useful signal from the receiver coil signal, and an evaluation unit evaluates the useful signal to detect a fault in the test piece. A self-test unit undertakes systematic quantitative checking of signal processing functions of the signal processing unit and/or of the transmitter coil arrangement and/or of the receiver coil arrangement and/or upon external request undertakes calibration of the signal processing unit using a calibration standard which replaces the transmitter coil arrangement and/or of the receiver coil arrangement.
    Type: Application
    Filed: May 20, 2010
    Publication date: November 25, 2010
    Applicant: PRUFTECHNIK DIETER BUSCH AG
    Inventor: Roland HÖLZL
  • Publication number: 20100289551
    Abstract: A method, device and computer program product for providing increased reliability in the processing of digital signals. The device includes a module for performing analog measurement of a received signal intended to occupy two logical states at various instances in time, a module for determining if there is a change in the analog signal level, a module for determining if the change fulfills at least one logical state change condition, wherein a first logical state change condition is based on the speed of change of the analog signal level, and a module for determining that there is a change from one logical state to the other if at least one logical state change condition is fulfilled. The invention provides secure detection of unreliable digital signals that may be generated in harsh environments that are polluted or moist.
    Type: Application
    Filed: June 4, 2008
    Publication date: November 18, 2010
    Applicant: ABB TECHNOLOGY AG
    Inventors: Hans Björklund, Krister Nyberg
  • Patent number: 7824930
    Abstract: A method of manufacturing a substrate formed with a plurality of wiring patterns on a base, includes: a first inspection step of identifying a faulty wiring pattern having electric short circuit or disconnection by performing an electric inspection respectively for the plurality of wiring patterns; a second inspection step of examining a relative position of a defect on the base and at least one of a type and a size of the defect by an optical inspection; a matching step of matching a result of the first inspection step with a result of the second inspection step, and identifying a critical defect having electric short circuit or disconnection; and a third inspection step of examining a relative position in a pixel and an effective range of the critical defect by an optical inspection.
    Type: Grant
    Filed: April 9, 2008
    Date of Patent: November 2, 2010
    Assignee: Sony Corporation
    Inventors: Ryo Koshiishi, Hideo Kawabe, Nobuhiko Mukai, Akiko Tsutsui
  • Patent number: 7817057
    Abstract: The present invention provides a remote alarm panel display for monitoring wrist-strap cords used by an operator to install components during the manufacturing of hard disk drives in order to provide grounding to the operator as the operator handles electrically sensitive components and also to provide mobility to the operator within the assembly floor. In one embodiment, the remote alarm panel display comprises a plurality of alarm indicators which are activated when a corresponding wrist strap is disconnected from a wrist strap monitoring device connected to the remote alarm panel display. In one embodiment the alarm indicators are light emitting diodes.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: October 19, 2010
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Napoleon B. Bumanlag, Roger Flores Galinggana, Jr., Lloyd Henry I. Li, Ray Nicanor M. Tag-At
  • Patent number: 7808246
    Abstract: An open seal check system for a multi-chamber supply container having at least one elongated seal, the system includes: (i) a base configured to support the multi chamber container; (ii) a plurality of electrodes positioned on the base so as to be at least substantially parallel with the elongated seal; and (iii) electronics connected to the electrodes, the electrodes each forming a capacitor with the multi-chamber supply container when the container is placed on the base, the electronics configured to output a single indication of a dielectric associated with each capacitor.
    Type: Grant
    Filed: July 5, 2007
    Date of Patent: October 5, 2010
    Assignees: Baxter International Inc., Baxter Healthcare S.A.
    Inventors: Katsuyoshi Sobue, Takeshi Nakajima, Atsushi Matsuzaki, Minoru Okuda
  • Publication number: 20100244848
    Abstract: In accordance with an aspect of the application, there is provided a system for testing, including a first chip, a second chip, and first and second connections. The first connection is configured to couple a first pin of the first chip to a first pin of the second chip, and to transmit an initial signal from the first chip to the second chip. The second connection is configured to couple a second pin of the first chip to a second pin of the second chip to return the signal as a returned signal to the first chip.
    Type: Application
    Filed: March 30, 2009
    Publication date: September 30, 2010
    Applicant: Infineon Technologies AG
    Inventors: Jens Barrenscheen, Harry Siebert
  • Patent number: 7804209
    Abstract: The invention relates to an arrangement for indicating a fault in an electrical machine having a stator and a rotor with an air gap between it and the stator. In order to detect impurities or similar objects entering the air gap, a means of supervision is arranged on the stator surface facing the rotor. The means of supervision is at least partially protruding from the stator surface, and the integrity of the included detection element, such as a copper wire, is established using a supervision circuit connected to the detection element.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: September 28, 2010
    Assignee: ABB Oy
    Inventors: Kari Olkanen, Jarkko Iisakkala, Jari Jäppinen
  • Patent number: 7802155
    Abstract: Systems and methods of manufacturing and testing non-volatile memory (NVM) devices are described. According to one exemplary embodiment, a function test during manufacturing of the NVM modules is conducted with a system comprises a computer and a NVM tester coupling to the computer via an external bus. The NVM tester comprises a plurality of slots. Each of the slots is configured to accommodate respective one of the NVM modules to be tested. The NVM tester is configured to include an input/output interface, a microcontroller with associated RAM and ROM, a data generator, an address generator, a comparator, a comparison status storage space, a test result indicator and a NVM module detector. The data generator generates a repeatable sequence of data bits as a test vector. The known test vector is written to NVM of the NVM module under test. The known test vector is then compared with the data retrieved from the NVM module.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: September 21, 2010
    Assignee: Super Talent Electronics, Inc.
    Inventors: Siew Sin Hiew, Charles C. Lee, I-Kang Yu, Abraham Chih-Kang Ma, Ming-Shiang Shen
  • Publication number: 20100198557
    Abstract: A sensor apparatus of the present invention is provided with a failure diagnosis circuit for setting as a failure diagnosis object section at least any one of a drive circuit section, a detection device, a detection circuit section and a processing circuit section, determining whether the failure diagnosis object section is normal or abnormal, and outputting a failure detection signal from a second output terminal in the case of determining abnormality. It is configured such that a signal of a value outside a range of a normal output voltage is outputted from the first output terminal in the case of the failure diagnosis circuit determining abnormality of the failure diagnosis object section, thereby to improve reliability under abnormal condition.
    Type: Application
    Filed: January 26, 2010
    Publication date: August 5, 2010
    Applicant: Panasonic Corporation
    Inventor: Takeshi Uemura