Making Device Or Circuit Emissive Of Nonelectrical Signal Patents (Class 438/22)
  • Patent number: 9640723
    Abstract: Various embodiments include methods of fabricating a semiconductor device that include forming a plurality of nanowires on a support, wherein each nanowire comprises a first conductivity type semiconductor core and a second conductivity type semiconductor shell over the core, forming an insulating material layer over at least a portion of the plurality of nanowires such that at least a portion of the insulating material layer provides a substantially planar top surface, removing a portion of the insulating material layer to define an active region of nanowires, and forming an electrical contact over the substantially planar top surface of the insulating material layer.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: May 2, 2017
    Assignee: GLO AB
    Inventor: Scott Brad Herner
  • Patent number: 9633983
    Abstract: Embodiments of the invention provide semiconductor chip stacking assemblies that provide direct attachment of a first semiconductor device with a second semiconductor device. An assembly comprises a first semiconductor chip that has a first and a second set of electrical interconnect regions disposed on its surface and a second semiconductor chip. The first set of electrical interconnect regions are electrically connected with the electrical interconnect regions of a second semiconductor chip, and the second set of electrical interconnect regions are electrically interconnected with the substrate. Direct electrical connections are for example, silicon photonics device-to-driver or device-to-signal converters, logic-to-memory, memory-to-memory, and logic-to-logic chip interconnections.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: April 25, 2017
    Assignee: Intel Corporation
    Inventor: Qing Tan
  • Patent number: 9632636
    Abstract: The present invention provides a manufacture method of a touch panel, comprising: step 1, forming a black matrix (2) on one side (11) of a color filter substrate (1); the black matrix (2) is positioned corresponding to a sensor pattern to be set to form gaps at portions of the black matrix (2) corresponding to the sensor pattern to be set; step 2, deposing a conductive film (3) on the other side (13) of the color filter substrate (1); step 3, coating photoresistor (4) on the conductive film (3); step 4, employing the black matrix (2) as a mask to implement exposure process and development process to the photoresistor (4) from the one side (11) of the color filter substrate (1) formed with the black matrix (2); step 5, implementing etching to the conductive film (3) by utilizing the photoresistor (4?) remained after the development to obtain the sensor pattern (3?) to be set; step 6, forming a protective layer (5) on the color filter substrate (1) and the sensor pattern (3?).
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: April 25, 2017
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventor: Jun Wang
  • Patent number: 9634057
    Abstract: A solid-state radiation detector comprising a photosensitive sensor comprises photosensitive elements that are organized in a matrix, and a light generator whose purpose is to optically wipe the photosensitive elements. The light generator comprises: an electroluminescent layer that is distributed over the surface of the sensor; at least one electrode that continuously covers the electroluminescent layer and in which electrons may flow, the light emitted by the electroluminescent layer being capable of passing through the electrode; and additional electrical conductors that are in electrical contact with the electrode, the additional electrical conductors forming branches that extend over the surface of the electrode, and being spatially distributed across the surface of the electrode.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: April 25, 2017
    Assignee: TRIXELL
    Inventors: Benoit Racine, Robert Neyret, Bruno Commere
  • Patent number: 9614124
    Abstract: A substrate having an annealed AlN layer includes a substrate made of a material selected from among a group including sapphire, silicon carbide (SiC), and aluminum nitride (AlN), and an aluminum nitride (AlN) layer formed on the substrate and having a thickness of 100 nm or greater. The aluminum nitride layer is annealed at a prescribed annealing temperature and in a nitrogen/carbon monoxide (N2/CO) mixed gas atmosphere, and the nitrogen/carbon monoxide (N2/CO) mixed gas has a mixture ratio of N2 gas/CO gas in a range of 0.95/0.05 to 0.4/0.6.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: April 4, 2017
    Assignees: TOHOKU UNIVERSITY, MIE UNIVERSITY
    Inventors: Hiroyuki Fukuyama, Hideto Miyake
  • Patent number: 9601541
    Abstract: An improvement is achieved in the performance of a semiconductor device. In a method of manufacturing the semiconductor device, in an n-type semiconductor substrate, a p-type well as a p-type semiconductor region forming a part of a photodiode is formed and a gate electrode of a transfer transistor is formed. Then, after an n-type well as an n-type semiconductor region forming the other part of the photodiode is formed, a microwave is applied to the semiconductor substrate to heat the semiconductor substrate. Thereafter, a drain region of the transfer transistor is formed.
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: March 21, 2017
    Assignee: Renesas Electronics Corporation
    Inventor: Tadashi Yamaguchi
  • Patent number: 9595647
    Abstract: Provided is a light emitting device, which includes a second conductive type semiconductor layer, an active layer, a first conductive type semiconductor layer, and a intermediate refraction layer. The active layer is disposed on the second conductive type semiconductor layer. The first conductive type semiconductor layer is disposed on the active layer. The intermediate refraction layer is disposed on the first conductive type semiconductor layer. The intermediate refraction layer has a refractivity that is smaller than that of the first conductive type semiconductor layer and is greater than that of air.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: March 14, 2017
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Hyo Kun Son
  • Patent number: 9590198
    Abstract: Provided are an integrated conductive substrate simultaneously serving as a substrate and an electrode, and an electronic device using the same. The integrated conductive substrate includes a conductive layer containing iron, which has a first surface having a first root mean square roughness, and a semiconductor layer containing a semiconductor material, which has a second surface having a second root mean square roughness and is formed on the first surface. Here, the semiconductor layer includes a semiconductor-type planarization layer formed by a solution process using at least one of the semiconductor material and a precursor of the semiconductor material to planarize the first surface of the conductive layer, and the second root mean square roughness is smaller than the first root mean square roughness.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: March 7, 2017
    Assignee: POSTECH ACADEMY—INDUSTRY FOUNDATION
    Inventors: TaeWoo Lee, YoungHoon Kim
  • Patent number: 9583353
    Abstract: Conductivity-selective lateral etching of III-nitride materials is described. Methods and structures for making vertical cavity surface emitting lasers with distributed Bragg reflectors via electrochemical etching are described. Layer-selective, lateral electrochemical etching of multi-layer stacks is employed to form semiconductor/air DBR structures adjacent active multiple quantum well regions of the lasers. The electrochemical etching techniques are suitable for high-volume production of lasers and other III-nitride devices, such as lasers, HEMT transistors, power transistors, MEMs structures, and LEDs.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: February 28, 2017
    Assignee: Yale University
    Inventor: Jung Han
  • Patent number: 9577155
    Abstract: A light emitting device includes at least one layer below or above a reflective layer to prevent delamination of the reflective layer from a layer below and/or above the reflective layer.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: February 21, 2017
    Assignee: LG Innotek Co., Ltd.
    Inventor: Seok Beom Choi
  • Patent number: 9570714
    Abstract: An organic layer deposition assembly, an organic layer deposition apparatus, an organic light-emitting display apparatus, and a method of manufacturing the organic light-emitting display apparatus, in order to improve a characteristic of a deposited layer, the organic layer deposition assembly including a deposition source for discharging a deposition material; a deposition source nozzle unit disposed at a side of the deposition source, and including a plurality of deposition source nozzles; and a patterning slit sheet disposed while facing the deposition source nozzle unit, and including a plurality of patterning slits and one or more alignment confirmation pattern slits that are formed at edge portions of the plurality of patterning slits, wherein the deposition material that is discharged from the deposition source passes through the patterning slit sheet and then is formed on the substrate, while a deposition process is performed.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: February 14, 2017
    Assignee: Samsung Display Co., Ltd
    Inventors: Myung-Ki Lee, Sung-Bong Lee, Dong-Seob Jeong, Mu-Hyun Kim
  • Patent number: 9537049
    Abstract: There is provided a nanostructure semiconductor light emitting device may including: a base layer formed of a first conductivity-type semiconductor, an insulating layer formed on an upper surface of the base layer and including a first region having a plurality of openings and a plurality of second regions positioned in the plurality of openings and spaced apart from the first region, dielectric nanocores disposed in the plurality of second regions, and a plurality of light emitting nanostructures each including a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer sequentially disposed on the dielectric nanocores.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: January 3, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Kyung Wook Hwang
  • Patent number: 9530950
    Abstract: A manufacturing method of a flip-chip nitride semiconductor light emitting element includes a step of providing a nitride semiconductor light emitting element structure; a protective layer forming step; a first resist pattern forming step; a protective layer etching step; a first metal layer forming step; a first resist pattern removing step; a third metal layer forming step; a second resist pattern forming step; a second metal layer forming step; a second resist pattern removing step; and a third metal layer removing step.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: December 27, 2016
    Assignee: NICHIA CORPORATION
    Inventors: Akinori Yoneda, Hirofumi Kawaguchi, Kouichiroh Deguchi
  • Patent number: 9516742
    Abstract: The present invention discloses an electric device, which comprises at least one transparent/semi-transparent substrate; a plurality of electric conduction elements arranged on at least one of two opposite surfaces and a lateral surface of the transparent/semi-transparent substrate; and at least one module arranged on the transparent/semi-transparent substrate and electrically connected with the electric connection units. The present invention also discloses an electric device, which comprises a plurality of transparent/semi-transparent substrates; a plurality of electric conduction elements selectively arranged on the transparent/semi-transparent substrates; and a plurality of modules arranged on outer surfaces of the transparent/semi-transparent substrates or interposed between the transparent/semi-transparent substrates, and electrically connected with the electric conduction elements. The electric device has electric functions and features transparency esthetics.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: December 6, 2016
    Assignee: POLYTRON TECHNOLOGIES, INC.
    Inventor: Sam Yu
  • Patent number: 9490392
    Abstract: A light emitting diode (LED) comprises an n-type Group III-V semiconductor layer, an active layer adjacent to the n-type Group III-V semiconductor layer, and a p-type Group III-V semiconductor layer adjacent to the active layer. The active layer includes one or more V-pits. A portion of the p-type Group III-V semiconductor layer is in the V-pits. A p-type dopant injection layer provided during the formation of the p-type Group III-V layer aids in providing a predetermined concentration, distribution and/or uniformity of the p-type dopant in the V-pits.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: November 8, 2016
    Assignee: Toshiba Corporation
    Inventor: Steve Ting
  • Patent number: 9472137
    Abstract: An organic light emitting display device includes a substrate including a display area on which a plurality of pixels are formed and a non-display area surrounding the display area; a first power line positioned on a lower non-display area; an auxiliary power line positioned on an upper non-display area; a first power supply supplying a first voltage to the first power line; and an auxiliary power supply supplying an auxiliary voltage to the auxiliary power line. Accordingly, it is possible to provide an organic light emitting display device capable of equalizing luminance by minimizing a variation in power supplied to each pixel.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: October 18, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventor: Jeong-Keun Ahn
  • Patent number: 9450144
    Abstract: An improved method to produce artificial light for plant cultivation, an illumination device with a semiconductor light emission solution and device suited for plant cultivation in a greenhouse environment are described. The best mode is considered to be a lighting device with binary alloy quantum dots (110, 120, 130, 140, 150, 160) made by colloidal methods to produce a size distribution of quantum dots that produces an emission spectrum similar to the photosynthetically active radiation (PAR) spectrum. The methods and arrangements allow more precise spectral tuning of the emission spectrum for lights used in plant (310, 311) cultivation. Therefore unexpected improvements in the photomorphogenetic control of plant growth, and further improvements in plant production are realized.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: September 20, 2016
    Assignee: VALOYA OY
    Inventors: Lars Aikala, Ilkka Kivimaki
  • Patent number: 9450122
    Abstract: Example embodiments relate to a lateral type photodiode including a substrate, an insulation mask layer formed on the substrate, and a first type semiconductor layer, an active layer, and a second type semiconductor layer that contact a surface of the insulation mask layer and that are sequentially disposed in a direction substantially parallel to the surface of the insulation mask layer. The insulation mask layer includes a through hole, and the first type semiconductor layer, the active layer, and the second type semiconductor layer are sequentially formed from the through hole by using a lateral overgrowth method.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: September 20, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jihoon Ahn, Yongwoo Jeon, Jungwoo Kim, Haeseok Park, Seungeon Ahn, Seunghyup Lee, Myounghoon Jung, Hyuksoon Choi
  • Patent number: 9449815
    Abstract: Exemplary embodiments of the present invention relate to a method of growing gallium nitride-based semiconductor layers through metal-organic chemical vapor deposition, including disposing a substrate in a chamber, growing a first conductivity-type gallium nitride-based semiconductor layer on the substrate at a first chamber pressure, growing a gallium nitride-based active layer on the first conductivity-type gallium nitride-based semiconductor layer at a second chamber pressure higher than the first chamber pressure, and growing a second conductivity-type gallium nitride-based semiconductor layer on the active layer at a third chamber pressure lower than the second chamber pressure.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: September 20, 2016
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Seung Kyu Choi, Woo Chul Kwak, Chae Hon Kim, Jung Whan Jung
  • Patent number: 9425334
    Abstract: A picosecond laser beam shaping assembly is disclosed for shaping a picosecond laser beam for use in patterning (e.g., scribing) semiconductor devices. The assembly comprises a pulsed fibre laser source of picosecond laser pulses, a harmonic conversion element for converting laser pulses at a first laser wavelength having a first spectral bandwidth to laser pulses at a second laser wavelength having a second spectral bandwidth, and a beam shaping apparatus for shaping the laser beam at the second laser wavelength, the beam shaping apparatus having a spectral bandwidth that substantially corresponds to the second spectral bandwidth so as to produce a laser beam having a substantially rectangular cross-sectional profile.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: August 23, 2016
    Assignee: Fianium Ltd
    Inventors: Brian W. Baird, Timothy D. Gerke
  • Patent number: 9416778
    Abstract: A self-gettering differential pump for a molecular beam epitaxy system has a collimator with a length greater than its diameter mounted in front of a source in extended port geometry, wherein the reactant delivered by the source also serves as a gettering agent.
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: August 16, 2016
    Assignee: RUTGERS, THE STATE UNIVERSITY OF NEW JERSEY
    Inventors: Seongshik Oh, Yong-Seung Kim
  • Patent number: 9412909
    Abstract: A manufacturing method is a method for manufacturing a light emitting apparatus including a translucent substrate, and a light emitting section and an optical filer section that are arranged in a first region of the substrate when viewed in a normal direction of a first surface of the substrate. The manufacturing method includes: forming a dielectric multilayer film over the first region of the substrate; forming a first electrode on the dielectric multilayer film included in the light emitting section; forming a functional layer with a light emitting layer over the first electrode and the dielectric multilayer film included in the optical filter section; and forming a second electrode having semi-transmissive reflectivity on the functional layer over the first region of the substrate.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: August 9, 2016
    Assignee: Seiko Epson Corporation
    Inventors: Tetsuji Fujita, Hidetoshi Yamamoto, Hideto Ishiguro, Tsukasa Eguchi
  • Patent number: 9406850
    Abstract: A substrate including phosphor is remotely illuminated by an LED. Optical radiation that emerges through the substrate is measured. Portions of the substrate, such as raised features on the substrate, are then selectively removed responsive to the measuring, so as to obtain a desired optical radiation. In removing portions of the substrate, holes may be drilled through the substrate to provide a separate path for light from the LED that does not pass through the phosphor. Alternatively, a separate LED may be provided outside the dome.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: August 2, 2016
    Assignee: Cree, Inc.
    Inventor: Gerald H. Negley
  • Patent number: 9406805
    Abstract: A Fin-FET and a method of forming the Fin-FET are provided. A substrate is provided, and then a mask layer is formed thereabove. A first trench is formed in the substrate and the mask layer. A semiconductor layer is formed in the first trench. Next, the mask layer is removed such that the semi-conductive layer becomes a fin structure embedded in the substrate and protruded above the substrate. Finally, a gate layer is formed on the fin structure.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: August 2, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chen-Hua Tsai, Rai-Min Huang, Sheng-Huei Dai, Chun-Hsien Lin
  • Patent number: 9391300
    Abstract: A method of producing a transparent diffusive OLED substrate includes lapping one face or both faces of a flat translucent glass substrate with an abrasive slurry, so as to obtain a flat glass substrate with at least one roughened surface having a roughness profile with an arithmetical mean deviation Ra of between 0.1 ?m and 2.0 ?m; coating the roughened surface or one of the roughened surfaces with a high index glass frit having a refractive index of at least 1.7, the amount of the high index glass frit being sufficient to completely cover the roughness profile of the roughened surface after melting of the frit, and heating the coated substrate to a temperature above the melting temperature of the high index glass frit and below the softening temperature of the underlying substrate, so as to form high index enamel on one of the roughened surfaces.
    Type: Grant
    Filed: September 24, 2013
    Date of Patent: July 12, 2016
    Assignee: SAINT-GOBAIN GLASS FRANCE
    Inventors: Yechun Zhou, Young Seong Lee, Jean Philippe Schweitzer, Vincent Sauvinet
  • Patent number: 9353459
    Abstract: According to an embodiment of the present invention, provided is a method of synthesizing nanowires that includes the following steps of: disposing a covering inside a reaction furnace such that the covering is spaced apart by a predetermined gap from a substrate which is provided for synthesis of nanowires; heating the reaction furnace; and synthesizing nanowires by allowing a source gas to be deposited on the substrate while flowing through the gap between the substrate and the covering.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: May 31, 2016
    Assignee: INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Doo Jin Choi, YooYoul Choi
  • Patent number: 9356196
    Abstract: A method of manufacturing a semiconductor light emitting element includes providing a semiconductor stacked layer body; forming an insulating layer on a portion of the semiconductor stacked layer body; forming a light-transmissive electrode covering an upper surface of the semiconductor stacked layer body and an upper surface of the insulating layer, and on a region at least partially overlapping a region for disposing an extending portion in a plan view; forming a light reflecting layer in each of the openings of the light-transmissive electrode; forming a protective layer on a main surface side of the semiconductor stacked layer body; forming a mask on an upper surface of the protective layer except for the region for forming the pad electrode; etching the protective layer to form an opening in the protective layer; and forming a pad electrode in the opening of the protective layer.
    Type: Grant
    Filed: July 17, 2015
    Date of Patent: May 31, 2016
    Assignee: NICHIA CORPORATION
    Inventors: Shun Kitahama, Keiji Emura, Shinichi Daikoku
  • Patent number: 9354390
    Abstract: A semiconductor device includes a substrate, a trench in the substrate, the trench having an inclined sidewall, a reflective layer over the inclined sidewall, a grating structure over the substrate, and a waveguide in the trench. The waveguide is configured to guide optical signals between the grating structure and the reflective layer.
    Type: Grant
    Filed: December 11, 2013
    Date of Patent: May 31, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ying-Hao Kuo, Tien-Yu Huang
  • Patent number: 9348440
    Abstract: A touch screen device for a portable terminal includes an Indium Tin Oxide (ITO) film providing a touch screen feature; a light guide film attached onto one surface of the ITO film; and a light emitting device attached onto one surface of the ITO film and disposed in one side of the light guide film, wherein light output from the light emitting device provides lighting to an area where the light guide film is attached, while passing through the light guide film, and wherein the light guide film and the light emitting device are installed on the ITO film by a surface mounting process, thus reducing manufacturing costs and making it possible to secure more space capable of mounting other parts which in turn contribute in miniaturizing portable terminals.
    Type: Grant
    Filed: January 7, 2013
    Date of Patent: May 24, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-In Baek, Min-Sung Lee
  • Patent number: 9349963
    Abstract: A photoelectric conversion material is provided and includes an organic material having an absorbing coefficient of about 1.5Ă—105 (cm?1) or more and that is represented by the following formula (1). In the formula (1), each of R1 to R20, and each of X1 to X8 is one of a hydrogen atom and a substituent.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: May 24, 2016
    Assignee: SONY CORPORATION
    Inventors: Masaki Murata, Ayumi Nihei
  • Patent number: 9333531
    Abstract: A thin-film optoelectric device is disclosed comprising a functional layer structure (30) enclosed between a first barrier layer structure (20) and a second barrier layer structure (40), the device having an open, electrically interconnected conductive structure (10) that is embedded within the first barrier layer structure (20), that comprises at least one elongated element (12a, 12b, 12c) of a metal that laterally extends within the barrier layer structure (20), and that is arranged against the functional layer structure (30), the electrically interconnected conductive structure (10) having a laterally facing, processed surface embedded in the first barrier layer (20).
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: May 10, 2016
    Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderzoek TNO
    Inventors: Chia-Chen Fan, Joanne Sarah Wilson, Antonius Maria Bernardus Van Mol, Stephan Harkema
  • Patent number: 9324742
    Abstract: Embodiments of the invention provide an array substrate comprising a plurality of pixel units, each of the pixel units including a first display electrode, a second display electrode and an insulating portion, wherein, the insulating portion comprises a plurality of first via holes; the first display electrode is disposed at a surface of the insulating portion, and the second display electrode is disposed at bottom surfaces of the first via holes. Embodiments of the invention further provide a method for manufacturing the array substrate.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: April 26, 2016
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Bin Feng, Hongtao Lin, Zhangtao Wang, Xibin Shao
  • Patent number: 9312452
    Abstract: A method for producing at least one conversion lamina for a radiation-emitting semiconductor component is specified. A base material including a conversion substance contained therein is applied to a substrate by means of a double-layered stencil. Furthermore, a conversion lamina for a radiation-emitting semiconductor component includes a base material and a conversion substance embedded therein. The thickness of the conversion lamina is in a range of between 60 ?m and 170 ?m inclusive.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: April 12, 2016
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventor: Markus Richter
  • Patent number: 9309124
    Abstract: Methods of forming graphene by graphite exfoliation, wherein the methods include: providing a graphite sample having atomic layers of carbon; introducing a salt and a solvent into the space between the atomic layers; expanding the space between the atomic layers using organic molecules and ions from the solvent and the salt; and separating the atomic layers using a driving force to form one or more sheets of graphene; the graphene produced by the methods can be used to form solar cells, to perform DNA analysis, and for other electrical, optical and biological applications.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: April 12, 2016
    Assignee: National University of Singapore
    Inventors: Kian Ping Loh, Junzhong Wang
  • Patent number: 9305122
    Abstract: A computationally efficient method for building a superlattice structure that improves an optoelectronic device performance characteristic that depends on fundamental superlattice material properties such as absorption coefficient ?(?), radiative efficiency Rsp and/or electron density n.
    Type: Grant
    Filed: February 6, 2015
    Date of Patent: April 5, 2016
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Igor Vurgaftman, Jerry R. Meyer, Chaffra Affouda, Matthew P. Lumb, Edward H. Aifer
  • Patent number: 9300062
    Abstract: Attachment devices and methods for use with light emitting devices are provided. In one aspect, the light emitting device can include a submount and a light emission area disposed over the submount. The device can further include at least one attachment member provided on the submount. The attachment member can engage an electrical component thereby providing a gas-tight, solder free connection between the attachment member and electrical component.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: March 29, 2016
    Assignee: Cree, Inc.
    Inventors: Christopher P. Hussell, Kurt S. Wilcox, Peter Scott Andrews, Jesse Colin Reiherzer
  • Patent number: 9299885
    Abstract: The invention provides a light-emitting diode, a light-emitting diode lamp, and an illumination device which emit infrared light with both high-speed response and high output performance. The invention relates to a light-emitting diode including a light-emitting portion which has an active layer of a quantum well structure, in which a well layer made of a compound semiconductor having a composition formula (InX1Ga1-X1)As (0?X1?1) and a barrier layer made of a compound semiconductor having a composition formula (AlX2Ga1-X2)As (0?X2?1) are alternately laminated, and a first clad layer and a second clad layer sandwiching the active layer, an electric current diffusion layer which is formed on the light-emitting portion, and a functional substrate which is bonded to the electric current diffusion layer, a light-emitting diode lamp, and an illumination device.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: March 29, 2016
    Assignee: SHOWA DENKO K.K.
    Inventor: Noriyuki Aihara
  • Patent number: 9299881
    Abstract: A light emitting device comprises a first layer of an n-type semiconductor material, a second layer of a p-type semiconductor material, and an active layer between the first layer and the second layer. A light coupling layer is disposed adjacent to one of the first layer and the second layer. In some cases, the light coupling layer is formed by roughening a buffer layer of the light emitting device. The light emitting device includes an electrode in electrical communication with one of the first layer and the second layer through a portion of the light coupling layer.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: March 29, 2016
    Assignee: Kabishiki Kaisha Toshiba
    Inventors: Li Yan, Chao-Kun Lin, Chih-Wei Chuang
  • Patent number: 9293427
    Abstract: A semiconductor device includes an antenna functioning as a coil, a capacitor electrically connected to the antenna in parallel, a passive element forming a resonance circuit with the antenna and the capacitor by being electrically connected to the antenna and the capacitor in parallel, a first field effect transistor controlling whether the passive element is electrically connected to the antenna and the capacitor in parallel or not, and a memory circuit. The memory circuit includes a second field effect transistor which includes an oxide semiconductor layer where a channel is formed and in which a data signal is input to one of a source and a drain. The gate voltage of the first field effect transistor is set depending on the voltage of the other of the source and the drain of the second field effect transistor.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: March 22, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Seiichi Yoneda
  • Patent number: 9281443
    Abstract: The application provides a light-emitting diode array, including: a first light-emitting diode including a first area; a second area; a first isolation path between the first area and the second area, and the first isolation path including an electrode isolation layer; and an electrode contact layer covering the first area; a second light-emitting diode including a semiconductor stack layer; and a second electrical bonding pad on the semiconductor stack layer; and a second isolation path between the first light-emitting diode and the second light-emitting diode, wherein the second isolation path includes an electrical connecting structure electrically connected to the first light-emitting diode and the second light-emitting diode.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: March 8, 2016
    Assignee: EPISTAR CORPORATION
    Inventors: Tsung-Hsien Yang, Han-Min Wu, Jhih-Sian Wang, Yi-Ming Chen, Tzu-Ghieh Hsu
  • Patent number: 9281346
    Abstract: A display device includes an array substrate including a display area and a non-display area, a driving circuit chip disposed on the non-display area and including a bottom surface, a top surface, a first pair of side surfaces extending in a first direction, and a second pair of side surfaces extending in a second direction perpendicular to the first direction, and first, second, and dummy bumps, each disposed on the bottom surface in a single column along the first direction, in which the dummy bumps include first and second dummy bump groups disposed between the first and second bumps along the first direction, the dummy bumps in the first dummy bump group are spaced apart from each other by a first pitch, and the dummy bumps in the second dummy bump group are spaced apart from each other by a second pitch different from the first pitch.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: March 8, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sang Urn Lim, Jong Hwan Kim
  • Patent number: 9281452
    Abstract: The present invention relates to a method for manufacturing an optical device, and to an optical device manufactured thereby, which involve using a substrate itself as a heat-dissipating plate, and adopting a substrate with vertical insulation layers formed thereon, such that electrode terminals do not have to be extruded out from a sealed space, and thus enabling the overall structure and manufacturing process for an optical device to be simplified.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: March 8, 2016
    Assignee: Point Engineering Co., Ltd.
    Inventors: Ki Myung Nam, Seung Ho Park, Tae Hwan Song
  • Patent number: 9276070
    Abstract: Methods of forming ternary III-nitride materials include epitaxially growing ternary III-nitride material on a substrate in a chamber. The epitaxial growth includes providing a precursor gas mixture within the chamber that includes a relatively high ratio of a partial pressure of a nitrogen precursor to a partial pressure of one or more Group III precursors in the chamber. Due at least in part to the relatively high ratio, a layer of ternary III-nitride material may be grown to a high final thickness with small V-pit defects therein. Semiconductor structures including such ternary III-nitride material layers are fabricated using such methods.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: March 1, 2016
    Assignee: Soitec
    Inventors: Christophe Figuet, Pierre Tomasini
  • Patent number: 9269927
    Abstract: A method of forming a layer of an electronic device, for example an organic light-emitting device, the method comprising the step of depositing a precursor layer comprising a compound of formula (I) and reacting the compound of formula (I) in a ring-opening addition reaction: Core-(Reactive Group)n??(I) wherein Core is a non-polymeric core group; and each Reactive Group, which may be the same or different in each occurrence, is a group of formula (II): wherein Sp1 independently in each occurrence represents a spacer group; w independently in each occurrence is 0 or 1; Ar in each occurrence independently represents an aryl or heteroaryl group; R1 in each occurrence independently represents H or a substituent, with the proviso that at least one R1 is a substituent; n is at least 1; and * is a point of attachment of the group of formula (II) to the Core; and wherein the compound of formula (I) reacts with itself or with a non-polymeric co-reactant.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: February 23, 2016
    Assignees: Cambridge Display Technology, Ltd., Sumitomo Chemical Company Limited
    Inventors: Martin Humphries, Florence Bourcet
  • Patent number: 9257492
    Abstract: Various embodiments may relate to a method for producing a passive electronic component, including forming a first electrically conductive layer on a substrate, forming a second electrically conductive layer on the first electrically conductive layer, forming a first trench in the first and second electrically conductive layers such that the substrate is exposed in the first trench, wherein the first trench separates a first contact region from a second contact region, applying a dielectric in a structured fashion to the second electrically conductive layer in the first contact region and at least partly to the substrate in the first trench such that the dielectric electrically insulates the first contact region from the second contact region, and applying an electrically conductive electrode layer in a structured fashion to the dielectric above the first contact region and to the second contact region.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: February 9, 2016
    Assignee: OSRAM OLED GmbH
    Inventor: Andrew Ingle
  • Patent number: 9252562
    Abstract: A surface emitting semiconductor laser includes a substrate, a first conductivity-type first semiconductor multilayer reflector, an active layer, a semiconductor layer, a second conductivity-type second semiconductor multilayer reflector that includes a current confinement layer, and a heat dissipating metal member. At least the first semiconductor multilayer reflector, the active layer, the semiconductor layer, and the second semiconductor multilayer reflector are stacked in this order on the substrate. A columnar structure having a top portion, a side surface, and a bottom portion is formed from the second semiconductor multilayer reflector to the semiconductor layer. The heat dissipating metal member is connected to the semiconductor layer exposed at the bottom portion of the columnar structure.
    Type: Grant
    Filed: May 12, 2014
    Date of Patent: February 2, 2016
    Assignee: FUJI XEROX CO., LTD.
    Inventors: Junichiro Hayakawa, Kazutaka Takeda, Akemi Murakami
  • Patent number: 9246306
    Abstract: A semiconductor laser element includes a substrate; a semiconductor layer formed on a front surface of the substrate; a first electrode formed on a back surface of the substrate; a second electrode formed on a front surface of the semiconductor layer; and at least one mark configured to allow reading of predetermined information, the at least one mark being formed in at least one of (i) a position on the surface on which the first electrode is formed, spaced apart from the first electrode and (ii) a position on the surface on which the second electrode is formed, spaced apart from the second electrode. The at least one mark is made of a metal material and has a thickness smaller than a thickness of the electrode that is formed on the surface on which the at least one mark is formed.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: January 26, 2016
    Assignee: NICHIA CORPORATION
    Inventors: Atsushi Tanaka, Mitsuhiro Nonaka
  • Patent number: 9239424
    Abstract: A semiconductor device for use in an optical application and a method for fabricating the device. The device includes: an optically passive aspect that is operable in a substantially optically passive mode; and an optically active material having a material that is operable in a substantially optically active mode, wherein the optically passive aspect is patterned to include a photonic structure with a predefined structure, and the optically active material is formed in the predefined structure so as to be substantially self-aligned in a lateral plane with the optically passive aspect.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: January 19, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Lukas Czornomaz, Jens Hofrichter, Mirja Richter, Heike E Riel
  • Patent number: 9234633
    Abstract: The present invention provides a method for manufacturing an LED light bar and an LED light bar thereof. The method includes (1) providing a metal substrate (20) and a plurality of LED lights (40); (2) forming a graphene layer (60) on the metal substrate (20) in such a way that the graphene layer (60) includes hollow sections (62) formed to correspond to the LED lights (40); (3) mounting the LED lights (40) to the metal substrate (20) in the hollow sections (62); and (4) forming silicone layers (80) in the hollow sections (62). The method for manufacturing the LED light bar and the LED light bar thereof according to the present invention use a graphene layer formed on a metal substrate and use silicone layers for planarization and heat transfer so as to effectively enhance heat dissipation performance of the LED light bar and extend lifespan of the LED light bar.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: January 12, 2016
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventors: Changcheng Lo, Chong Huang, Yewen Wang
  • Patent number: 9236536
    Abstract: A silicone protective coating for an electronic light source and a method for applying the coating over an exposed or outer surface of the electronic light source assembled as part of or mounted to a circuit board or other substrate.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: January 12, 2016
    Assignee: Shat-R-Shield, Inc.
    Inventors: Robert J. Nolan, Jeffery D. Harman, Sr.