Making Device Or Circuit Emissive Of Nonelectrical Signal Patents (Class 438/22)
  • Patent number: 8993360
    Abstract: A deposition apparatus for depositing a deposition material on a substrate in order to improve characteristics of a deposition layer includes: a deposition source facing the substrate and ejecting the deposition material; a patterning slit sheet including patterning slits for depositing the deposition material in a desired pattern and disposed to face the substrate; a frame coupled to the patterning slit sheet; and a stage bonded to the frame to support the frame, wherein a separation area is formed between the frame and the stage.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: March 31, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Woon-Hyun Choi, Kyung-Han Kim, Myong-Hwan Choi, Kyoung-Won Oh
  • Patent number: 8994040
    Abstract: A method of producing an optoelectronic component including providing an epitaxially grown layer sequence on a growth substrate, which comprises a suitable layer for light emission; applying a metal layer to the epitaxially grown layer sequence; applying a molding support to the metal layer, the molding support including a support material with a first coefficient of thermal expansion and a fiber mesh with a second coefficient of thermal expansion functionally bonded to the support material; and detaching the growth substrate.
    Type: Grant
    Filed: December 5, 2011
    Date of Patent: March 31, 2015
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Gudrun Lindberg
  • Patent number: 8993370
    Abstract: In one embodiment, a method includes depositing a photoactive layer onto a first substrate, depositing a contact layer onto the photoactive layer, attaching a second substrate onto the contact layer, and removing the first substrate from the photoactive layer, contact layer, and second substrate.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: March 31, 2015
    Assignee: Zetta Research and Development LLC—AQT Series
    Inventors: Mariana Rodica Munteanu, Amith Kumar Murali, Kirk Hayes, Brian Josef Bartholomeusz
  • Patent number: 8994037
    Abstract: Integrated optical waveguides and methods for the production thereof which have a patterned upper cladding with a defined opening to allow at least one side or at least one end of a light transmissive element to be air clad. The at least one side or at least one end is, for preference, a lens structure unitary with the waveguide or a bend. Also provided is a method of fabricating an optical waveguide with a patterned cladding.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: March 31, 2015
    Assignee: Zetta Research and Development LLC-RPO Series
    Inventors: Ian Andrew Maxwell, Dax Kukulj, Robert Bruce Charters
  • Patent number: 8993358
    Abstract: A method for depositing a layer of phosphor-containing material on a plurality of LED dies includes disposing a template with a plurality of openings on an adhesive tape and disposing each of a plurality of LED dies in one of the plurality of openings of the template. The method also includes disposing a stencil over the template and the plurality of LED dies. The stencil has a plurality of openings configured to expose a top surface of each of the LED dies. Next, a phosphor-containing material is disposed on the exposed top surface of each the LED dies. The method further includes removing the stencil and the template.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: March 31, 2015
    Assignee: LedEngin, Inc.
    Inventors: Zequn Mei, Xiantao Yan
  • Patent number: 8994054
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structural body, a first electrode, a second electrode, a third electrode, and a fourth electrode. The stacked structural body includes a first semiconductor layer, a second semiconductor layer, and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer. The first electrode is electrically connected to the first semiconductor layer. The second electrode forms an ohmic contact with the second semiconductor layer. The second electrode is translucent to light emitted from the light emitting layer. The third electrode penetrates through the second electrode and is electrically connected to the second electrode to form Shottky contact with the second semiconductor layer. The third electrode is disposed between the fourth electrode and the second semiconductor layer.
    Type: Grant
    Filed: August 2, 2011
    Date of Patent: March 31, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiji Muramoto, Shinya Nunoue, Toshiyuki Oka
  • Publication number: 20150083991
    Abstract: A white light quantum dot complex particle, comprising a seed particle (1) in the core, and a first shell layer (2), a second shell layer (3) and a third shell layer (4) wrapped around the seed particle (1) in order; in the first shell layer (2), the second shell layer (3) and the third shell layer (4) are one of a red light quantum dot layer, a green light quantum dot layer and a blue light quantum dot layer respectively, and are different from one another. Also disclosed is the process for preparing the white light quantum dot complex particle.
    Type: Application
    Filed: November 14, 2013
    Publication date: March 26, 2015
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chen Tang, Jingxia Gu, Xuelan Wang
  • Publication number: 20150087096
    Abstract: A method of manufacturing a semiconductor light emitting device is performed on a light emitting structure including a sequential stack of a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer. The second conductivity-type semiconductor layer and the active layer are mesa-etched to expose a portion of the first conductivity-type semiconductor layer therethrough. A conductive layer is formed on the second conductivity-type semiconductor layer and the portion of the first conductivity-type semiconductor layer exposed by mesa-etching. In turn, the conductive layer is dry etched such that an upper surface of the first conductivity-type semiconductor layer is partially etched to have uneven portions formed thereon. The resulting semiconductor light emitting device has improved external light extraction efficiency while being easily manufactured.
    Type: Application
    Filed: May 22, 2014
    Publication date: March 26, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Ho HAN, Myeong Ha KIM
  • Publication number: 20150084069
    Abstract: According to one embodiment, a semiconductor light emitting element includes an n-type semiconductor layer including a nitride semiconductor, a p-type semiconductor layer including a nitride semiconductor, a light emitting unit, a first layer, a second layer, and a third layer. The light emitting unit is provided between the n-type and p-type semiconductor layers, and includes a first well layer including a nitride semiconductor. The first layer is provided between the first well layer and the p-type semiconductor layer, and includes Alx1Ga1-x1-y1Iny1N having a first Mg concentration. The second layer is provided between the first layer and the p-type semiconductor layer, and includes Alx2Ga1-x2-y2Iny2N having a second Mg concentration higher than the first Mg concentration. The third layer is provided between the second layer and the p-type semiconductor layer, and includes Alx3Ga1-x3-y3Iny3N having a third Mg concentration higher than the first Mg concentration and lower than the second Mg concentration.
    Type: Application
    Filed: August 26, 2014
    Publication date: March 26, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Mitsuhiro KUSHIBE, Kei KANEKO, Yasuo OHBA, Hiroshi KATSUNO, Shinji YAMADA
  • Patent number: 8987016
    Abstract: The invention relates to light-emitting devices, and related components, systems and methods. In one aspect, the present invention is related to light emitting diode (LED) light extraction efficiency. A non-limiting example, the application teaches a method for improving light emitting diode (LED) extraction efficiency, by providing a nano-rod light emitting diode; providing quantum wells; and reducing the size of said nano-rod LED laterally in the quantum-well plane (x and y), thereby improving LED extraction efficiency.
    Type: Grant
    Filed: August 16, 2011
    Date of Patent: March 24, 2015
    Assignee: Rensselaer Polytechnic Institute
    Inventors: Mei-Ling Kuo, Shawn-Yu Lin, Yong Sung Kim, Mei-Li Hsieh
  • Patent number: 8987015
    Abstract: A method for fabricating a semiconductor device includes performing thermal cleaning for a surface of a silicon substrate in an atmosphere including hydrogen under a condition that a thermal cleaning temperature is higher than or equal to 700° C. and is lower than or equal to 1060° C., and a thermal cleaning time is longer than or equal to 5 minutes and is shorter than or equal to 15 minutes; forming a first AlN layer on the substrate with a first V/III source ratio, the forming of the first AlN layer including supplying an Al source to the surface of the substrate without supplying a N source, and supplying both the Al source and the N source; forming a second AlN layer on the first AlN layer with a second V/III source ratio that is greater than the first ratio; and forming a GaN-based semiconductor layer on the second AlN layer.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: March 24, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiichi Yui, Akira Furuya, Ken Nakata, Takamitsu Kitamura, Isao Makabe
  • Patent number: 8987021
    Abstract: A manufacturing method of a light-emitting device includes: a die-bonding process in which a semiconductor light emitting element is placed on a bonding target member via an adhesive containing a silicone resin so that a surface opposite to an exposure surface faces the bonding target member, and the adhesive is heated to bond the semiconductor light emitting element to the bonding target member; and a wire-bonding process in which a wire is connected to the exposure surface. The semiconductor light emitting element includes a laminated semiconductor layer having a light emitting layer and an electrode including a metal layer containing Au and provided on the laminated semiconductor layer and a covering layer containing Ni or Ta and covering the metal layer, the thickness of the covering layer being set smaller than 100 nm and the exposure surface to expose the covering layer to the outside being formed.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: March 24, 2015
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Mineo Okuyama
  • Publication number: 20150076486
    Abstract: The pixel structure includes a scan line, a data line, a thin-film transistor, a first electrode layer, a protective layer and a second electrode layer. The thin-film transistor is electrically connected to the scan line and the data line, and includes a gate, an oxide semiconductor layer, an insulating layer, a source and a drain. The first electrode layer is in the same layer as the oxide semiconductor layer, and is surrounded by the scan line and the data line. The second electrode layer is located on the first electrode layer, and the protective layer is located between the first electrode layer and the second electrode layer, wherein one of the first and second electrode layers is electrically connected to the thin-film transistor, and the other is connected to a common voltage. The second electrode layer includes a plurality of slits exposing an area of the first electrode layer.
    Type: Application
    Filed: November 20, 2013
    Publication date: March 19, 2015
    Applicant: Hannstar Display Corporation
    Inventors: Hsien-Tang Hu, Chang-Ming Chao, Mu-Kai Kang, Jui-Chi Lai
  • Patent number: 8981404
    Abstract: An optoelectronic semiconductor chip includes a semiconductor layer stack and a mirror. The semiconductor layer stack has an active layer for generating electromagnetic radiation. The minor is arranged on an underside of the semiconductor layer stack. The mirror has a first region and a second region, the first region containing silver and the second region containing gold. A method of producing such a semiconductor chip is also defined.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: March 17, 2015
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Martin Rudolf Behringer, Christoph Klemp, Christoph Rupprich
  • Patent number: 8980657
    Abstract: The present invention is a method for producing a light-emitting device whose p contact layer has a p-type conduction and a reduced contact resistance with an electrode. On a p cladding layer, by MOCVD, a first p contact layer of GaN doped with Mg is formed. Subsequently, after lowering the temperature to a growth temperature of a second p contact layer being formed in the subsequent process, which is 700° C., the supply of ammonia is stopped and the carrier gas is switched from hydrogen to nitrogen. Thereby, Mg is activated in the first p contact layer, and the first p contact layer has a p-type conduction. Next, the second p contact layer of InGaN doped with Mg is formed on the first p contact layer by MOCVD using nitrogen as a carrier gas while maintaining the temperature at 700° C. which is the temperature of the previous process.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: March 17, 2015
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Shinya Boyama, Yasuhisa Ushida
  • Patent number: 8981580
    Abstract: A bonding pad structure is provided that includes two conductive layers and a connective layer interposing the two conductive layers. The connective layer includes a contiguous, conductive structure. In an embodiment, the contiguous conductive structure is a solid layer of conductive material. In other embodiments, the contiguous conductive structure is a conductive network including, for example, a matrix configuration or a plurality of conductive stripes. At least one dielectric spacer may interpose the conductive network. Conductive plugs may interconnect a bond pad and one of the conductive layers.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: March 17, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shin-Puu Jeng, Yu-Wen Liu, Hao-Yi Tsai, Hsien-Wei Chen
  • Patent number: 8980656
    Abstract: A new method for forming an array of high aspect ratio semiconductor nanostructures entails positioning a surface of a stamp comprising a solid electrolyte in opposition to a conductive film disposed on a semiconductor substrate. The surface of the stamp includes a pattern of relief features in contact with the conductive film so as to define a film-stamp interface. A flux of metal ions is generated across the film-stamp interface, and a pattern of recessed features complementary to the pattern of relief features is created in the conductive film. The recessed features extend through an entire thickness of the conductive film to expose the underlying semiconductor substrate and define a conductive pattern on the substrate. The stamp is removed, and material immediately below the conductive pattern is selectively removed from the substrate. Features are formed in the semiconductor substrate having a length-to-width aspect ratio of at least about 5:1.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: March 17, 2015
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Xiuling Li, Nicholas X. Fang, Placid M. Ferreira, Winston Chern, Ik Su Chun, Keng Hao Hsu
  • Patent number: 8980658
    Abstract: A light-emitting element includes a n-type silicon oxide film and a p-type silicon nitride film. The n-type silicon oxide film and the p-type silicon nitride film formed on the n-type silicon oxide film form a p-n junction. The n-type silicon oxide film includes a plurality of quantum dots composed of n-type Si while the p-type silicon nitride film includes a plurality of quantum dots composed of p-type Si. Light emission occurs from the boundary between the n-type silicon oxide film and the p-type silicon nitride film by injecting electrons from the n-type silicon oxide film side and holes from the p-type silicon nitride film side.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: March 17, 2015
    Assignee: Hiroshima University
    Inventor: Shin Yokoyama
  • Publication number: 20150069420
    Abstract: A stressor layer is applied to a semiconducting stack in order to separate the semiconducting stack at a predetermined depth. Tensile force is applied to the stressor layer, fracturing the semiconducting stack at the predetermined depth and allowing the resulting upper portion of the semiconducting stack to be used in manufacturing a semiconducting end-product (e.g., a light-emitting diode). The resulting lower portion of the semiconducting stack may be reused to grow a new semiconducting stack thereon.
    Type: Application
    Filed: September 8, 2014
    Publication date: March 12, 2015
    Inventors: Ajit Paranjpe, Jia Lee, Craig Metzner
  • Patent number: 8975632
    Abstract: Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: March 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masahiko Hayakawa, Yoshifumi Tanada, Mitsuaki Osame, Aya Anzai, Ryota Fukumoto
  • Patent number: 8975098
    Abstract: A method of manufacturing a semiconductor light emitting element includes preparing a semiconductor stacked layer structure by stacking a first semiconductor layer and a second semiconductor layer in this order, forming a second electrode and an insulating layer in this order on the second semiconductor layer, exposing the first semiconductor layer by removing a part of the second semiconductor layer, forming a first electrode by forming a metal layer on the exposed first semiconductor layer and the insulating layer and flattening a surface of the metal layer, forming a first electrode-side bonding layer having a top layer made of Au on the first electrode, preparing a support substrate including a support substrate-side bonding layer having a top surface made of Au, and bonding the first electrode-side bonding layer and the support substrate-side bonding layer.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: March 10, 2015
    Assignee: Nichia Corporation
    Inventors: Hiroaki Matsumura, Takashi Abe, Kyosuke Nakagawa
  • Publication number: 20150064816
    Abstract: A method for making light emitting diode, the method includes the following steps. A substrate having an epitaxial growth surface is provided. A carbon nanotube layer is suspended above the epitaxial growth surface. A first semiconductor layer, an active layer and a second semiconductor layer are grown on the epitaxial growth surface in that order. A third semiconductor layer is formed on a surface of the second semiconductor layer, wherein the third semiconductor layer includes a plurality of spaced protrusions. A portion of the first semiconductor layer is exposed by etching a portion of the third semiconductor layer, the second semiconductor layer, and the active layer. A first electrode is formed to electrically connected to the first semiconductor layer and a second electrode is formed to electrically connected to the second semiconductor layer.
    Type: Application
    Filed: October 30, 2014
    Publication date: March 5, 2015
    Inventors: YANG WEI, SHOU-SHAN FAN
  • Publication number: 20150060759
    Abstract: A method of forming a light-emitting diode including determining a first level of tensile stress to be applied to a base substrate including a plurality of quantum well layers to adjust a band-gap of the base substrate to a predetermined band-gap. The first level of tensile stress is generated in the base substrate by forming a tensile-stressing layer on the base substrate.
    Type: Application
    Filed: September 5, 2013
    Publication date: March 5, 2015
    Applicant: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Bahman Hekmatshoartabari, Devendra K. Sadana, Davood Shahrjerdi
  • Publication number: 20150063382
    Abstract: A semiconductor light emitter device, comprising a substrate, an active layer made of Germanium, which is configured to emit light under application of an operating voltage to the semiconductor light emitter device, wherein a gap is arranged on the substrate, which extends between two bridgeposts laterally spaced from each other, the active layer is arranged on the bridgeposts and bridges the gap, and wherein the semiconductor light emitter device comprises a stressor layer, which induces a tensile strain in the active layer above the gap.
    Type: Application
    Filed: February 11, 2013
    Publication date: March 5, 2015
    Inventors: Giovanni Capellini, Christian Wenger, Thomas Schroder, Grzegorz Kozlowski
  • Publication number: 20150060904
    Abstract: The invention relates to a semiconducting structure intended to emit light, comprising a first semiconducting region (10) with a first type of conductivity, and a second semiconducting region (20) with a second type of conductivity, at least on a portion (220, 210), so as to form a junction semiconducting with the first region (10). This second region (20) has at least a first portion (210) in contact with the first region (10), this first portion (210) comprising at least one first and one second carrier confinement zone (211, 212). The structure (1) comprises at least a first means of polarising the first portion (210) adapted to apply direct first external polarisation to the first portion (210) in order to modify the distribution of carriers of at least one type of conductivity in the first portion (210) relative to the first and second confinement zones (211, 212). The invention also relates to a method of manufacturing a semiconducting structure (1) and a device comprising at least such a structure (1).
    Type: Application
    Filed: August 25, 2014
    Publication date: March 5, 2015
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Ivan-Christophe ROBIN, Alexei TCHELNOKOV
  • Patent number: 8969889
    Abstract: An LED device includes first and second LED elements containing a lower layer of first conductivity type, an active layer, and an upper layer of second conductivity type, wherein the second LED element has third and fourth electrodes on the lower layer, recessed portion having a side surface exposing the upper, active and lower layers, and reaching the third electrode, fifth electrode disposed on the upper layer extending on the side surface of the recessed portion, and connected with the third electrode, and groove extending from the upper layer and reaching the active layer between the third and fourth electrodes to electrically separate the third electrode from the fourth electrode.
    Type: Grant
    Filed: November 13, 2013
    Date of Patent: March 3, 2015
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Ryosuke Kawai, Mamoru Miyachi, Tatsuma Saito, Takako Hayashi, Takanobu Akagi
  • Patent number: 8969858
    Abstract: An organic light emitting display apparatus including a plurality of sub-pixels disposed on a substrate, wherein each of the sub-pixels includes: a first electrode formed on the substrate; an intermediate layer formed on the first electrode and including an organic emission layer; and a second electrode formed on the intermediate layer, wherein at least one sub-pixel for emitting light of a color among the sub-pixels includes a shadow emission layer for emitting light of different color between the organic emission layer and the first electrode, and the organic emission layer of the one sub-pixel includes a hole transport material.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: March 3, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Eon-Seok Oh, Bo-Mi Choi, Hyun-Sung Kang, Sang-Yeol Kim
  • Patent number: 8969888
    Abstract: A flat panel display apparatus including a substrate on which a display unit is formed, an encapsulation member that covers the display unit, a sealant that is formed between the substrate and encapsulation member while the sealant encapsulates the display unit by surrounding the display unit, and a metal layer that is formed on the substrate and located along with the sealant, the metal layer having irregular widths.
    Type: Grant
    Filed: November 6, 2013
    Date of Patent: March 3, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventor: Jeong-Seok Oh
  • Patent number: 8969106
    Abstract: A laser irradiation apparatus including a chamber configured to receive a panel including an organic layer on a substrate, a laser oscillator outside the chamber, and configured to irradiate a laser beam onto the panel in the chamber, and a transparent window at a side of the chamber, and configured to allow the laser beam to pass therethrough, wherein the laser beam is configured to remove at least a portion of the organic layer on the substrate.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 3, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: June-Woo Lee, Kwan-Wook Jung, Guang-Hai Jin, Jae-Beom Choi
  • Publication number: 20150054002
    Abstract: A manufacturing method of a semiconductor structure includes the following steps. A patterned photoresist layer is formed on a wafer of the wafer structure. The wafer is etched, such that channels are formed in the wafer, and a protection layer of the wafer structure is exposed through the channels. The protection layer is etched, such that openings aligned with the channels are formed in the protection layer. Landing pads in the protection layer are respectively exposed through the openings and the channels, and the caliber of each of the openings is gradually increased toward the corresponding channel. Side surfaces of the wafer surrounding the channels are etched, such that the channels are expanded to respectively form hollow regions. The caliber of the hollow region is gradually decreased toward the opening, and the caliber of the opening is smaller than that of the hollow region.
    Type: Application
    Filed: August 20, 2014
    Publication date: February 26, 2015
    Inventors: Wei-Ming CHIEN, Chia-Sheng LIN, Tsang-Yu LIU, Yen-Shih HO
  • Publication number: 20150056728
    Abstract: The light-emitting diode comprises a first electrode intended to inject carriers of a first type into a stack of the light-emitting diode and arranged on an emissive face of the stack, a second electrode intended to inject carriers of a second type into the stack, and an emissive surface delimited by areas of the emissive face of the stack not covered by the first electrode. The first electrode is configured in such a way that any point of the emissive surface is situated no more than a predetermined distance from the first electrode dependent on the spreading length of the light-emitting diode.
    Type: Application
    Filed: August 21, 2014
    Publication date: February 26, 2015
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventor: David Vaufrey
  • Patent number: 8962357
    Abstract: A method of manufacturing an organic light emitting diode (OLED) display according to an exemplary embodiment includes: forming a display unit displaying an image and a driver positioned near the display unit to drive a light emitting element of the display unit in a lower mother substrate; forming a sealant and a plurality of bumps in an upper mother substrate; aligning the lower mother substrate and the upper mother substrate to face each other; melting and hardening the sealant to combine the lower mother substrate and the upper mother substrate; cutting the upper mother substrate; and cutting the lower mother substrate, wherein the cutting of the upper mother substrate is performed according to a first cutting line between the sealant and the bumps and a second cutting line corresponding to the bumps.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: February 24, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventor: Dong-Seop Park
  • Patent number: 8962382
    Abstract: The present invention relates to a method for producing an organic light emitting device, comprising a step of sequentially forming on a substrate a first electrode formed of a metal, one or more organic material layers including a light emitting layer, and a second electrode, which comprises a step of forming a layer on the first electrode using a metal having the higher oxidation rate than the first electrode before forming the organic material layer, and to an organic light emitting device produced by the same.
    Type: Grant
    Filed: February 2, 2007
    Date of Patent: February 24, 2015
    Assignee: LG Chem, Ltd.
    Inventors: Jung-Hyoung Lee, Jung-Bum Kim, Yun-Hye Hahm
  • Patent number: 8962359
    Abstract: In various embodiments, a rigid lens is attached to a light-emitting semiconductor die via a layer of encapsulant having a thickness insufficient to prevent propagation of thermal expansion mismatch-induced strain between the rigid lens and the semiconductor die.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: February 24, 2015
    Assignee: Crystal IS, Inc.
    Inventors: Leo J. Schowalter, Jianfeng Chen, James R. Grandusky
  • Patent number: 8962356
    Abstract: Provided is a method of manufacturing a photonic crystal, including: a first step of forming, on a surface of a substrate, a protective mask for selective growth, the protective mask having an opening pattern opened therein; a second step of selectively growing a columnar semiconductor from an exposed portion of the surface of the substrate not having the mask formed thereon, laterally overgrowing the semiconductor layer on the mask, and embedding the mask; a third step of forming a photonic crystal in the semiconductor layer so that openings in the opening pattern and the one of pores and grooves which form the photonic crystal are at least partly overlapped each other when seen from a direction perpendicular to the surface of the substrate; a fourth step of removing at least part of the columnar semiconductor; and a fifth step of removing at least part of the mask.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: February 24, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Katsuyuki Hoshino
  • Patent number: 8962355
    Abstract: An optical element package includes: an optical element in a form of a chip, and a lens resin having a convex lens surface covering an optical functional surface of the optical element. The convex lens surface is formed as a rough surface having a plurality of minute convex curved surfaces having a vertex in a direction perpendicular to a plane in contact with each part of the convex lens surface.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: February 24, 2015
    Assignee: Sony Corporation
    Inventors: Hiroyuki Fukasawa, Tsutomu Tanaka
  • Patent number: 8963122
    Abstract: In a semiconductor light emitting element outputting light indicating green color by using a group III nitride semiconductor, light emission output is improved. A semiconductor light emitting element includes: an n-type cladding layer containing n-type impurities (Si); a light emitting layer laminated on the n-type cladding layer; and a p-type cladding layer containing p-type impurities and laminated on the light emitting layer. The light emitting layer has a barrier layer including first to fifth barrier layers and a well layer including first to fourth well layers, and has a multiple quantum well structure to sandwich one well layer by two barrier layers. The light emitting layer is configured such that the first to fourth well layers are set to have a composition to emit green light, and the first barrier layer is doped with n-type impurities, whereas the other barrier layers are not doped with n-type impurities.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: February 24, 2015
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Katsuki Kusunoki, Hisao Sato
  • Publication number: 20150048350
    Abstract: We describe a lighting tile having a substrate bearing an electrode structure, the electrode structure comprising: a plurality of electrically conductive tracks disposed over said substrate; and an electrical connection region connecting to said plurality of tracks; wherein the height of said tracks tapers away from said connection region to compensate for a reduction in luminance from said lighting tile array from the electrical connection region which arises from a non-uniform voltage drop which appears along the tracks in use. Advantageously the tracks are fabricated by electroplating: then, as the rate of deposition is determined by the voltage drop along a track during plating, the height of the deposited tracks, and therefore their resistance, will match the profile required in operation to compensate for the reduction in luminance which would otherwise occur.
    Type: Application
    Filed: August 18, 2014
    Publication date: February 19, 2015
    Applicant: CAMBRIDGE DISPLAY TECHNOLOGY LIMITED
    Inventors: Colin Baker, Aleksandra Rankov
  • Publication number: 20150048387
    Abstract: Devices incorporating a single to a few-layer MoS2 channels in combination with optimized substrate, dielectric, contact and electrode materials and configurations thereof, exhibit light emission, photoelectric effect, and superconductivity, respectively.
    Type: Application
    Filed: June 4, 2014
    Publication date: February 19, 2015
    Applicant: Georgetown University
    Inventors: Makarand PARANJAPE, Paola BARBARA, Amy LIU, Marcio FONTANA
  • Publication number: 20150048385
    Abstract: A method of manufacturing a light emitting diode (LED) substrate includes following steps: providing a nano-patterned substrate, which has a plurality of convex portions and a plurality of first concave portions that are spaced apart from each other, wherein each first concave portion has a depth (d1); forming a plurality of protection structures to cover each convex portion, and exposing a bottom surface of each first concave portion; performing an anisotropic etching processing to etch the bottom surface of each first concave portion which is not covered by the protection structure so as to form a plurality of second concave portions having a depth (d2), and d2 is greater than d1.
    Type: Application
    Filed: December 3, 2013
    Publication date: February 19, 2015
    Applicant: Lextar Electronics Corporation
    Inventors: Wei-Chang YU, Chien-Cheng CHANG, Chih-Sheng HSU
  • Publication number: 20150048318
    Abstract: An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a substrate, a pixel electrode disposed on the substrate and a pixel defining layer which covers an edge of the pixel electrode and exposes a center portion of the pixel electrode. The OLED display also includes a plurality of fine patterns disposed on the center portion, wherein the fine patterns are formed of the same material as that of the pixel defining layer.
    Type: Application
    Filed: December 17, 2013
    Publication date: February 19, 2015
    Applicant: Samsung Display Co., Ltd.t
    Inventor: Jae-Hoon Kim
  • Patent number: 8956965
    Abstract: A method of manufacturing a display panel having a display part and a terminal part each formed on a different area on a TFT substrate, comprising: a step of forming the display part on the TFT substrate; a step of forming a conductive layer of a conductive metal oxide or a metal on an area where the terminal part is to be formed; a step of forming a chemical vapor deposition layer of an inorganic compound by a chemical vapor deposition method so that the chemical vapor deposition layer covers the display part and comes into contact at least with an upper surface of the conductive layer and so that the upper surface of the conductive layer alters; and a step of removing a portion of the chemical vapor deposition layer on the conductive layer.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: February 17, 2015
    Assignee: Panasonic Corporation
    Inventor: Takashi Osako
  • Patent number: 8956890
    Abstract: The present invention provides a method for producing a Group III nitride semiconductor light-emitting device wherein a p-cladding layer has a uniform Mg concentration. A p-cladding layer having a superlattice structure in which AlGaN and InGaN are alternately and repeatedly deposited is formed in two stages of the former process and the latter process where the supply amount of the Mg dopant gas is different. The supply amount of the Mg dopant gas in the latter process is half or less than that in the former process. The thickness of a first p-cladding layer formed in the former process is 60% or less than that of the p-cladding layer, and 160 ? or less.
    Type: Grant
    Filed: August 15, 2013
    Date of Patent: February 17, 2015
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Atsushi Miyazaki, Koji Okuno
  • Patent number: 8956709
    Abstract: A first substrate including, on one of surfaces, a light absorption layer having metal nitride and a material layer which is formed so as to be in contact with the light absorption layer is provided; the surface of the first substrate on which the material layer is formed and a deposition target surface of a second substrate are disposed to face each other; and part of the material layer is deposited on the deposition target surface of the second substrate in such a manner that irradiation with laser light having a repetition rate of greater than or equal to 10 MHz and a pulse width of greater than or equal to 100 fs and less than or equal to 10 ns is performed from the other surface side of the first substrate to selectively heat part of the material layer which overlaps with the light absorption layer.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: February 17, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tomoya Aoyama, Takuya Tsurume, Takao Hamada
  • Patent number: 8956891
    Abstract: A highly reliable light-emitting device and a manufacturing method thereof are provided. A light-emitting element and a terminal electrode are formed over an element formation substrate; a first substrate having an opening is formed over the light-emitting element and the terminal electrode with a bonding layer provided therebetween; an embedded layer is formed in the opening; a transfer substrate is formed over the first substrate and the embedded layer; the element formation substrate is separated; a second substrate is formed under the light-emitting element and the terminal electrode; and the transfer substrate and the embedded layer are removed. In addition, an anisotropic conductive connection layer is formed in the opening, and an electrode is formed over the anisotropic conductive connection layer. The terminal electrode and the electrode are electrically connected to each other through the anisotropic conductive connection layer.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: February 17, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Akihiro Chida
  • Patent number: 8956895
    Abstract: An inexpensive light emitting device and inexpensive electric equipment are provided. A substrate on which a semiconductor element or a light emitting element is formed and a color filter are manufactured by separate manufacturing processes, and they are bonded to each other to complete the light emitting device. Thus, the yield of the light emitting device is improved and the manufacture period is shortened.
    Type: Grant
    Filed: August 13, 2009
    Date of Patent: February 17, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takeshi Fukunaga, Jun Koyama, Kazutaka Inukai
  • Patent number: 8956898
    Abstract: The fabrication method for an organic EL device according to the invention includes: forming a third insulating layer on a first insulating layer; removing the third insulating layer in a first pixel region by etching the third insulating layer; forming a second insulating layer that has different thicknesses in a first pixel and a second pixel and has a flat first surface by forming a precursor insulating layer to continuously cover a first reflection film and a second reflection film and then planarizing an upper surface of the precursor insulating layer; and forming a first pixel electrode and a second pixel electrode on the first surface of the second insulating layer. The first insulating layer is slower in the rate at which the layer is removed by etching than the third insulating layer.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: February 17, 2015
    Assignee: Seiko Epson Corporation
    Inventors: Hisakatsu Sato, Satoshi Murata
  • Patent number: 8951888
    Abstract: A method for fabricating a semiconductor device includes a first step of forming, on a first substrate, a first element region in which a plurality of elements are collectively arranged, a second step of relocating the plurality of elements formed on the first substrate to a holding member in the same arrangement as in the first element region to have the plurality of elements held on the holding member, a third step of rearranging the plurality of elements held on the holding member and having the plurality of elements held on an intermediate substrate, thereby forming a second element region having a shape different from a shape of the first element region on the intermediate substrate, and a fourth step of dispersing the plurality of elements held on the intermediate substrate and adhering the plurality of elements to a second substrate.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: February 10, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Katsuyuki Suga
  • Patent number: 8951816
    Abstract: One embodiment of the present invention is a film forming method comprising: arranging a surface of a film formation substrate 10 including an absorption layer 12 on a first substrate 11 and a material layer 13 containing a film formation material and a surface of a film-formation target substrate 20 including a first layer 23 over a second substrate 22, so as to face each other; forming a second layer 13a containing the film formation material over the first layer 23 by performing first heat treatment on the material layer 13; and forming a third layer 13b containing the film formation material over the second layer 13a by performing second heat treatment on the material layer 13. In the second heat treatment, energy with a density higher than that in the first heat treatment is applied to the material layer.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: February 10, 2015
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Rena Tsuruoka, Hisao Ikeda, Takuya Tsurume, Tohru Sonoda, Satoshi Inoue
  • Patent number: 8952371
    Abstract: An organic EL element comprises: a substrate; a first electrode formed at one surface side of the substrate; a second electrode opposing the first electrode; and an organic EL layer located between the first and second electrodes. In the organic EL element, the second electrode is a transparent electrode, and the first electrode is a reflecting electrode. The organic EL element is a top-emission type. The first electrode comprises a plurality of nanometer-size (nanometer-order) columnar structures formed on the above-mentioned one surface of the substrate, and each of the plurality of columnar structures has a metallic surface as the outermost surface.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: February 10, 2015
    Assignees: Panasonic Corporation, Kyushu University, National University Corporation, LINTEC Corporation
    Inventors: Manabu Nakata, Chihaya Adachi, Yasukazu Nakata