Abstract: A method for selectively etching a first region of silicon oxide with respect to a second region of silicon nitride, includes: preparing a target object including the first region and the second region in a processing chamber of a plasma processing apparatus; and generating a plasma of a processing gas containing a fluorocarbon gas and a rare gas in the processing chamber. In the generating the plasma of the processing gas, a self-bias potential of a lower electrode on which the target object is mounted is greater than or equal to 4V and smaller than or equal to 350V and a flow rate of the rare gas in the processing gas is 250 to 5000 times of a flow rate of the fluorocarbon gas in the processing gas.

Abstract: A transistor display panel including a substrate, a gate line disposed on the substrate and extending in a first direction, a gate electrode protruding from the gate line, a gate insulating layer disposed on the gate line and the gate electrode, a semiconductor layer and an auxiliary layer disposed on the gate insulating layer and spaced apart from each other, a data line disposed on the gate insulating layer and extending in a second direction which is a direction crossing the gate line, a drain electrode disposed on the gate insulating layer and the semiconductor layer and spaced apart from the data line, and a pixel electrode connected to the drain electrode, in which the auxiliary layer overlaps an edge of the gate electrode in a plan view.

Abstract: A method for forming a through-substrate-via structure includes forming a via hole in a substrate, depositing a conductive material in the via hole, forming an annular groove in the substrate surrounding the conductive material, and depositing a dielectric material in the annular groove with overhang portions of the deposited dielectric material at a top surface of the groove forming an air gap in an interior portion of the groove.

Abstract: Methods, systems, and computer programs are presented for controlling gas flow in a semiconductor manufacturing chamber. The method includes flowing a reactant gas thorough an inner feed and a tuning gas through an outer feed surrounding the inner feed, such that the gases do not mix until both are introduced in the chamber. Further, the flow of the reactant gas is convective, and the flow of the tuning gas is directed at an angle from the direction of the reactant gas, providing a delivery of the tuning gas in closer proximity to the RF power before further mixing with the reactant gas. Radio frequency power is provided to the electrode to ignite a plasma using the reactant and tuning gases. The diffusive flow of the tuning gas enables the tuning gas to be dissociated by the RF power allowing for control of the local residence time variation and preferential spatial dissociation patterns with respect to the local residence time of the reactant gas.

Abstract: A technique capable of removing a natural oxide film formed on a surface of a semiconductor layer which contains a compound of indium and an element other than indium as a main ingredient, without making a temperature of the semiconductor layer relatively high. The technique includes supplying a first etching gas which is ?-diketone to the semiconductor layer and heating the semiconductor layer to remove an oxide of the indium constituting the natural oxide film; and supplying a second etching gas to the semiconductor layer and heating the semiconductor layer to remove an oxide of the element constituting the natural oxide film. By using the first etching gas, it is possible to remove the indium oxide even if the temperature of the semiconductor layer is relatively low. This eliminates the need to increase the temperature to a relatively high level when removing the natural oxide film.

Abstract: Disclosed herein is a plasma etching method for plasma-etching a ground surface of a wafer after the wafer with a tape attached to its lower surface is ground. The plasma etching method includes a drying step of applying heat to the tape to remove water present in the tape, an electrostatic holding step of electrostatically holding the wafer by an electrostatic force generated by supplying DC power to electrodes of an electrostatic chuck, after the drying step, and an etching step of reducing the pressure of a reduced-pressure chamber and plasma-etching the ground surface of the wafer by a reaction gas brought into a plasma state, after the electrostatic holding step.

Abstract: Processing methods may be performed to remove unwanted materials from a substrate. The methods may include forming a remote plasma of an inert precursor in a remote plasma region of a processing chamber. The methods may include forming a bias plasma of the inert precursor within a processing region of the processing chamber. The methods may include modifying a surface of an exposed material on a semiconductor substrate within the processing region of the processing chamber with plasma effluents of the inert precursor. The methods may include extinguishing the bias plasma while maintaining the remote plasma. The methods may include adding an etchant precursor to the remote plasma region to produce etchant plasma effluents. The methods may include flowing the etchant plasma effluents to the processing region of the processing chamber. The methods may also include removing the modified surface of the exposed material from the semiconductor substrate.

Abstract: Etching characteristics in a case where a workpiece contains a nitrogen compound and an etching gas such as a CHxFy-based gas contains hydrogen are obtained. In a flux calculation step, an information processing apparatus calculates a plurality of fluxes in a surface reaction model, a processed surface of a workpiece including a protection film layer and a reaction layer in the surface reaction model. In a protection film layer calculation step, the information processing apparatus calculates a thickness of the protection film layer by using a calculation equation for calculating a thickness of an etched protection film layer based on the basis of a removal term for describing removal of the protection film layer, the removal term being selected depending on a comparison result of comparing the plurality of fluxes.

Abstract: In a rotating disk reactor for growing epitaxial layers on substrate or other CVD reactor system, gas directed toward the substrates at gas inlets at different radial distances from the axis of rotation of the disk has both substantially the same gas flow rate/velocity and substantially the same gas density at each inlet. The gas directed toward portions of the disk remote from the axis may include a higher concentration of a reactant gas than the gas directed toward portions of the disk close to the axis, so that portions of the substrate surfaces at different distances from the axis receive substantially the same amount of reactant gas per unit area, and a combination of carrier gases with different relative molecular weights at different radial distances from the axis of rotation are employed to substantially make equal the gas density in each region of the reactor.

Abstract: The invention is an plasma processing system with a plasma chamber for processing semiconductor substrates, comprising: a radio frequency or microwave power generator coupled to the plasma chamber; a low pressure vacuum system coupled to the plasma chamber; and at least one chamber surface that is configured to be exposed to a plasma, the chamber surface comprising: a YxOyFz layer that comprises Y in a range from 20 to 40%, O in a range from greater than zero to less than or equal to 60%, and F in a range of greater than zero to less than or equal to 75%. Alternatively, the YxOyFz layer can comprise Y in a range from 25 to 40%, O in a range from 40 to 55%, and F in a range of 5 to 35% or Y in a range from 25 to 40%, O in a range from 5 to 40%, and F in a range of 20 to 70%.

Abstract: Methods for the deposition of a SiCON film by molecular layer deposition using a multi-functional amine and a silicon containing precursor having a reactive moiety.

Abstract: Systems and methods discussed herein are directed towards processing of substrates, including forming a plurality of features in a target layer on a substrate. The formation of the plurality of features includes a main etch operation that forms the plurality of features to a first depth in the target layer. The main etch operation is followed by a phase shift sync pulsing (PSSP) operation, and these two operations are repeated iteratively to form the features to a predetermined depth. The PSSP operation includes one or more cycles of RF source power and RF bias power, this cycle deposits a protective coating in and on the features and then etches a portion of the protective coating to expose portions of the feature.

Abstract: Semiconductor devices and methods of forming the same include forming gate stacks across a semiconductor fin, each gate stack having a gate conductor. An interlayer dielectric is formed between the gate stacks. A protective layer is formed on the interlayer dielectric that leaves the gate stacks exposed. The gate conductor of at least one gate stack is etched away. A dielectric liner is formed in a gap left by the etched gate conductor.

Abstract: A method of cleaning a chamber of a plasma processing device with radicals includes creating a plasma within a remote plasma source which is separated from the chamber, the plasma including radicals and ions, cleaning the chamber by allowing radicals to enter the chamber from the remote plasma source while preventing the majority of the ions created in the remote plasma source from entering the chamber, detecting a DC bias developed on a component of the chamber during cleaning; and using the detected DC bias to determine an end-point of the cleaning and, on determination of the end-point, to stop the cleaning.

Abstract: Atomic layer deposition (ALD) process formation of silicon oxide with temperature >500° C. is disclosed. Silicon precursors used have a formula of: R1R2mSi(NR3R4)nXp??I. wherein R1, R2, and R3 are each independently selected from hydrogen, a linear or branched C1 to C10 alkyl group, and a C6 to C10 aryl group; R4 is selected from, a linear or branched C1 to C10 alkyl group, and a C6 to C10 aryl group, a C3 to C10 alkylsilyl group; wherein R3 and R4 are linked to form a cyclic ring structure or R3 and R4 are not linked to form a cyclic ring structure; X is a halide selected from the group consisting of Cl, Br and I; m is 0 to 3; n is 0, 1 or 2; and p is 0, 1 or 2 and m+n+p=3; and R1R2mSi(OR3)n(OR4)qXp??II.

Abstract: The inventive concepts provide a method for forming a hard mask pattern. The method includes forming a hard mask layer on an etch target layer disposed on a substrate, forming a photoresist pattern having an opening exposing one region of the hard mask layer, performing an oxygen ion implantation process on the one region using the photoresist pattern as a mask to form an oxidized portion in the one region, and patterning the hard mask layer using the oxidized portion as an etch mask.

Abstract: Implementations described herein generally provide a method of processing a substrate. Specifically, the methods described are used for cleaning and etching source/drain regions on a silicon substrate in preparation for precise Group IV source/drain growth in semiconductor devices. Benefits of this disclosure include precise fin size control in devices, such as 10 nm FinFET devices, and increased overall device yield. The method of integrated clean and recess includes establishing a low pressure processing environment in the processing volume, and maintaining the low pressure processing environment while flowing a first gas over a substrate in a processing volume, depositing a salt on the substrate, heating the processing volume to greater than 90° C., purging the processing volume with a second inert gas, and recessing a source/drain region disposed on the substrate.

Abstract: Apparatuses suitable for etching substrates at various pressure regimes are described herein. Apparatuses include a process chamber including a movable pedestal capable of being positioned at a raised position or a lowered position, showerhead, and optional plasma generator. Apparatuses may be suitable for etching non-volatile metals using a treatment while the movable pedestal is in the lowered position and a high pressure exposure to organic vapor while the movable pedestal is in the raised position.

Abstract: A plasma processing method performs an etching process of supplying a fluorine-containing gas into a plasma processing space and etching a target substrate, in which a silicon oxide film or a silicon nitride film is formed on a surface of a metal silicide film, with plasma of the fluorine-containing gas (process S101). Then, the plasma processing method performs a reduction process of supplying a hydrogen-containing gas into the plasma processing space and reducing, with plasma of the hydrogen-containing gas, a metal-containing material deposited on a member, of which a surface is arranged to face the plasma processing space, after the etching process (process S102). Thereafter, the plasma processing method performs a removal process of supplying an oxygen-containing gas into the plasma processing space and removing metal, which is obtained by reducing the metal-containing material in the reduction process, with plasma of the oxygen-containing gas (process S103).

Abstract: A method for etching features in a stack comprising a patterned hardmask over a carbon based mask layer is provided. A pattern is transferred from the patterned hardmask to the carbon based mask layer, comprising providing a flow of a transfer gas comprising an oxygen containing component and at least one of SO2 or COS, forming the transfer gas into a plasma, providing a bias of greater than 10 volts, and stopping the flow of the transfer gas. A post treatment is provided, comprising providing a flow of a post treatment gas comprising at least one of He, Ar, N2, H2, or NH3, wherein the flow is provided to maintain a processing pressure of between 50 mTorr and 500 mTorr inclusive, forming the post treatment gas into a plasma, providing a bias of greater than 20 volts, and stopping the flow of the post treatment gas.

Abstract: A method for conditioning a semiconductor chamber component may include passivating the chamber component with an oxidizer. The method may also include performing a number of chamber process operation cycles in a semiconductor processing chamber housing the chamber component until the process is stabilized. The number of chamber operation cycles to stabilize the process may be less than 10% of the amount otherwise used with conventional techniques.

Abstract: A method for identifying a faulty component in a plasma tool is described. The method includes accessing a measurement of a parameter received from a frequency generator and measurement device. The measurement is generated based on a plurality of radio frequency (RF) signals that are provided to a portion of a plasma tool. The RF signals have one or more ranges of frequencies. The method further includes determining whether the parameter indicates an error, which indicates a fault in the portion of the plasma tool. The method includes identifying limits of the frequencies in which the error occurs and identifying based on the limits of the frequencies in which the error occurs one or more components of the portion of the plasma tool creating the error.

Abstract: The inventive concepts provide a method for forming a hard mask pattern. The method includes forming a hard mask layer on an etch target layer disposed on a substrate, forming a photoresist pattern having an opening exposing one region of the hard mask layer, performing an oxygen ion implantation process on the one region using the photoresist pattern as a mask to form an oxidized portion in the one region, and patterning the hard mask layer using the oxidized portion as an etch mask.

Abstract: In a method according to one embodiment, a first processing gas is supplied into a processing container of a plasma processing apparatus, and a plasma of the first processing gas is generated to etch an upper magnetic layer by the plasma of the first processing gas. Subsequently, a deposit, which is generated due to the etching of the upper magnetic layer, is removed. The removal of the deposit includes allowing a reduction reaction to occur in the deposit by a plasma of a second processing gas that contains H2 gas, and removing a product, which is generated by the reduction reaction, by using a third processing gas that contains hexafluoroacetylacetone.

Abstract: In one embodiment, a substrate treatment apparatus includes a housing configured to house a substrate. The apparatus further includes a chemical supplying module configured to supply one or more chemicals in a gas state to the substrate in the housing, the one or more chemicals including a first chemical that contains a silylation agent. The apparatus further includes a cooling module configured to cool the substrate in the housing while any of the one or more chemicals is supplied to the substrate in the housing.

Abstract: Disclosed is a method for etching an organic film. Plasma of a processing gas containing hydrogen gas and nitrogen gas is generated within a processing container of a plasma processing apparatus that accommodates a workpiece. A partial region of the organic film that is exposed from a hard mask is changed into a denatured region by the generation of the plasma of the processing gas. Subsequently, plasma of a rare gas is generated within the processing container. The denatured region is removed by the plasma of the rare gas, and a substance released from the denatured region is deposited on the surface of the hard mask. In this method, the generation of the plasma of the processing gas and the generation of the plasma of the rare gas are repeated alternately.

Abstract: Disclosed is a dry etching method for a laminated film in which at least one silicon layer and at least one silicon oxide layer are laminated together. The dry etching method includes generating a plasma gas from a dry etching agent and etching the laminated film with the plasma gas under the application of a bias voltage. The dry etching agent contains an unsaturated hydrofluorocarbon represented by the following formula: C3HxFy where x is an integer of 1 to 5; y is an integer of 1 to 5; and x and y satisfy a relationship of x+y=4 or 6, and iodine heptafluoride. The volume of the iodine heptafluoride in the dry etching agent is 0.1 to 1.0 times the volume of the unsaturated hydrofluorocarbon in the dry etching agent.

Abstract: A semiconductor device includes a source including a first doped semiconductor layer arranged on a substrate, a layer of metal arranged on the first doped semiconductor layer, and a second doped semiconductor layer arranged on the layer of metal; a channel extending from the second doped semiconductor layer to a drain including an epitaxial growth; a gate disposed on sidewalls of the channel between the second doped semiconductor layer and the drain; an interlayer dielectric (ILD) disposed on the second doped semiconductor layer and the gate; and a source contact extending from a surface of the ILD to abut the layer of metal of the source.

Abstract: A gas-supply system includes a gas container filled with gas, a gas flow controller coupled to the gas container, and an operation device electrically connected to the gas flow controller. The gas-supply system further includes a buffer tank coupled to the gas flow controller and configured to receive the gas from the gas container via the gas flow controller. Furthermore, a pressure transducer disposed on the buffer tank and configured to generate a pressure signal to the operation device according to the pressure of the gas in the buffer tank. The operation device is configured to generate a control signal to the gas flow controller according the pressure signal, and the gas flow controller is configured to adjust the flow rate of the gas according to the control signal to keep the pressure of the gas in the buffer tank in a predetermined pressure range.

Abstract: A method of patterning a silicon containing ARC (anti-reflective coating) layer underlying a patterned layer is described that includes establishing a flow of a process gas to a plasma processing system, selecting a process condition that increases an etch selectivity of the silicon containing ARC layer relative to the patterned layer, igniting plasma from the process gas using a plasma source in accordance with the process condition, and exposing the substrate to the plasma to extend the feature pattern of the patterned layer into the silicon containing ARC layer. The composition of the process gas and the flow rate(s) of the gaseous constituents in the process gas are selected to adjust the carbon-fluorine content.

Abstract: The present disclosure provides, in accordance with some illustrative embodiments, a method of forming a semiconductor device, the method including providing an SOI substrate with an active semiconductor layer disposed on a buried insulating material layer, which is in turn formed on a base substrate material, forming a gate structure on the active semiconductor layer in an active region of the SOI substrate, partially exposing the base substrate for forming at least one bulk exposed region after the gate structure is formed, and forming a contact structure for contacting the at least one bulk exposed region.

Abstract: An ESC may include a dielectric layer, an electrode, a pedestal, a heater, an adhesive and a protecting ring. The dielectric layer may be configured to support a substrate. The electrode may be disposed in the dielectric layer and is configured to form plasma over the substrate. The pedestal may be disposed under the dielectric layer. The heater may be disposed between the pedestal and the dielectric layer and is configured to heat the substrate. The adhesive may be disposed between the pedestal and the heater, and between the heater and the dielectric layer. The protecting ring may be configured to surround the adhesive. The protecting ring may include a plasma-resistant material.

Abstract: A capacitor in a semiconductor device may include a lower electrode, a dielectric layer including a metal oxide and disposed on the lower electrode, a first material layer including aluminum oxide (AlxOy) and disposed on the dielectric layer, a second material layer including titanium oxynitride (TixOyNz) and disposed on the first material layer, and an upper electrode disposed on the second material layer, wherein the first material layer is between the dielectric layer and the second material layer, and the dielectric layer is between the lower electrode and the first material layer.

Abstract: A method for forming at least one Ag or Ag based alloy feature in an integrated circuit, including providing a blanket layer of Ag or Ag based alloy in a multi-layer structure on a substrate. The method further includes providing a hard mask layer over the blanket layer of Ag or Ag based alloy. The method further includes performing an etch of the blanket layer of Ag or Ag based alloy, wherein a portion of the blanket layer of Ag or Ag based alloy that remains after the etch forms one or more conductive lines. The method further includes forming a liner that surrounds the one or more conductive lines. The method further includes depositing a dielectric layer on the multi-layer structure.

Abstract: Provided is a substrate treating apparatus, which includes a plasma generating part configured to generate plasma, a housing disposed under the plasma generating part, and having a space therein, a susceptor disposed within the housing and supporting a substrate, and a baffle including injection holes injecting the plasma supplied from the plasma generating part, to the substrate. The baffle includes a base in which the injection holes are formed, and a central portion of the base is thicker than an edge thereof.

Abstract: Novel polymer monolith structures and methods for fabrication of the same are disclosed in a variety of embodiments. In an illustrative embodiment, a method includes forming a pattern of features on a wafer, thereby forming a patterned wafer; forming a polymer layer on the patterned wafer; using a first plasma to remove at least a portion of the polymer layer; and using a second plasma to etch off at least a portion of the pattern of features, thereby providing a structured polymer monolith. The pattern of features may include an array of pillars. Providing the structured polymer monolith may include providing a structured polymer monolith filter having an array of channels formed by the pillars. The structured polymer monolith may be composed of polypropylene.

Abstract: Methods of patterning conductive layer with a mask are described. The methods include low-ion-mass sputtering of the conductive layer by accelerating (e.g. helium or hydrogen containing ions) toward a substrate which includes the patterned mask and the underlying conductive layer. The sputtering processes described herein selectively remove conductive layers while retaining mask material.

Abstract: One or more systems and methods for controlling a target dimension for a wafer are provided. A processing chamber, such as an etching chamber, is configured to etch one or more wafers. In some embodiments, during processing of a first wafer of a set of wafers, the processing chamber is coated with a relatively thicker chamber coating than chamber coatings used for subsequently processed wafers of the set of wafers. The increased chamber coating thickness results in the first wafer having a target dimension that is substantially similar to target dimensions of the subsequently processed wafers. In some embodiments, a post wafer cleaning process is performed, but a pre wafer cleaning process is disabled, between processing a final wafer of a first set of wafers and an initial wafer of a second set of wafers so that the final wafer and the initial wafer have substantially similar target dimensions.

Abstract: A method of growing a nitride semiconductor layer includes forming a plurality of nano-structures on a substrate, forming a first buffer layer on the substrate such that upper portions of each of the nano-structures are exposed, removing the nano-structures to form voids in the first buffer layer, and growing a nitride semiconductor layer on the first buffer layer including the voids.

Abstract: A plasma etching method that can prevent residues from becoming attached to bottoms and sides of via holes and trenches. An interlayer insulation film formed of CwFx (x and w are predetermined natural numbers) and a metallic layer or a metal-containing layer formed on a substrate are exposed at the same time to plasma generated from a process gas. The process gas is a mixed gas including CyFz (y and z are predetermined natural numbers) gas and N2 gas, and the flow rate of the N2 gas in the process gas is higher than the flow rate of the CyFz gas.

Abstract: In one embodiment, a method of forming an electronic device includes providing a wafer having plurality of die separated by spaces. The method includes plasma singulating the wafer through the spaces to form singulation lines that expose side surfaces of the plurality of die. The method includes forming an insulating layer on the exposed side surfaces. In one embodiment, the steps of singulating and forming the insulating layer are carried out with the wafer mounted to a carrier substrate that supports the wafer and singulated die during both steps.

Abstract: Disclosed are apparatus and methods for material and thermal processing of substrates in a single chamber. In one embodiment, an edge ring is provided. The edge ring includes an annular body having an inner peripheral edge, a first surface, and a second surface opposite the first surface, a first raised member extending substantially orthogonally from the second surface, a second raised member extending from the second surface adjacent the first raised member and separated from the first raised member by a first depression, and a third raised member extending from the second surface adjacent the second raised member and separated by a second depression, the second depression comprising a sloped surface having a reflectivity value that is different than a reflectivity value of the first surface.

Abstract: A method for forming an interconnect structure is provided. The method includes providing a substrate. The method also includes forming a dielectric layer on the substrate, and the dielectric layer includes an extreme low-k (ELK) dielectric layer. The method includes forming a via hole in the dielectric layer and forming a photoresist in the via hole and on the dielectric layer. The method also includes removing the photoresist by a plasma process using a CxHyOz gas and forming a conductive structure in the via hole.

Abstract: Disclosed is a method for etching an insulation film of a processing target object. The method includes: in a first term, periodically switching ON and OFF of a high frequency power so as to excite a processing gas containing fluorocarbon and supplied into a processing container of a plasma processing apparatus; and in a second term subsequent to the first term, setting the high frequency power to be continuously turned ON so as to excite the processing gas supplied into the processing container. In one cycle consisting of a term where the high frequency is turned ON and a term where the high frequency power is turned OFF in the first term, the second term is longer than the term where the high frequency power is turned ON.

Abstract: A method for manufacturing a semiconductor device includes: forming a first active region, a second active region, an inactive region located between the first active region and the second active region, and a third active region, which crosses the inactive region to electrically connect the first active region to the second active region, in a semiconductor layer; forming an insulating layer on the semiconductor layer; and forming an opening selectively in the insulating layer by dry etching.

Abstract: Systems, methods and apparatus for regulating ion energies in a plasma chamber are disclosed. An exemplary method includes placing a substrate in a plasma chamber, forming a plasma in the plasma chamber, controllably switching power to the substrate so as to apply a periodic voltage function to the substrate, and modulating, over multiple cycles of the periodic voltage function, the periodic voltage function responsive to a desired distribution of energies of ions at the surface of the substrate so as to effectuate the desired distribution of ion energies on a time-averaged basis.

Abstract: A plasma CVD device comprises a vacuum vessel that houses a discharge electrode plate and a ground electrode plate to which is attached a substrate for thin film formation. The plasma CVD device has an earth cover at an interval from and facing the aforementioned discharge electrode plate; the aforementioned discharge electrode plate has gas inlets and exhaust outlets (which expel gas introduced through said gas inlets) that are connected at one end to equipment supplying raw gas for thin film formation and that open at the other end at the bottom face of the aforementioned discharge electrode plate; the aforementioned earth cover has second gas inlets corresponding to the aforementioned gas inlets, and second exhaust outlets corresponding to the aforementioned exhaust outlets. The plasma CVD device has an electric potential control plate disposed at an interval from and facing the aforementioned ground cover.

Abstract: A photo-patternable dielectric material is provided to a structure which includes a substrate having at least one gate structure. The photo-patternable dielectric material is then patterned forming a plurality of sacrificial contact structures adjacent the at least one gate structure. A planarized middle-of-the-line dielectric material is then provided in which an uppermost surface of each of the sacrificial contact structures is exposed. Each of the exposed sacrificial contact structures is then removed providing contact openings within the planarized middle-of-the-line dielectric material. A conductive metal-containing material is formed within each contact opening.

Abstract: Disclosed is an etching gas provided containing CHF2COF. The etching gas may contain, as an additive, at least one kind of gas selected from O2, O3, CO, CO2, F2, NF3, Cl2, Br2, I2, XFn (In this formula, X represents Cl, I or Br. n represents an integer satisfying 1?n?7.), CH4, CH3F, CH2F2, CHF3, N2, He, Ar, Ne, Kr and the like, from CH4, C2H2, C2H4, C2H6, C3H4, C3H6, C3H8, HI, HBr, HCl, CO, NO, NH3, H2 and the like, or from CH4, CH3F, CH2F2 and CHF3. This etching gas is not only excellent in etching performances such as the selection ratio to a resist and the patterning profile but also easily available and does not substantially by-produce CF4 that places a burden on the environment.

Abstract: A system and method for a semiconductor device are provided. An embodiment comprises a dielectric layer and masking layers over the dielectric layer. A thin spacer layer is used to form spacers alongside a pattern. A reverse image of the spacer pattern is formed and an enlargement process is used to slightly widen the pattern. The widened pattern is subsequently used to pattern an underlying layer. This process may be used to form a pattern in a dielectric layer, which openings may then be filled with a conductive material.