Abstract: A method for fabricating a structure in magnetic recording head is described. First and second hard mask layers are provided on the layer(s) for the structure. A BARC layer and photoresist mask having a pattern are provided on the second hard mask layer. The pattern includes a line corresponding to the structure. The pattern is transferred to the BARC layer and the second hard mask layer in a single etch using an etch chemistry. At least the second hard mask layer is trimmed using substantially the same first etch chemistry. A mask including a hard mask line corresponding to the line and less than thirty nanometers wide is thus formed. The pattern of the second hard mask is transferred to the first hard mask layer. The pattern of the first hard mask layer is transferred to the layer(s) such that the structure has substantially the width.

Abstract: A recovery process of a damaged layer and a reducing process of an oxide are performed on a substrate in which the oxide and the damaged layer from which carbon has been eliminated are formed on exposed surfaces of a Cu wiring and a SiCOH film as a low-k film, respectively. In the same processing chamber 51, a recovery process of a damaged layer 15 and a reducing process of an oxide/fluoride layer 16 are performed on a wafer W in which the damaged layer 15 from which carbon has been eliminated and the oxide/fluoride layer 16 are formed on exposed surfaces of an interlayer insulating film 4 containing SiCOH and a wiring 2 containing Cu, respectively, by consecutively supplying H2 gas and TMSDMA gas containing silicon and carbon in sequence.

Abstract: According to one embodiment, a method for patterning a medium having a patterned hard mask applied thereon is disclosed herein. The patterned hard mark includes a plurality of apertures exposing portions of the medium. The method includes directing ions toward the medium, implanting a portion of the ions into the exposed portions of the medium, removing a layer of the patterned hard mask with another portion of the ions, and depositing hard mask material onto the patterned hard mask. Depositing hard mask material onto the exposed portions of the medium may follow implantation of the portion of the ions into the exposed portions of the medium.

Abstract: Post etch treatments (PETs) of low-k dielectric films are described. For example, a method of patterning a low-k dielectric film includes etching a low-k dielectric layer disposed above a substrate with a first plasma process. The etching involves forming a fluorocarbon polymer on the low-k dielectric layer. The low-k dielectric layer is surface-conditioned with a second plasma process. The surface-conditioning removes the fluorocarbon polymer and forms an Si—O-containing protecting layer on the low-k dielectric layer. The Si—O-containing protecting layer is removed with a third plasma process.

Abstract: A method of forming at least one metal or metal alloy feature in an integrated circuit is provided. In one embodiment, the method includes providing a material stack including at least an etch mask located on a blanker layer of metal or metal alloy. Exposed portions of the blanket layer of metal or metal alloy that are not protected by the etch mask are removed utilizing an etch comprising a plasma that forms a polymeric compound and/or complex which protects a portion of the blanket layer of metal or metal alloy located directly beneath the etch mask during the etch.

Abstract: A cold spray barrier coated component of a semiconductor plasma processing chamber comprises a substrate having at least one metal surface wherein a portion of the metal surface is configured to form an electrical contact. A cold spray barrier coating is formed from a thermally and electrically conductive material on at least the metal surface configured to form the electrical contact of the substrate. Further, the cold spray barrier coating may also be located on a plasma exposed and/or process gas exposed surface of the component.

Abstract: Bare aluminum baffles are adapted for resist stripping chambers and include an outer aluminum oxide layer, which can be a native aluminum oxide layer or a layer formed by chemically treating a new or used bare aluminum baffle to form a thin outer aluminum oxide layer.

Abstract: A method for manufacturing a device comprising an elastic member on a substrate includes steps of: forming a sacrificial layer by forming a plurality of sacrificial sub-layers on the substrate; forming a plate member in or on the sacrificial layers connected to the substrate and substantially parallel to a top surface of the substrate; and removing the sacrificial sub-layers after forming the plate member by removing the sacrificial sub-layers in an order different from the reverse order of forming the sacrificial sub-layers.

Abstract: A manufacturing method of a magnetic recording medium includes steps of forming a magnetic recording layer, a first mask layer, a second mask layer containing silicon as primary component, a strip layer, a third mask layer, and a resist layer, a step of patterning the resist layer to provide a pattern, steps of transferring the pattern to the third mask layer, to the strip layer, and to the second mask layer, a step of removing the strip layer by wet etching and of stripping the third mask layer and the resist layer above the magnetic recording layer, steps of transferring the pattern to the first mask layer and to the magnetic recording layer, and a step of stripping the first mask layer remaining on the magnetic recording layer.

Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid may have slots of a particular aspect ratio which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber. The lower sub-chamber plasma has a lower electron density, lower effective electron temperature, and higher negative ion:positive ion ratio as compared to the upper sub-chamber plasma. The disclosed embodiments may result in an etching process having good center to edge uniformity, selectivity, profile angle, and Iso/Dense loading.

Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. Where multiple plasma grids are used, one or more of the grids may be movable, allowing for tenability of the plasma conditions in at least the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber.

Abstract: A method of forming a dense oxide coating on an aluminum component of semiconductor processing equipment comprises cold spraying a layer of pure aluminum on a surface of the aluminum component to a predetermined thickness. A dense oxide coating is then formed on the layer of pure aluminum using a plasma electrolytic oxidation process, wherein the plasma electrolytic oxidation process causes the layer of pure aluminum to undergo microplasmic discharges, thus forming the dense oxide coating on the layer of pure aluminum on the surface of the aluminum component.

Abstract: A plasma processing apparatus includes a heater in thermal contact with a showerhead electrode, and a temperature controlled top plate in thermal contact with the heater to maintain a desired temperature of the showerhead electrode during semiconductor substrate processing. A gas distribution member supplies a process gas and radio frequency (RF) power to the showerhead electrode.

Abstract: Components of semiconductor material processing chambers are disclosed, which may include a substrate and at least one corrosion-resistant coating formed on a surface thereof. The at least one corrosion-resistant coating is a high purity metal coating formed by a cold-spray technique. An anodized layer can be formed on the high purity metal coating. The anodized layer comprises a process-exposed surface of the component. Semiconductor material processing apparatuses including one or more of the components are also disclosed, the components being selected from the group consisting of a chamber liner, an electrostatic chuck, a focus ring, a chamber wall, an edge ring, a plasma confinement ring, a substrate support, a baffle, a gas distribution plate, a gas distribution ring, a gas nozzle, a heating element, a plasma screen, a transport mechanism, a gas supply system, a lift mechanism, a load lock, a door mechanism, a robotic arm and a fastener.

Abstract: A method of manufacturing a semiconductor device including a wafer using a plasma etching device which includes a chamber, a chuck provided in the chamber to dispose a wafer to be processed thereon, a focus ring disposed at a peripheral edge portion of the chuck, and a gas supplying mechanism configured to supply various types of gases depending a radial position of the wafer. The method includes: placing a wafer formed with an organic film on the chuck; introducing an etching gas which etches the organic film on the wafer from the process gas supplying mechanism to a central portion of the wafer; introducing an etching inhibiting factor gas having a property of reacting with the etching gas to the peripheral edge portion of the wafer from the gas supplying mechanism; and performing plasma etching on the wafer using the etching gas.

Abstract: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber enclosing a substrate support, a remote plasma source, and a showerhead. A substrate heater can be mounted in the substrate support. A transport system moves the substrate support and is capable of positioning the substrate. The plasma system may be used to generate activated hydrogen species. The activated hydrogen species can be used to etch/clean semiconductor oxide surfaces such as silicon oxide or germanium oxide.

Abstract: This disclosure relates to a plasma processing system for controlling plasma density near the edge or perimeter of a substrate that is being processed. The plasma processing system may include a plasma chamber that can receive and process the substrate using plasma for etching the substrate, doping the substrate, or depositing a film on the substrate. This disclosure relates to a plasma processing system for controlling plasma density near the edge or perimeter of a substrate that is being processed. In one embodiment, the plasma density may be controlled by reducing the rate of loss of ions to the chamber wall during processing. This may include biasing a dual electrode ring assembly in the plasma chamber to alter the potential difference between the chamber wall region and the bulk plasma region.

Abstract: An inductively coupled plasma processing apparatus includes a chamber configured to provide a space for processing a substrate and including a window formed in an upper portion thereof, a substrate stage configured to support the substrate within the chamber and including a lower electrode, the lower electrode configured to receive a first radio frequency signal, an upper electrode arranged on the upper portion of the chamber with the window interposed between the upper electrode and the space for processing the substrate, the upper electrode configured to receive a second radio frequency signal, a conductive shield member arranged within the chamber and configured to cover the window, and a shield power supply configured to apply a shield signal to the shield member in synchronization with the second radio frequency signal.

Abstract: Methods and apparatus for plasma-enhanced substrate processing are provided herein. In some embodiments, a method is provided for processing a substrate in a process chamber having a plurality of electromagnets disposed about the process chamber to form a magnetic field within the process chamber at least at a substrate level. In some embodiments, the method includes determining a first direction of an external magnetic field present within the process chamber while providing no current to the plurality of electromagnets; providing a range of currents to the plurality of electromagnets to create a magnetic field within the process chamber having a second direction opposing the first direction; determining a desired magnitude in the second direction of the magnetic field over the range of currents; and processing a substrate in the process chamber using a plasma while statically providing the magnetic field at the desired magnitude.

Abstract: Methods for processing a substrate are provided herein. In some embodiments, a method for processing a substrate may include placing a substrate atop a substrate support disposed beneath a processing volume of a process chamber having a grounded shield surrounding the process volume and a conductive cover ring selectably supportable by the grounded shield; positioning the substrate support in a first position such that the substrate support is not in contact with the conductive cover ring and such that a conductive member electrically coupled to the cover ring contacts the grounded shield to electrically couple the cover ring to the grounded shield; and performing a plasma enhanced etch process on the substrate.

Abstract: Advantages of a conventional upper electrode DC power applying manner can be maintained and disadvantages of the upper electrode DC power applying manner can be removed. In a capacitively coupled plasma processing apparatus, a first high frequency power RFH for plasma generation and a second high frequency power RFL for ion attraction are overlapped with each other to be applied to a susceptor (lower electrode) 16. Further, an AC power having a preset frequency is applied to an upper electrode 46 via a matching unit 66 and a blocking capacitor 68 from an AC power supply 64. Furthermore, the AC power has a frequency, which ions in plasma can follow, and the AC power supply 64 can vary a power, a voltage peak value, or an effective value the AC power.

Abstract: A method for automatically performing power matching using a mechanical RF match during substrate processing is provided. The method includes providing a plurality of parameters for the substrate processing wherein the plurality of parameters including at least a predefined number of learning cycles. The method also includes setting the mechanical RF match to operate in a mechanical tuning mode. The method further includes providing a first set of instructions to the substrate processing to ignore a predefined number of cycles of Rapid Alternating Process RAP steps. The method yet also includes operating the mechanical RF match in the mechanical tuning mode for the predefined number of learning cycles. The method yet further includes determining a set of optimal capacitor values. The method moreover includes providing a second set of instructions to a power generator to operate in a frequency tuning mode.

Abstract: The invention discloses an etch-back method for planarization at the position-near-interface of an interlayer dielectric (ILD), comprising: depositing or growing a thick layer of SiO2 by the chemical vapor deposition or oxidation method on a surface of a wafer; spin-coating a layer of SOG and then performing a heat treatment to obtain a relatively uniform stack structure; perform an etch-back on the SOG using a plasma etching, and stopping when approaching the position-near-interface of SiO2; performing a plasma etch-back on the remaining SOG/SiO2 structure at the position-near-interface until achieving a desired thickness. Since a two-step etching at the position-near-interface is employed, an extremely good smooth surface of the ILD is obtained. That is, a planar and tidy surface of the ILD is obtained not only in the center region, but also even at the edge of the wafer.

Abstract: A method for etching trenches in an etch layer disposed below a patterned organic mask is provided. The patterned organic mask is treated, comprising flowing a treatment gas comprising H2 and N2, forming a plasma from the treatment gas, making patterned organic mask more resistant to wiggling, and stopping the flow of the treatment gas. Trenches are etched in the etch layer through the patterned organic mask.

Abstract: A trench is formed in a semiconductor substrate by depositing an etch mask on the substrate having an opening, etching of the trench through the opening, and doping the walls of the trench. The etching step includes a first phase having an etch power set to etch the substrate under the etch mask, and a second phase having an etch power set smaller than the power of the first phase. Further, the doping of the walls of the trench is applied through the opening of the etch mask.

Abstract: A method for forming lines in an etch layer on a substrate may comprise providing a ultra-violet (UV) producing gas to a vacuum chamber having a photoresist mask, ionizing the UV producing gas to produce UV rays to irradiate the photoresist mask, and etching the lines into the etch layer through the photoresist mask.

Abstract: A substrate processing method using a substrate processing apparatus includes a first step and a second step. The first step is to apply a negative voltage pulse from a pulsed power supply to be included in the apparatus. The second step is to apply floating potential for an interval of time between the negative voltage pulse and a positive voltage pulse from the pulsed power supply subsequent to the negative voltage pulse. In addition, the apparatus includes a chamber, a first electrode, a second electrode, an RF power supply, and the pulsed power supply. The second electrode is provided so that the second electrode faces the first electrode to hold a substrate. The RF power supply applies an RF voltage having a frequency of 50 MHz or higher to the second electrode. The pulsed power supply repeatedly applies a voltage waveform with the RF voltage to the second electrode.

Abstract: A method for processing a substrate is provided; wherein the method comprises applying a film of a copolymer composition, comprising a poly(styrene)-b-poly(siloxane) block copolymer component; and, an antioxidant to a surface of the substrate; optionally, baking the film; subjecting the film to a high temperature annealing process under a gaseous atmosphere for a specified period of time; followed by a treatment of the annealed film to remove the poly(styrene) from the annealed film and to convert the poly(siloxane) in the annealed film to SiOx.

Abstract: The disclosure relates to a method for making a grating. The method includes the following steps. First, a substrate is provided. Second, a patterned mask layer is formed on a surface of the substrate. Third, the substrate with the patterned mask layer is placed in a microwave plasma system. Fourth, a plurality of etching gases are guided into the microwave plasma system simultaneously to etch the substrate through three stages. The etching gas includes carbon tetrafluoride (CF4), argon (Ar2), and sulfur hexafluoride (SF6). Finally, the patterned mask layer is removed.

Abstract: A method for processing a substrate is provided; wherein the method comprises applying a film of a copolymer composition, comprising a poly(styrene)-b-poly(siloxane) block copolymer component; and, an antioxidant to a surface of the substrate; optionally, baking the film; annealing the film in a gaseous atmosphere containing ?20 wt % oxygen; followed by a treatment of the annealed film to remove the poly(styrene) from the annealed film and to convert the poly(siloxane) in the annealed film to SiOx.

Abstract: A plasma processing apparatus includes a gas distribution member which supplies a process gas and radio frequency (RF) power to a showerhead electrode. The gas distribution member can include multiple gas passages which supply the same process gas or different process gases at the same or different flow rates to one or more plenums at the backside of the showerhead electrode. The gas distribution member provides a desired process gas distribution to be achieved across a semiconductor substrate processed in a gap between the showerhead electrode and a bottom electrode on which the substrate is supported.

Abstract: A method for producing patterns includes inclined flanks from a face of a substrate. A protective mask is formed covering at least two masked areas of the face of the substrate and defining at least one intermediate space. An inclined flank is plasma etched from each masked area, wherein the etching forms continuous passivation layer on the inclined flanks producing autolimitation of the etching when the inclined flanks join each other. The etching is carried out in a chamber and includes the introduction into the chamber of a gas additional to the plasma. The additional gas includes molecules of a chemical species participating in the formation of the passivation layer, the quantity of gas in the chamber being controlled so that the chamber contains a quantity of molecules of the species sufficient to form the passivation layer continuously.

Abstract: The disclosure relates to a method of fabricating a semiconductor device including forming a patterned hardmask layer over a substrate comprising a major surface. The method further includes forming a plurality of first trenches and a plurality of second trenches performed at an electrostatic chuck (ESC) temperature between about 90° C. to 120° C. in the substrate. The plurality of first trenches have a first width and extend downward from the substrate major surface to a first height, and the plurality of second trenches have a second width less than first width and extend downward from the substrate major surface to a second height greater than the first height.

Abstract: A treatment is performed on a surface of a first semiconductor region, wherein the treatment is performed using process gases including an oxygen-containing gas and an etching gas for etching the semiconductor material. An epitaxy is performed to grow a second semiconductor region on the surface of the first semiconductor region.

Abstract: A method of forming features in a porous low-k dielectric layer disposed below a patterned organic mask is provided. Features are etched into the porous low-k dielectric layer through the patterned organic mask, and then the patterned organic mask is stripped. The stripping of the patterned organic mask includes providing a stripping gas comprising COS, forming a plasma from the stripping gas, and stopping the stripping gas. A cap layer may be provided between the porous low-k dielectric layer and the patterned organic mask. The stripping of the patterned organic mask leaves the cap layer on the porous low-k dielectric layer.

Abstract: A method of ductile mode machining a component of a plasma processing apparatus wherein the component is made of nonmetallic hard and brittle material wherein the method comprises single point turning the component with a diamond cutting tool causing a portion of the nonmetallic hard and brittle material to undergo a high pressure phase transformation to form a ductile phase portion of the hard and brittle material during chip formation wherein a turned surface is formed from a phase changed material and the turned surface is a grooved textured surface of phase changed material.

Abstract: In a control method, a first processing is performed on an object to be processed by controlling a temperature of a base to a first temperature and controlling a temperature of an electrostatic chuck that is disposed on a mounting surface of the base so as to mount thereon the object to be processed and has a heater installed therein to a second temperature. A second processing is performed on the object by controlling a temperature of the base to a third temperature and controlling a temperature of the electrostatic chuck to a fourth temperature by a heater. In the control method, a difference between the first temperature and the second temperature and a difference between the third temperature and the fourth temperature are within a tolerable temperature of the junction layer for bonding the base and the electrostatic chuck.

Abstract: A transistor component includes an active transistor region arranged in the semiconductor body. And insulation region surrounds the active transistor region in the semiconductor body in a ring-shaped manner. A source zone, a drain zone, a body zone and a drift zone are disposed in the active transistor region. The source zone and the drain zone are spaced apart in a lateral direction of the semiconductor body and the body zone is arranged between the source zone and the drift zone and the drift zone is arranged between the body zone and the drain zone. A gate and field electrode is arranged over the active transistor region. The dielectric layer has a first thickness in a region near the body zone and a second thickness in a region near the drift zone.

Abstract: A method of etching an aluminum-containing layer on a substrate is described. The method includes forming plasma from a process composition containing a halogen element, and exposing the substrate to the plasma to etch the aluminum-containing layer. The method may additionally include exposing the substrate to an oxygen-containing environment to oxidize a surface of the aluminum-containing layer and control an etch rate of the aluminum-containing layer. The method may further include forming first plasma from a process composition containing HBr and an additive gas having the chemical formula CxHyRz (wherein R is a halogen element, x and y are equal to unity or greater, and z is equal to zero or greater), forming second plasma from a process composition containing HBr, and exposing the substrate to the first plasma and the second plasma to etch the aluminum-containing layer.

Abstract: A method for transferring a feature pattern to a thin film on a substrate is described. The method comprises disposing a substrate comprising one or more mask layers overlying a thin film in a plasma processing system, and forming a feature pattern in the one or more mask layers. The method further comprises transferring the feature pattern in the one or more mask layers to the thin film by: performing a first plasma etching process at a first pressure less than about 80 mtorr, and performing a second plasma etching process at a second pressure greater than about 80 mtorr.

Abstract: A method for performing a spacer etch process is described. The method includes conformally applying a spacer material over a gate structure on a substrate, and performing a spacer etch process sequence to partially remove the spacer material from the gate structure and the substrate, while retaining a sidewall spacer positioned along a sidewall of the gate structure. The spacer etch process sequence may include depositing a SiOCl-containing layer on an exposed surface of the spacer material to form a spacer protection layer.

Abstract: Methods of etching exposed silicon on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor and a hydrogen-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the exposed regions of silicon. The plasmas effluents react with the patterned heterogeneous structures to selectively remove silicon while very slowly removing other exposed materials. The silicon selectivity results, in part, from a preponderance of hydrogen-containing precursor in the remote plasma which hydrogen terminates surfaces on the patterned heterogeneous structures. A much lower flow of the fluorine-containing precursor progressively substitutes fluorine for hydrogen on the hydrogen-terminated silicon thereby selectively removing silicon from exposed regions of silicon.

Abstract: A method for profiling a film stack includes receiving a film stack having an insulation layer, a dielectric hard mask layer, and a patterned metal hard mask layer. The pattern in the patterned metal hard mask layer is transferred to the dielectric hard mask layer using a first dry etching process. The pattern in the dielectric hard mask layer is then transferred to the insulation layer using a second dry etching process including one or more halogen-containing gases. The second etching process etches the insulation layer and removes a portion of the patterned metal hard mask layer, which exposes a corner of the underlying dielectric hard mask layer. Portions of the dielectric hard mask layer that overhang the insulation layer are removed using a third dry etching process including a process composition that is more selective to the dielectric hard mask layer relative to the insulation layer.

Abstract: An exemplary system may include a chamber configured to contain a semiconductor substrate in a processing region of the chamber. The system may include a first remote plasma unit fluidly coupled with a first access of the chamber and configured to deliver a first precursor into the chamber through the first access. The system may still further include a second remote plasma unit fluidly coupled with a second access of the chamber and configured to deliver a second precursor into the chamber through the second access. The first and second access may be fluidly coupled with a mixing region of the chamber that is separate from and fluidly coupled with the processing region of the chamber. The mixing region may be configured to allow the first and second precursors to interact with each other externally from the processing region of the chamber.

Abstract: A method of making a Si containing gas distribution member for a semiconductor plasma processing chamber comprises forming a carbon member into an internal cavity structure of the Si containing gas distribution member. The method includes depositing Si containing material on the formed carbon member such that the Si containing material forms a shell around the formed carbon member. The Si containing shell is machined into the structure of the Si containing gas distribution member wherein the machining forms gas inlet and outlet holes exposing a portion of the formed carbon member in an interior region of the Si containing gas distribution member.

Abstract: The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a cover ring disposed above the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma.

Abstract: A plasma processing apparatus having a dielectric member that surrounds a circular chamber having a long shape and communicating with an opening portion having a long and linear shape, a gas supply pipe for introducing gas into an inside of the circular chamber, a coil provided in a vicinity of the circular chamber and having a long shape in parallel with a longitudinal direction of the opening portion, a high-frequency power supply connected to the coil, a base material mounting table that mounts a base material, and a moving mechanism that allows relative movement between the circular chamber and the base material mounting table in a perpendicular direction with respect to an longitudinal direction of the opening portion.

Abstract: The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a cover ring disposed above the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma.

Abstract: A method of drilling holes comprises ductile mode drilling the holes in a component of a plasma processing apparatus with a cutting tool wherein the component is made of a nonmetallic hard and brittle material. The method comprises drilling each hole in the component by controlling a depth of cut while drilling such that a portion of the brittle material undergoes high pressure phase transformation and forms amorphous portions of the brittle material during chip formation. The amorphous portions of the brittle material are removed from each hole such that a wall of each hole formed in the component has an as drilled surface roughness (Ra) of about 0.2 to 0.8 ?m.

Abstract: Embodiments of the present disclosure generally provide apparatus and method for improving processing uniformity by reducing external magnetic noises. One embodiment of the present disclosure provides an apparatus for processing semiconductor substrates. The apparatus includes a chamber body defining a vacuum volume for processing one or more substrate therein, and a shield assembly for shielding magnetic flux from the chamber body disposed outside the chamber body, wherein the shield assembly comprises a bottom plate disposed between the chamber body and the ground to shield magnetic flux from the earth.