Abstract: Boron-doped carbon-based hardmask etch processing is described. In an example, a method of patterning a film includes etching a boron-doped amorphous carbon layer with a plasma based on a combination of CH4/N2/O2 and a flourine-rich source such as, but not limited to, CF4, SF6 or C2F6.

Abstract: A plasma processing apparatus for applying an etching processing to a wafer by using at least two steps of the etching processing which operate with plasma formed within a pressure-reduced processing chamber, the wafer being located within the processing chamber inside a vacuum vessel, and having a mask on a silicon-composed substrate and a film structure, the film structure including processing-target films located under the mask, wherein the plasma processing apparatus is equipped with a function for processing another different wafer in such a manner that a processing condition at a precedent-stage step of the two steps of the etching processing in the processing of the different wafer is adjusted based on a result obtained by detecting a time which has elapsed until termination of a subsequent-stage step of the two steps of the etching processing.

Abstract: The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a cover ring disposed above the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma.

Abstract: The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a cover ring disposed above the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma.

Abstract: In a substrate processing method, a polysilicon layer 38 on a wafer W is etched with a bromine cation 45a and a bromine radical 45b in plasma generated from a processing gas containing a hydrogen bromide gas, an oxygen gas, and a nitrogen trifluoride gas, and then, is ashed with an oxygen radical 46 and a nitrogen radical 47 in plasma generated from a processing gas containing an oxygen gas and a nitrogen gas. Thereafter, the polysilicon layer 38 is etched with a fluorine cation 48a and a fluorine radical 48b in plasma generated from a processing gas containing an argon gas and a nitrogen trifluoride gas. While the polysilicon layer 38 is ashed, an oxidation process is performed on a silicon bromide generated by etching the polysilicon layer 38 with the bromine cation 45a.

Abstract: Apparatus and methods for plasma etching are disclosed. In one embodiment, a method for etching a plurality of features on a wafer includes positioning the wafer within a chamber of a plasma etcher, generating plasma ions using a radio frequency power source and a plasma source gas, directing the plasma ions toward the wafer using an electric field, and focusing the plasma ions using a plasma focusing ring. The plasma focusing ring is configured to increase a flux of plasma ions arriving at a surface of the wafer to control the formation of the plurality of features and structures associated therewith.

Abstract: A plasma etching apparatus includes a processing chamber; a holding unit for holding the substrate within the processing chamber; an electrode plate facing the holding unit; a plurality of supply parts arranged at different radial positions with respect to the substrate for supplying processing gas to a space between the holding unit and the electrode plate; a high frequency power supply that supplies high frequency power to the holding unit and/or the electrode plate to convert the processing gas supplied to the space into plasma; an adjustment unit that adjusts a supply condition for each of the supply parts; and a control unit that controls the adjustment unit to vary the supply condition between a position where an effect of diffusion of processing gas on an active species concentration distribution at the substrate is dominant and a position where an effect of flow of the processing gas is dominant.

Abstract: A gas switching system for a gas distribution system for supplying different gas compositions to a chamber, such as a plasma processing chamber of a plasma processing apparatus, is provided. The chamber can include multiple zones, and the gas switching section can supply different gases to the multiple zones. The switching section can switch the flows of one or more gases, such that one gas can be supplied to the chamber while another gas can be supplied to a by-pass line, and then switch the gas flows.

Abstract: Uniformity of a plasma process on a surface of a substrate is to be improved. In a plasma processing apparatus that processes a substrate by generating plasma from a processing gas introduced in a processing container, a ratio between an introducing amount of the processing gas introduced to a center portion of the substrate received in the processing container and an introducing amount of the processing gas introduced to a peripheral portion of the substrate received in the processing container is changed during a plasma process. Accordingly, a variation in an etching rate or the like between the center portion and the peripheral portion of the substrate may be reduced. Therefore, uniformity of the plasma process on the surface of the substrate is improved.

Abstract: The present disclosure is directed to a method of manufacturing a semiconductor structure in which a low-k dielectric layer is formed over a semiconductor substrate. Features can be formed proximate to the low-k dielectric layer by plasma etching with a plasma formed of a mixture of a CO2, CO, or carboxyl-containing source gas and a fluorine-containing source gas. The method allows for formation of damascene structures without encountering the problems associated with damage to a low-K dielectric layer.

Abstract: A substrate processing apparatus includes a first processing chamber and a second processing chamber, a first substrate holding unit that holds a substrate in the first processing chamber, a chemical solution supply unit that supplies a chemical solution containing an etching component and a thickening agent to the substrate held by the first substrate holding unit, a substrate transfer unit that transfers the substrate from the first processing chamber to the second processing chamber in a state in which the chemical solution is held on the substrate, and a second substrate holding unit that holds a plurality of substrates on each of which the chemical solution is held in the second processing chamber.

Abstract: Embodiments of the invention generally relate to an apparatus and method for plasma etching. In one embodiment, the apparatus includes a process ring with an annular step away from an inner wall of the ring and is disposed on a substrate support in a plasma process chamber. A gap is formed between the process ring and a substrate placed on the substrate support. The annular step has an inside surface having a height ranging from about 3 mm to about 6 mm. During operation, an edge-exclusion gas is introduced to flow through the gap and along the inside surface, so the plasma is blocked from entering the space near the edge of the substrate.

Abstract: A method for anisotropically plasma etching a semiconductor wafer is disclosed. The method comprises supporting a wafer in an environment operative to form a plasma, such as a plasma reactor, and providing an etching mixture to the environment. The etching mixture comprises at least one etch component, at least one passivation component, and at least one passivation material removal component.

Abstract: In the manufacture of integrated circuits, reactive compositions that include a reactive etchant species and an oxygen-containing species can provide selective removal of target material and can reduce contamination of gas delivery lines.

Abstract: A method for processing a target object includes arranging a first electrode and a second electrode for supporting the target object in parallel to each other in a processing chamber and processing the target object supported by the second electrode by using a plasma of a processing gas supplied into the processing chamber, the plasma being generated between the first electrode and the second electrode by applying a high frequency power between the first electrode and the second electrode. The target object includes an organic film and a photoresist layer formed on the organic film. The processing gas contains H2 gas, and the organic film is etched by a plasma containing H2 by using the photoresist layer as a mask while applying a negative DC voltage to the first electrode.

Abstract: Etching of a thin film stack including a lower thin film layer containing an advanced memory material is carried out in an inductively coupled plasma reactor having a dielectric RF window without exposing the lower thin film layer, and then the etch process is completed in a toroidal source plasma reactor.

Abstract: According to one embodiment, a pattern formation method is disclosed. The method includes forming a plurality of regions on a foundation and the plurality of the regions correspond to different pattern sizes. The method includes separating each of a plurality of block copolymers from another one of the plurality of the block copolymers and segregating the each of the plurality of the block copolymers into a corresponding one of the regions. The method includes performing a phase separation of the each of the block copolymers of each of the regions. The method includes selectively removing a designated phase of each of the phase-separated block copolymers to form a pattern of the each of the block copolymers and the pattern has a different pattern size for the each of the regions.

Abstract: A method of etching silicon oxide from a trench is described which allows more homogeneous etch rates across a varying pattern on a patterned substrate. The method also provides a more rectilinear profile following the etch process. Methods include a sequential exposure of gapfill silicon oxide. The gapfill silicon oxide is exposed to a local plasma treatment prior to a remote-plasma dry etch which may produce salt by-product on the surface. The local plasma treatment has been found to condition the gapfill silicon oxide such that the etch process proceeds at a more even rate within each trench and across multiple trenches. The salt by-product may be removed by raising the temperature in a subsequent sublimation step.

Abstract: A patterning method is provided. First, a substrate having an objective material layer thereon is provided. Thereafter, a mask layer is formed on the objective material layer. Afterwards, a patterned layer is formed over the mask layer, wherein a material of the patterned layer includes a metal-containing substance. Then, the mask layer is patterned to form a patterned mask layer. Further, the objective material layer is patterned, using the patterned mask layer as a mask.

Abstract: An apparatus for etching a dielectric layer contained by a substrate is provided. An etch reactor comprises a top electrode and a bottom electrode. An etch gas source supplies an etch gas into the etch reactor. A first Radio Frequency (RF) source generates a first RF power with a first frequency and supplies the first RF power into the etch reactor, whereas the first frequency is between 100 kilo Hertz (kHz) and 600 kHz. A second RF source generates a second RF power with a second frequency and supplies the second RF power into the etch reactor, whereas the second frequency is at least 10 mega Hertz (MHz).

Abstract: An actively heated aluminum baffle component such as a thermal control plate or baffle ring of a showerhead electrode assembly of a plasma processing chamber has an exposed outer aluminum oxide layer which is formed by an electropolishing procedure. The exposed outer aluminum oxide layer minimizes defects and particles generated as a result of differential thermal stresses experienced by the aluminum component and outer aluminum oxide layer during plasma processing compared to an identically shaped component having a Type III anodized surface.

Abstract: An apparatus for control of a temperature of a substrate has a temperature-controlled base, a heater, a metal plate, a layer of dielectric material. The heater is thermally coupled to an underside of the metal plate while being electrically insulated from the metal plate. A first layer of adhesive material bonds the metal plate and the heater to the top surface of the temperature controlled base. This adhesive layer is mechanically flexible, and possesses physical properties designed to balance the thermal energy of the heaters and an external process to provide a desired temperature pattern on the surface of the apparatus. A second layer of adhesive material bonds the layer of dielectric material to a top surface of the metal plate. This second adhesive layer possesses physical properties designed to transfer the desired temperature pattern to the surface of the apparatus. The layer of dielectric material forms an electrostatic clamping mechanism and supports the substrate.

Abstract: The present invention relates to a method of generating a hole or recess or well in an electrically insulating or semiconducting substrate, and to a hole or recess or well in a substrate generated by this method. The invention also relates to an array of holes or recesses or wells in a substrate generated by the method. The invention also relates to a device for performing the method according to the present invention.

Abstract: A method for manufacturing a semiconductor device includes forming a patterned photoresist layer over a substrate, performing a plasma ashing process to the patterned photoresist layer, thereby removing a portion of the patterned photoresist layer, exposing the patterned photoresist layer to broadband ultraviolet radiation and ozone, thereby removing other portions of the patterned photoresist layer, and performing a cleaning of the patterned photoresist layer after exposing the patterned photoresist layer to broadband ultraviolet radiation and ozone.

Abstract: The present invention provides, in a plasma etching method for plasma-etching a magnetic film, a plasma etching method that allows a desired etching depth to be obtained regardless of the opening size of a mask. The present invention is, in a plasma etching method for plasma-etching a magnetic film by using a tantalum film as a mask, characterized by including: a first process to plasma-etch the magnetic film to a desired depth by using a mixed gas of an ammonia gas and a helium gas; and a second process, after the first process, to plasma-etch the magnetic film etched to the prescribed depth by using a mixed gas of an ammonia gas and a gas containing the oxygen element or a mixed gas of an ammonia gas and a gas containing a hydroxyl group.

Abstract: Wafers having a high K dielectric layer and an oxide or nitride containing layer are etched in an inductively coupled plasma processing chamber by applying a source power to generate an inductively coupled plasma, introducing into the chamber a gas including BCl3, setting the temperature of the wafer to be between 100° C. and 350° C., and etching the wafer with a selectivity of high K dielectric to oxide or nitride greater than 10:1. Wafers having an oxide layer and a nitride layer are etched in a reactive ion etch processing chamber by applying a bias power to the wafer, introducing into the chamber a gas including BCl3, setting the temperature of the wafer to be between 20° C. and 200° C., and etching the wafer with an oxide to nitride selectivity greater than 10:1.

Abstract: A palladium plated aluminum component of a semiconductor plasma processing chamber comprises a substrate including at least an aluminum or aluminum alloy surface, and a palladium plating on the aluminum or aluminum alloy surface of the substrate. The palladium plating comprises an exposed surface of the component and/or a mating surface of the component.

Abstract: Methods of forming a semiconductor device are provided. The methods include, for example, forming a low-k dielectric having a continuous planar surface, and, after forming the low-k dielectric, subjecting the continuous planar surface of the low-k dielectric to an ethylene plasma enhanced chemical vapor deposition (PECVD) treatment.

Abstract: An ICP A plasma reactor having an enclosure wherein at least part of the ceiling forms a dielectric window. A substrate support is positioned within the enclosure below the dielectric window. An RF power applicator is positioned above the dielectric window to radiate RF power through the dielectric window and into the enclosure. A plurality of gas injectors are distributed uniformly above the substrate support to supply processing gas into the enclosure. A circular baffle is situated inside the enclosure and positioned above the substrate support but below the plraity of gas injectors so as to redirect the flow of the processing gas.

Abstract: Provided is an etching method capable of etching even a silicon film that is included in a multi-layered structure by using a resist film or an organic film as a mask, and also capable of integrally etching the silicon film and a silicon oxide film disposed under the silicon film. The etching method which etches the multi-layered structure including the silicon oxide film and the silicon film formed on the silicon oxide film, includes: integrally etching the silicon film and the silicon oxide film included in the multi-layered structure by using a resist film or an organic film as an etching mask and using an etching gas containing a CH2F2 gas as an etching gas, when the silicon film and the silicon oxide film in the multi-layered structure are etched.

Abstract: A tungsten carbide coated chamber component of semiconductor processing equipment includes a metal surface, optional intermediate nickel coating, and outer tungsten carbide coating. The component is manufactured by optionally depositing a nickel coating on a metal surface of the component and depositing a tungsten carbide coating on the metal surface or nickel coating to form an outermost surface.

Abstract: A plasma processing apparatus includes a processing chamber having a plasma processing space therein and a substrate support in the processing chamber at a first end for supporting a substrate. A plasma source is coupled into the processing space and configured to form a plasma at a second end of the processing chamber opposite said first end. The apparatus further includes a magnetic grid having an intensity of a magnetic flux therein, a plurality of passageways penetrating from a first side to a second side, a thickness, a transparency, a passageway aspect ratio, and a position within the processing chamber between the second end and the substrate. The intensity, the thickness, the transparency, the passageway aspect ratio, and the position are configured to cause electrons having energies above an acceptable maximum level to divert from the direction. A method of obtaining low average electron energy flux onto the substrate is also provided.

Abstract: A method for forming a contact opening, such as a via hole, is provided. In the method, a sacrificial layer is deposited over a damascene feature prior to exposing a conductor formed in a substrate at a bottom of the opening. The sacrificial layer is provided to prevent damage or contamination of materials used. Even after the conductor has been exposed once or more times, the sacrificial layer can be deposited over the damascene feature to protect it from further damage or contamination by a subsequent process that will further expose the conductor at the contact opening bottom. The exposing step may form a recess in the conductor. By further forming a trench feature over the contact opening, a dual damascene feature can be fabricated.

Abstract: A method for improving the uniformity of high-frequency discharge plasma by means of frequency modulation is disclosed. In a plasma discharge chamber, there is a pair of parallel electrodes. A high-frequency power supply is adopted to feed the electrodes. The frequency range of the electromagnetic field is 13.56 MHz˜160 MHz. Discharge gas is input to form plasma. The frequency of the fed-in high-frequency electromagnetic field is under automatic tuning control, and keeps changing cyclically without stop in the course of plasma discharge. The range of the frequency change may fall into either a portion of or the entire range of 13.56 MHz˜160 MHz and makes the locations with higher plasma density on the plane in parallel with the electrodes and in the plasma discharge space changed cyclically. In a time slot longer than one frequency change cycle, the average plasma density between the parallel electrodes is uniform.

Abstract: A plasma processing apparatus includes a process chamber housing defining a process chamber, a platen positioned in the process chamber for supporting a workpiece, a source configured to generate plasma in the process chamber, and a biasing system. The biasing system is configured to bias the platen to attract ions from the plasma towards the workpiece during a first processing time interval and configured to bias the platen to repel ions from the platen towards interior surfaces of the process chamber housing during a cleaning time interval. The cleaning time interval is separate from the first processing time interval and occurring after the first processing time interval.

Abstract: In a method of manufacturing a semiconductor device, a substrate is loaded to a process chamber having, unit process sections in which unit processes are performed, respectively. The unit processes are performed on the substrate independently from one another at the unit process sections under a respective process pressure. The substrate sequentially undergoes the unit processes at the respective unit process section of the process chamber. Cleaning processes are individually performed to the unit process sections, respectively, when the substrate is transferred from each of the unit process sections and no substrate is positioned at the unit process sections. Accordingly, the process defects of the process units may be sufficiently prevented and the operation period of the manufacturing apparatus is sufficiently elongated.

Abstract: A method for manufacturing a nozzle and an associated funnel in a single plate comprises providing the single plate, the plate being etchable; providing an etch resistant mask on the plate, the mask having a pattern, wherein the pattern comprises a first pattern part for etching the nozzle and a second pattern part for etching the funnel; covering one of the first pattern part and the second pattern part using a first cover; etching one of the nozzle and funnel corresponding to the pattern part not covered in step (c); removing the first cover; etching the other one of the nozzle and funnel; and removing the etch resistant mask.

Abstract: Systems and methods are described relating to semiconductor processing chambers. An exemplary chamber may include a first remote plasma system fluidly coupled with a first access of the chamber, and a second remote plasma system fluidly coupled with a second access of the chamber. The system may also include a gas distribution assembly in the chamber that may be configured to deliver both the first and second precursors into a processing region of the chamber, while maintaining the first and second precursors fluidly isolated from one another until they are delivered into the processing region of the chamber.

Abstract: A method for forming etched features in a low-k dielectric layer disposed below the photoresist mask in a plasma processing chamber is provided. Features are etched into the low-k dielectric layer through the photoresist mask. The photoresist mask is stripped, wherein the stripping comprising at least one cycle, wherein each cycle comprises a fluorocarbon stripping phase, comprising flowing a fluorocarbon stripping gas into the plasma processing chamber, forming a plasma from the fluorocarbon stripping gas, and stopping the flow of the fluorocarbon stripping gas into the plasma processing chamber and a reduced fluorocarbon stripping phase, comprising flowing a reduced fluorocarbon stripping gas that has a lower fluorocarbon flow rate than the fluorocarbon stripping gas into the plasma processing chamber, forming the plasma from the reduced fluorocarbon stripping gas, and stopping the flow of the reduced fluorocarbon stripping gas.

Abstract: The present invention provides a method for plasma processing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; loading a work piece onto the work piece support, the work piece having a support film, a frame and the substrate; providing a cover ring above the work piece, the cover ring having at least one perforated region, and at least one non-perforated region; generating a plasma using the plasma source; and processing the work piece using the generated plasma.

Abstract: A method for etching features in a silicon layer disposed below a mask in a plasma processing chamber a plurality of cycles is provided. A deposition phase forming a deposition on the silicon layer in the plasma processing chamber is provided comprising providing a deposition gas into the plasma processing chamber wherein the deposition gas comprises a halogen containing etchant component and a fluorocarbon deposition component, forming the deposition gas into a plasma, which provides a net deposition on the silicon layer, and stopping the flow of the deposition gas. A silicon etch phase is provided, comprising providing a silicon etch gas into the plasma processing chamber that is different than the deposition gas, forming the silicon etch gas into a plasma to etch the silicon layer, and stopping the flow of the silicon etch gas.

Abstract: Provided is a trench filling method, which includes: forming a silicon oxide liner on a semiconductor substrate with trenches formed therein, the trenches including narrow-width portions having a first minimum isolation width and wide-width portions having a second minimum isolation width being wider than the first minimum isolation width; forming an oxidation-barrier film on the silicon oxide liner; forming a silicon liner on the oxidation-barrier film; filling the narrow-width portions with a first filling material; filling the wide-width portions with a second filling material; and oxidizing the silicon liner.

Abstract: Provided is a plasma processing apparatus, which includes a table unit installed within a processing vessel and configured to place a substrate thereon, a purge gas supply unit configured to supply a process gas into the processing vessel, a plasma generating unit configured to turn the process gas to plasma, a magnetic field forming mechanism installed at a lateral side of the table unit and configured to form magnetic fields in a processing atmosphere in order to move electrons existing in the plasma of the process gas along a surface of the substrate; and an exhaust mechanism configured to exhaust gas from the interior of the processing vessel. The magnetic fields are opened at at-least one point in a peripheral edge portion of the substrate such that a loop of magnetic flux lines surrounding the peripheral edge portion of the substrate is not formed.

Abstract: A method of suppressing the etch rate for exposed silicon-and-oxygen-containing material on patterned heterogeneous structures is described and includes a two stage remote plasma etch. Examples of materials whose selectivity is increased using this technique include silicon nitride and silicon. The first stage of the remote plasma etch reacts plasma effluents with the patterned heterogeneous structures to form protective solid by-product on the silicon-and-oxygen-containing material. The plasma effluents of the first stage are formed from a remote plasma of a combination of precursors, including a nitrogen-containing precursor and a hydrogen-containing precursor. The second stage of the remote plasma etch also reacts plasma effluents with the patterned heterogeneous structures to selectively remove material which lacks the protective solid by-product. The plasma effluents of the second stage are formed from a remote plasma of a fluorine-containing precursor.

Abstract: The present invention is directed to a method and apparatus for etching various metals that may be used in semiconductor or integrated circuit processing through the use of non-halogen gases such as hydrogen, helium, or combinations of hydrogen and helium with other gases such as argon. In one exemplary embodiment of the present invention, in a reaction chamber, a substrate having a metal interconnect layer deposited thereon is exposed to a plasma formed of non-halogen gas. The plasma generated is maintained for a certain period of time to provide for a desired or expected etching of the metal. In some embodiments, the metal interconnect layer may be copper, gold or silver.

Abstract: Showerhead electrode assemblies are disclosed, which include a showerhead electrode adapted to be mounted in an interior of a vacuum chamber; an optional backing plate attached to the showerhead electrode; a thermal control plate attached to the backing plate or to the showerhead electrode at multiple contact regions across the backing plate; and at least one interface member separating the backing plate and the thermal control plate, or the thermal control plate and showerhead electrode, at the contact regions, the interface member having a thermally and electrically conductive gasket portion and a particle mitigating seal portion. Methods of processing semiconductor substrates using the showerhead electrode assemblies are also disclosed.

Abstract: A plasma etching method includes a preparation process for performing a plasma etching process using a processing gas including a first processing gas containing carbon (C) and fluorine (F), a ratio (C/F) of the first processing gas having a first value, and obtaining a residual amount of the mask layer corresponding to a variation point where a variation amount of the bowing CD is increased; a first plasma etching process using the processing gas including the first processing gas until a residual amount of the mask layer reaches the variation point; and a second plasma etching process performed after the first plasma etching process. The second plasma etching process is performed by using a processing gas including at least a second processing gas containing carbon (C) and fluorine (F), and a ratio (C/F) of the second processing gas is smaller than the first value.

Abstract: A method of suppressing the etch rate for exposed silicon-and-nitrogen-containing material on patterned heterogeneous structures is described and includes a two stage remote plasma etch. The etch selectivity of silicon relative to silicon nitride and other silicon-and-nitrogen-containing material is increased using the method. The first stage of the remote plasma etch reacts plasma effluents with the patterned heterogeneous structures to form protective solid by-product on the silicon-and-nitrogen-containing material. The plasma effluents of the first stage are formed from a remote plasma of a combination of precursors, including nitrogen trifluoride and hydrogen (H2). The second stage of the remote plasma etch also reacts plasma effluents with the patterned heterogeneous structures to selectively remove material which lacks the protective solid by-product. The plasma effluents of the second stage are formed from a remote plasma of a fluorine-containing precursor.

Abstract: In a plasma processing apparatus, thrust-up pins are elevated and a thrust-up force is detected when electrostatic attraction for a substrate by a substrate holding device is ceased after completion of plasma processing, the elevation of the thrust-up pins is ceased upon detection of a detection threshold, and a stepped elevating operation in which the elevation and stoppage of the thrust-up pins are repeated a plurality of times are thereafter commenced on condition that the detected thrust-up force falls to or below the detection threshold and that release of the substrate from a placement surface has not been completed. In the stepped elevating operation, operation timing of the thrust-up device is controlled so that the completion of the release of the substrate from the placement surface is detected when the thrust-up pins are stopped after being elevated and so that the stepped elevating operation is continued on condition that the release has not been completed.

Abstract: This invention is directed to form a homogeneous film in a via hole formed in a semiconductor device using Bosch process. The via hole that penetrates through a predetermined region in a semiconductor substrate is formed by etching the semiconductor substrate from one of its surface to the other by the Bosch process using a mask layer as a mask. Next, the mask layer is removed. Then, scallops are removed by dry etching to flatten a sidewall of the via hole. Following the above, an insulation film, a barrier layer and the like are formed homogeneously in the via hole.