Abstract: In accordance with an embodiment, a semiconductor device includes a substrate, a line-and-space structure, a first film and a second film. The line-and-space structure includes line patterns arranged on the substrate parallel to one another at a predetermined distance. The first film is formed on side surfaces and bottom surfaces of the line patterns by an insulating film material. The second film is formed on the line-and-space structure across a space between the line patterns by a material showing low wettability to the first film. Space between the line patterns includes an air gap in which at least a bottom surface of the first film is totally exposed.

Abstract: An apparatus and system for stirring liquid inside a flow cell. In one implementation, the apparatus includes a rotatable disc configured to receive liquid at a top side of the disc and distribute the liquid substantially evenly around a periphery of the flow cell. The disc has a triangular cross sectional area. The apparatus may further include a set of fins attached to a bottom side of the disc, wherein the set of fins is configured to draw the liquid from the periphery of the flow cell into the center of the flow cell.

Abstract: Embodiments related to measuring process pressure in low-pressure semiconductor processing environments are provided. In one example, a semiconductor processing module for processing a substrate with a process gas in a vacuum chamber is provided. The example module includes a reactor positioned within the vacuum chamber for processing the substrate with the process gas and a pressure-sensitive structure operative to transmit a pressure transmission fluid pressure to a location exterior to the vacuum chamber. In this example, the pressure transmission fluid pressure varies in response to the process gas pressure within the vacuum chamber.

Abstract: Techniques are described for increasing the density of structures in a layout circuit design, while reducing undesired total interconnect capacitance that might otherwise be created by the increase in structure density. Data representing a pattern of fill structures is added to the fill regions of the design for one of the layers. Data representing a pattern of fill structures then is added to the fill regions of the design for another of the layers adjacent to the first layer. In the design for the second conductive layer, however, the pattern of fill structures is offset from the pattern of fill structures added to the design for the first layer in a direction substantially parallel to the layers. The offset may be selected to minimize or otherwise reduce the amount of overlap between the fill structures along a direction substantially perpendicular to the layers, thereby reducing the total interconnect capacitance associated with the layers.

Abstract: A semiconductor device includes a plurality of wiring lines which are provided on an upper side of a semiconductor substrate and which have connection pad portions, and columnar electrodes are provided on the connection pad portions of the wiring lines. A first sealing film is provided around the columnar electrodes on the upper side of the semiconductor substrate and on the wiring lines. A second sealing film is provided on the first sealing film. The first sealing film is made of a resin in which fillers are not mixed, and the second sealing film is made of a material in which fillers are mixed in a resin.

Abstract: An apparatus and methods for depositing amorphous and microcrystalline silicon films during the formation of solar cells are provided. In one embodiment, a method and apparatus is provided for generating and introducing hydrogen radicals directly into a processing region of a processing chamber for reaction with a silicon-containing precursor for film deposition on a substrate. In one embodiment, the hydrogen radicals are generated by a remote plasma source and directly introduced into the processing region via a line of sight path to minimize the loss of energy by the hydrogen radicals prior to reaching the processing region.

Abstract: Method for depositing a layer on a surface of a substrate. The method comprises injecting a precursor gas from a precursor supply into a deposition cavity for contacting the substrate surface, draining part of the injected precursor gas from the deposition cavity, and positioning the deposition cavity and the substrate relative to each other along a plane of the substrate surface. The method further comprising providing a first electrode and a second electrode, positioning the first electrode and the substrate relative to each other, and generating a plasma discharge near the substrate for contacting the substrate by generating a high-voltage difference between the first electrode and the second electrode. The method comprises generating the plasma discharge selectively, for patterning the surface by means of the plasma. A portion of the substrate contacted by the precursor gas selectively overlaps with a portion of the substrate contacted by the plasma.

Abstract: Different gases are separately exposed to RF energy in different zones in inlets to a processing chamber. Plasma is activated in the gases in each of the zones separately and the activated gases are then introduced into the plasma processing chamber where they may undergo mutual interaction within a processing zone. Control of the active species distribution within the processing chamber is provided by control of the energizing of the gases in the separate inlet zones before they are combined in the processing zone. An ICP source energizes gas in each zone through an antenna having one or more conductors, each of which is coupled to a plurality of the zones. This allows gases to be brought together in their active states, rather than being combined and then activated, and allows the same or different parameters to be applied in different inlet zones.

Abstract: The invention relates to a process for fabricating a semiconductor that comprises providing a handle substrate comprising a seed substrate and a weakened sacrificial layer covering the seed substrate; joining the handle substrate with a carrier substrate; optionally treating the carrier substrate; detaching the handle substrate at the sacrificial layer to form the semiconductor structure; and removing any residue of the sacrificial layer present on the seed substrate.

Abstract: A semiconductor device includes a substrate, a nanowire, a first structure, and a second structure. The nanowire is suspended between the first structure and the second structure, where the first structure and the second structure overly the substrate, where the nanowire includes a layer on a surface of the nanowire, where the layer includes at least one of silicide and carbide, where the layer has a substantially uniform shape.

Abstract: Atomic layer deposition (ALD) processes for forming Group VA element containing thin films, such as Sb, Sb—Te, Ge—Sb and Ge—Sb—Te thin films are provided, along with related compositions and structures. Sb precursors of the formula Sb(SiR1R2R3)3 are preferably used, wherein R1, R2, and R3 are alkyl groups. As, Bi and P precursors are also described. Methods are also provided for synthesizing these Sb precursors. Methods are also provided for using the Sb thin films in phase change memory devices.

Abstract: Systems and methods for applying a thin layer of a liquid to the surface of a wafer with topography formed therein. The systems and methods include spreading a deposit of the liquid into a thin film on a wafer support, lowering the wafer onto the film, removing the wafer with an adhering layer of the film, positioning the wafer over a device wafer with the liquid film disposed between the wafers, curing the thin layer. The thin layer may be a UV adhesive which bonds the wafers upon exposure to UV light.

Abstract: A method for the production of a structured metal layer (7) made from an alloy composed of titanium and nickel includes the following process steps: a sacrificial layer composite (3) is provided, which comprises a second sacrificial layer (2) applied onto a first sacrificial layer (1), the first sacrificial layer (1) is subjected for the purpose of structuring to a wet-chemical etching process in such a manner that undercutting of the sacrificial layer (1) occurs, a metal layer (7) of the alloy is applied indirectly or directly to the structured sacrificial layer composite (3). The first sacrificial layer (1) is at a greater distance from the metal layer (7). The second sacrificial layer (2) facing the metal layer (7) to be deposited is subjected to a dry etching process prior to wet-chemical etching of the first sacrificial layer (1) so that the second sacrificial layer (2) is provided with a structure that corresponds to the desired structure of the metal layer (7).

Abstract: A first single crystal substrate has a first side surface and it is composed of silicon carbide. A second single crystal substrate has a second side surface opposed to the first side surface and it is composed of silicon carbide. A bonding portion connects the first and second side surfaces to each other between the first and second side surfaces. At least a part of the bonding portion is made of particles composed of silicon carbide and having a maximum length not greater than 1 ?m.

Abstract: A semiconductor wafer includes multiple dies and a die identification region adjacent to or on each die. The die identification region can include a wafer indicator and a pattern of die locations representing die locations on the wafer. A die identification marker is provided in each pattern of die locations in the die identification region specifying a location of a respective die on the wafer.

Abstract: In one aspect, non-conformal layers are formed by variations of plasma enhanced atomic layer deposition, where one or more of pulse duration, separation, RF power on-time, reactant concentration, pressure and electrode spacing are varied from true self-saturating reactions to operate in a depletion-effect mode. Deposition thus takes place close to the substrate surface but is controlled to terminate after reaching a specified distance into openings (e.g., deep DRAM trenches, pores, etc.). Reactor configurations that are suited to such modulation include showerhead, in situ plasma reactors, particularly with adjustable electrode spacing.

Abstract: Methods for reducing electron beam induced damage on semiconductor substrates employ compositions such as small chain organic solvents and non-neutral pH solutions to reduce or eliminate charge imbalances on semiconductor substrates caused by electron beam inspection of the semiconductor substrates. Damage to semiconductor substrates by electron beam inspection processes may also be reduced by generating or otherwise forming passivation films on a semiconductor substrate following electron beam inspection.

Abstract: Embodiments of the invention relate to a method of functional materials deposition using a polymer template fabricated on a substrate. Such template forms an exposed and masked areas of the substrate material, and can be fabricated using polymer resists or Self-assembled monolayers. Deposition is performed using an applicator, which is fabricated in the shape of cylinder or cone made of soft elastomeric materials or laminated with soft elastomeric film. Functional materials, for example, metals, semiconductors, sol-gels, colloids of particles are deposited on the surface of applicator using liquid immersion, soaking, contact with wetted surfaces, vapor deposition or other techniques. Then wetted applicator is contacted the surface of the polymer template and rolled over it's surface. During this dynamic contact functional material is transferred selectively to the areas of the template. Patterning of functional material is achieved by lift-off of polymeric template after deposition.

Abstract: A method for establishing a calibrating standard for wafer inspection includes depositing solid ionized particles of a known size range with an aerosol onto a wafer. The method also includes depositing particles onto a wafer in a deposition chamber by using an aerosol stream and the solid particles suspended in a gas; ionizing the aerosol stream with a negative or positive charge polarity or both by passing the aerosol stream through a non-radioactive ionizer to produce charged particles and supplying such aerosol stream to the deposition chamber.

Abstract: A method of manufacturing a semiconductor device by using a substrate processing apparatus comprises a reaction chamber configured to process a plurality of substrates stacked at predetermined intervals, wherein a first gas flow from a first gas supply inlet and a second gas flow from a second gas supply inlet are crossed with each other before these gas flows reach the substrates. The method of manufacturing a semiconductor device comprises: loading the plurality of substrates into the reaction chamber; supplying a silicon-containing gas and a chlorine-containing gas from the first gas supply inlet into the reaction chamber, supplying a carbon-containing gas and a reducing gas from the second gas supply inlet into the reaction chamber and supplying a dopant-containing gas into the reaction chamber from the first gas supply inlet or the second gas supply inlet; and unloading the substrates from the reaction chamber.

Abstract: One aspect of the invention relates to a method for deposition of a film having a predetermined film composition. The method comprises: in a deposition chamber: providing a substrate at a fixed temperature; depositing a film; flowing a mixture of two gases, wherein the ratio of the two gases is selected such that the mixture has a redox potential to provide a predetermined film composition. In some embodiments, depositing a film occurs via an atomic layer deposition process or chemical vapor deposition process. Methods for chemical vapor deposition of a metal or lanthanide oxide layer are provided featuring a mixture of oxidizing and reducing gases is flowed over the transition metal oxide or lanthanide oxide layer. The mixture of gases has an oxidation potential selected to produce a layer having a desired stoichiometry of a deposited film.

Abstract: Disclosed is a method of manufacturing crystalline Si by using plasma. According to the disclosed method, silicon (Si) deposition and reduction processes using plasma are cyclically performed in order to completely remove an a-Si layer so as to form crystalline Si on a substrate early in the process.

Abstract: Methods of growing and manufacturing aluminum nitride crystal, and aluminum nitride crystal produced by the methods. Preventing sublimation of the starting substrate allows aluminum nitride crystal of excellent crystallinity to be grown at improved growth rates. The aluminum nitride crystal growth method includes the following steps. Initially, a laminar baseplate is prepared, furnished with a starting substrate having a major surface and a back side, a first layer formed on the back side, and a second layer formed on the first layer. Aluminum nitride crystal is then grown onto the major surface of the starting substrate by vapor deposition. The first layer is made of a substance that at the temperatures at which the aluminum nitride crystal is grown is less liable to sublimate than the starting substrate. The second layer is made of a substance whose thermal conductivity is higher than that of the first layer.

Abstract: Some embodiments include methods of forming metal-containing structures. A first metal-containing material may be formed over a substrate. After the first metal-containing material is formed, and while the substrate is within a reaction chamber, hydrogen-containing reactant may be used to form a hydrogen-containing layer over the first metal-containing material. The hydrogen-containing reactant may be, for example, formic acid and/or formaldehyde. Any unreacted hydrogen-containing reactant may be purged from within the reaction chamber, and then metal-containing precursor may be flowed into the reaction chamber. The hydrogen-containing layer may be used during conversion of the metal-containing precursor into a second metal-containing material that forms directly against the first metal-containing material. Some embodiments include methods of forming germanium-containing structures, such as, for example, methods of forming phase change materials containing germanium, antimony and tellurium.

Abstract: Combinatorial plasma enhanced deposition techniques are described, including designating multiple regions of a substrate, providing a precursor to at least a first region of the multiple regions, and providing a plasma to the first region to deposit a first material on the first region formed using the first precursor, wherein the first material is different from a second material formed on a second region of the substrate.

Abstract: Provided is a thin film device and an associated method of making a thin film device. For example, fabrication of an inverter thin film device is described. Moreover, a parallel spaced electrically conductive strips are provided upon a substrate. A functional material is deposited upon the conductive strips. A 3D structure is then provided upon the functional material, the 3D structure having a plurality of different heights, at least one height defining a first portion of the conductive strips to be bundled. The 3D structure and functional material are then etched to define a TFD disposed above the first portion of the conductive strips. The first portion of the conductive strips is bundled adjacent to the TFD.

Abstract: A method and apparatus for the deposition of thin films is described. In embodiments, systems and methods for epitaxial thin film formation are provided, including systems and methods for forming binary compound epitaxial thin films. Methods and systems of embodiments of the invention may be used to form direct bandgap semiconducting binary compound epitaxial thin films, such as, for example, GaN, InN and AlN, and the mixed alloys of these compounds, e.g., (In, Ga)N, (Al, Ga)N, (In, Ga, Al)N. Methods and apparatuses include a multistage deposition process and system which enables rapid repetition of sub-monolayer deposition of thin films.

Abstract: A method for fabricating a nonvolatile charge trap memory device is described. The method includes providing a substrate having a charge-trapping layer disposed thereon. A portion of the charge-trapping layer is then oxidized to form a blocking dielectric layer above the charge-trapping layer by exposing the charge-trapping layer to a radical oxidation process.

Abstract: A carrier for effectuating semiconductor processing on a non-planar substrate is disclosed. The carrier is configured for holding at least one non-planar substrate throughout a semiconductor processing step and concurrently rotating non-planar substrates as they travel down a translational path of a processing chamber. As the non-planar substrates simultaneously rotate and translate down a processing chamber, the rotation exposes the whole or any desired portion of the surface area of the non-planar substrates to the deposition process, allowing for uniform deposition as desired. Alternatively, any predetermined pattern is able to be exposed on the surface of the non-planar substrates. Such a carrier effectuates manufacture of non-planar semiconductor devices, including, but not limited to, non-planar light emitting diodes, non-planar photovoltaic cells, and the like.

Abstract: The invention provides methods which can be applied during the epitaxial growth of two or more layers of Group III-nitride semiconductor materials so that the qualities of successive layer are successively improved. In preferred embodiments, surface defects interact with a protective layer of a protective material to form amorphous complex regions capable of preventing the further propagation of defects and dislocations. The invention also includes semiconductor structures fabricated by these methods.

Abstract: The invention provides a nanolithographic method, comprising: (i) providing a substrate; (ii) providing a nanoscopic tip coated with a patterning compound; (iii) contacting the coated tip with the substrate so that the patterning compound is applied to the substrate to produce a desired pattern; and (iv) wherein the patterning compound is anchored to the substrate.

Abstract: System and method for operating a material deposition system are disclosed. In one embodiment, the method can include periodically injecting a precursor into a vaporizer through an injector at the vaporizer, vaporizing the precursor in the vaporizer and supplying the vaporized precursor to a reaction chamber in fluid communication with the vaporizer, and shutting down the vaporizer and the reaction chamber after a period of time. The method can also include conducting maintenance of the injector at the vaporizer by using a vapor solvent rinse.

Abstract: An apparatus and method for multiple symmetrical divisional gas distribution providing a mounting plate, a plurality of manifolds coupled to the mounting plate, a center purge block coupled to the mounting plate and the plurality of manifolds, a plurality of reactant distribution blocks, wherein each reactant distribution block is stacked atop each other to form a reactant distribution block stack, wherein the reactant distribution block stack sits atop the center purge block, a coupling mechanism to secure the plurality of reactant distribution blocks of the reactant distribution block stack together; and a top cap coupled to the reactant distribution block stack and the coupling mechanism.

Abstract: Adverse effects when a carrier is open, such as particles adhesion to the substrate or natural oxidation film deposits on the substrate, as well as a rise in oxygen concentration and contamination of the substrate transfer chamber are prevented. Semiconductor manufacturing apparatus includes a carrier in which a cover unit is provided on a substrate loading/unloading opening for loading and unloading a substrate, a carrier open/close chamber continuously arranged to the carrier, a substrate transfer chamber continuously arranged to the carrier open/close chamber, a substrate processing chamber continuously arranged to the substrate transfer chamber, an exhaust means for exhausting the atmosphere in the carrier open/close chamber by suction, and an exhaust quantity adjuster means for adjusting the suction exhaust quantity of the exhaust means.

Abstract: A method of manufacturing a semiconductor device is provided. According to an embodiment, the method includes forming a layer to be etched on a semiconductor substrate, and forming a photoresist pattern on the layer to be etched. A block copolymer including a hydrophobic radical and a hydrophilic radical is formed in the photoresist pattern, and the block copolymer is assembled to allow a polymer having the hydrophobic radical to be formed in a pillar pattern within a polymer having the hydrophilic radical. The polymer having the hydrophobic radical is then selectively removed.

Abstract: Acetylene is treated to remove some residual storage solvent that may be present with the acetylene in a source of acetylene such as a container. Such treatment may be performed prior to supplying the acetylene to a deposition chamber or other reactor where acetylene is a reactant. After treatment, the acetylene gas stream has a relatively constant concentration of storage solvent, regardless of how much acetylene has been released from the acetylene source. The treatment may involve condensing the storage solvent from the gas stream at a certain temperature and separating the storage solvent from the gas stream.

Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.

Abstract: To realize a high productivity while maintaining excellent film deposition characteristics on a substrate even if a plurality of processing gases of different gas species are used.

Abstract: A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to remove halides, such as chlorine and chlorides, during the deposition process so that contamination of the titanium-based film is minimized. A method for regenerating the halide adsorbing material is also provided.

Abstract: A substrate processing apparatus having a processing chamber for processing a substrate; a processing gas feeding line for feeding a processing gas into the processing chamber; an inert gas feeding line for feeding an inert gas into the processing chamber; an inert gas vent line provided in the inert gas feeding line, for exhausting the inert gas fed into the inert gas feeding line without feeding the inert gas into the processing chamber; a first valve provided in the inert gas feeding line, on a downstream side of a part where the inert gas vent line is provided in the inert gas feeding line; a second valve provided in the inert gas vent line; and an exhaust line that exhausts an inside of the processing chamber.

Abstract: This invention generally relates to a patterned substrate for an electronic device and to electronic devices, device arrays, field effect transistors and transistor arrays comprising the patterned substrate. The invention also relates to a logic circuit, display, memory or sensor device comprising the patterned substrate. Further the invention relates to a method of patterning a substrate for an electronic device. In an embodiment, a patterned substrate for an electronic device comprises: a first body having an edge; a second body comprising an elongate plurality of printed droplets having an edge adjacent to and substantially aligned to said first body edge; and a separation between said first body edge and said second body edge, wherein said elongate plurality of printed droplets is at an angle of about 5 degrees to about 90 degrees to said first body edge.

Abstract: A susceptor for supporting a semiconductor wafer during deposition of a layer on a front side of the semiconductor wafer, the semiconductor wafer having a diameter D and, at its edge, a notch having a depth T, comprising: a ring-shaped placement area having an internal diameter d for the placement of the semiconductor wafer in the edge region of a rear side of the semiconductor wafer, wherein, with the semiconductor wafer having been placed, the relationship (D?d)/2<T is satisfied; and a protrusion of the area for the placement of semiconductor wafer in the region of the notch of the semiconductor wafer extending the placement area inward, and which completely underlays the notch of the semiconductor wafer.

Abstract: Methods and structures relating to the formation of mixed SAMs for preventing undesirable growth or nucleation on exposed surfaces inside a reactor are described. A mixed SAM can be formed on surfaces for which nucleation is not desired by introducing a first SAM precursor having molecules of a first length and a second SAM precursor having molecules of a second length shorter than the first. Examples of exposed surfaces for which a mixed SAM can be provided over include reactor surfaces and select surfaces of integrated circuit structures, such as insulator and dielectric layers.

Abstract: A high quality interface is formed at a low oxygen-carbon density between a substrate and a thin film while preventing heat damage on the substrate and increase of thermal budget. This method includes a step of loading a wafer into a reaction furnace, a step of pretreating the wafer in the reaction furnace, a step of performing a main processing of the pretreated wafer in the reaction furnace, and a step of unloading the wafer from the reaction furnace after the main processing. Hydrogen gas is continuously supplied to the reaction furnace in the period from the end of the pretreating step to the start of the main processing and at least during vacuum-exhausting an interior of the reaction furnace.

Abstract: The present invention includes methods directed to improved processes for producing a monolayer of sulfur on the surface of a semiconductor. As a surface layer, it functions to passivate the surface; if annealed, it provides a doping element.

Abstract: A method for the formation of an Ni film is herein disclosed, which comprises the steps of maintaining the temperature of an Si substrate at a desired level in a vacuum chamber; introducing, into the vacuum chamber, a nickel alkylamidinate (in this organometal compound, the alkyl group is a member selected from the group consisting of a methyl group, an ethyl group, a butyl group and a propyl group), H2 gas and NH3 gas; and then forming an Ni film according to the CVD technique, wherein the film-forming temperature is set at a level between higher than 280° C. and not higher than 350° C.

Abstract: An electrode assembly for a plasma reaction chamber used in semiconductor substrate processing. The assembly includes an upper showerhead electrode which is mechanically attached to a backing plate by a series of spaced apart cam locks. A guard ring surrounds the backing plate and is movable to positions at which openings in the guard ring align with openings in the backing plate so that the cam locks can be rotated with a tool to release locking pins extending from the upper face of the electrode.

Abstract: Methods for formation and treatment of pure metal layers using CVD and ALD techniques are provided. In one or more embodiments, the method includes forming a metal precursor layer and treating the metal precursor layer to a hydrogen plasma to reduce the metal precursor layer to form a metal layer. In one or more embodiments, treating the metal precursor layer includes exposing the metal precursor layer to a high frequency-generated hydrogen plasma. Methods of preventing a hydrogen plasma from penetrating a metal precursor layer are also provided.

Abstract: A method for depositing a layer on a semiconductor wafer using chemical vapor deposition (CVD). The method includes providing a chamber having an inlet opening and an outlet opening and a channel joining the inlet opening and the outlet opening, wherein the channel is bounded at the bottom by a plane and at the top by a window transmissive to thermal radiation. A semiconductor wafer is disposed so that a surface of the semiconductor lies in the plane, wherein the window has a center region disposed over the semiconductor wafer and an edge region surrounding the center region and not disposed over the semiconductor wafer. A distance between the plane and the window varies across the chamber, the distance being greater at the edge region than at the center region. A tangent applied to a radial profile of the distance at a boundary between the center region and the edge region forms an angle with the plane of not less than 15° and not more than 25°.

Abstract: A method for fabricating a nonvolatile charge trap memory device is described. The method includes providing a substrate having a charge-trapping layer disposed Thereon. A portion of the charge-trapping layer is then oxidized to form a blocking dielectric layer above the charge-trapping layer by exposing the charge-trapping layer to a radical oxidation process.