In Hierarchically Structured Memory Systems, E.g., Virtual Memory Systems, Etc. (epo) Patents (Class 711/E12.016)

  • Patent number: 8417875
    Abstract: A non-volatile memory controller, system and method capable of processing a next request as an interrupt before completing a current operation are disclosed. The non-volatile memory system includes a first memory storing meta data loaded from a flash memory; a second memory storing the meta data copied from the first memory; and a flash memory controller copying the meta data from the first memory to the second memory, changing the meta data in the second memory, and then re-copying the changed meta data from the second memory to the first memory during a first-type operation that requires changes in the meta data.
    Type: Grant
    Filed: April 15, 2010
    Date of Patent: April 9, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Change-Hee Lee, Jung Been Im, Jung-Yeon Yoon, Young-Goo Ko, Dong Hyun Song
  • Publication number: 20130086299
    Abstract: In an embodiment, a data processing method comprises implementing a memory event interface to a hypercall interface of a hypervisor or virtual machine operating system to intercept page faults associated with writing pages of memory that contain a computer program; receiving a page fault resulting from a guest domain attempting to write a memory page that is marked as not executable in a memory page permissions system; determining a first set of memory page permissions for the memory page that are maintained by the hypervisor or virtual machine operating system; determining a second set of memory page permissions for the memory page that are maintained independent of the hypervisor or virtual machine operating system; determining a particular memory page permission for the memory page based on the first set and the second set; processing the page fault based on the particular memory page permission, including performing at least one security function associated with regulating access of the guest domain to th
    Type: Application
    Filed: October 3, 2012
    Publication date: April 4, 2013
    Applicant: Cisco Technology, Inc.
    Inventor: Cisco Technology, Inc.
  • Publication number: 20130086298
    Abstract: An approach is provided in which a migration agent receives a message to migrate a virtual machine from a first system to a second system. The first system extracts hardware state data stored in a native format from a memory area located on first system's network adapter. The hardware state data is utilized by the first system's network adapter to process data packets generated by the virtual machine. Next, the virtual machine is migrated to the second system, which includes copying the extracted hardware state data from the first system to the second system. In turn, the second system configures a corresponding second network adapter by writing the copied hardware state data to a memory located on the second network adapter.
    Type: Application
    Filed: October 4, 2011
    Publication date: April 4, 2013
    Applicant: International Business Machines Corporation
    Inventors: Francisco Jesus Alanis, Omar Cardona
  • Patent number: 8412877
    Abstract: A method is provided for managing errors in a virtualized information handling system that includes an error detection system and a hypervisor allowing multiple virtual machines to run on the information handling system. The hypervisor may assign at least one memory region to each of multiple virtual machines. The error detection system may detect an error, determine a physical memory address associated with the error, and report that address to the hypervisor. Additionally, the hypervisor may determine whether the memory region assigned to each virtual machine includes the physical memory address associated with the error. The hypervisor may shut down each virtual machine for which a memory region assigned to that virtual machine includes the physical memory address associated with the error, and not shut down each virtual machine for which the memory regions assigned to that virtual machine do not include the physical memory address associated with the error.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: April 2, 2013
    Assignee: Dell Products L.P.
    Inventors: Mukund P. Khatri, Brent Alan Schroeder, Surender Brahmaroutu
  • Publication number: 20130073783
    Abstract: A method uses a record of I/O priorities in a determination of a storage medium of a hybrid storage system in which to store a file. The method maintains the record of I/O priorities by assigning an I/O temperature value to each request for access to the file based upon an I/O priority level of the process making the request. The method marks the file as hot if the file temperature value is greater than a threshold value. The method stores files marked as hot in a lower latency storage medium of the hybrid storage medium.
    Type: Application
    Filed: September 15, 2011
    Publication date: March 21, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mingming Cao, Ben Chociej, Scott R. Conor, Steven M. French, Matthew R. Lupfer, Steven L. Pratt
  • Publication number: 20130073778
    Abstract: A system and computer program product for mirroring virtual machines from a primary host to a secondary host. The system includes a processor tracking changes for each of a plurality of memory pages and processor states for one or more primary host virtual machines. Responsive to an occurrence of a checkpoint, the primary host virtual machines are stopped. A determination is made if each of the memory pages is frequently changed. In response to the memory page being frequently changed, the frequently changed memory page is marked as being writeable and copied to a buffer. In response to the memory page being infrequently changed, the infrequently changed memory page is marked as being read only. The one or more primary host virtual machines are resumed. A copy of the memory pages, the buffer and changes to the processor states are transmitted to the secondary host.
    Type: Application
    Filed: September 20, 2011
    Publication date: March 21, 2013
    Applicant: IBM CORPORATION
    Inventors: Graham Hunter, James Mulcahy
  • Publication number: 20130061007
    Abstract: In an embodiment, in response to reading a declaration of a function that specifies a name of the function and a type of memory on which the function operates, the name of the function, a pointer to the function, and the type are saved to a template. In response to reading a call statement that specifies the name of the function and an identifier of an object, first code is generated. The first code, when executed, reads the pointer to the function from a virtual function table pointed to by the object, finds an entry in the virtual function table that represents the function, and reads the pointer from the entry in the virtual function table. The call statement, when executed, requests a call of the function. Second code is generated that, when executed, calls the function using the pointer read from the virtual function table.
    Type: Application
    Filed: September 2, 2011
    Publication date: March 7, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Cary L. Bates, Nicholas P. Johnson, Justin K. King, Lee Nee, Siobhan M. O'Toole
  • Patent number: 8392679
    Abstract: The present invention stores application management information indicating respective applications constituting a federated application environment, which is a group constituted by a plurality of associatively operated applications. By referencing this application management information, a plurality of applications constituting this federated application environment are specified. A plurality of first logical volumes allocated to the specified plurality of applications, and a plurality of second logical volumes constituting the backup targets for data stored in the plurality of first logical volumes, are assigned to the same volume group.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: March 5, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Wataru Okada, Masayasu Asano
  • Publication number: 20130054868
    Abstract: Method, system and computer program product for monitoring and managing virtual machine image storage in a virtualized computing environment, where the method for managing storage utilized by a virtual machine can include identifying one or more unused disk blocks in a guest virtual machine image, and removing the unused disk blocks from the guest virtual machine image.
    Type: Application
    Filed: August 23, 2011
    Publication date: February 28, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sukadev Bhattiprolu, Mingming Cao, Venkateswararao Jujjuri, Haren Myneni, Malahal R. Naineni, Badari Pulavarty, Chandra Seetharaman, Narasimha Sharoff
  • Publication number: 20130054927
    Abstract: Described herein is a system and method for retaining deduplication of data blocks of a resulting storage object (e.g., a flexible volume) from a split operation of a clone of a base storage object. The clone may comprise data blocks that are shared with at least one data block of the base storage object and at least one data block that is not shared with at least one data block of the base storage object. The data blocks of the clone that are shared with the base storage object may be indicated to receive a write allocation that may comprise assigning a new pointer to a indicated data block. Each data block may comprise a plurality of pointers comprising a virtual address pointer and a physical address pointer. As such, data blocks of the clone comprising the same virtual address pointer may be assigned a single physical address pointer. Thus, a new physical address pointer is assigned or allocated once to a given virtual address pointer of data blocks of a clone.
    Type: Application
    Filed: August 30, 2011
    Publication date: February 28, 2013
    Inventors: Bipul Raj, Alok Sharma
  • Publication number: 20130054934
    Abstract: In an environment in which a processor operates a hypervisor and multiple guest partitions operating under the hypervisor's control, it is desirable to allow a guest partition access to a physical memory device without decreasing system performance. Accordingly, a conversion instruction for converting a logical address to a real address, i.e., an LTOR instruction, executable from a guest partition, is added to the processor. Upon the guest partition's execution of the conversion instruction with the logical address specified, the processor converts the logical address to an encrypted real address, and returns it to the guest partition. The guest partition is then able to pass the encrypted real address to an accelerator that converts the encrypted real address to a real address in order to access the memory device using the real address.
    Type: Application
    Filed: July 9, 2012
    Publication date: February 28, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Masanori Mitsugi, Hiroyuki Tanaka
  • Publication number: 20130042052
    Abstract: A system and method for efficiently performing user storage virtualization for data stored in a storage system including a plurality of solid-state storage devices. A data storage subsystem supports multiple mapping tables. Records within a mapping table are arranged in multiple levels. Each level stores pairs of a key value and a pointer value. The levels are sorted by time. New records are inserted in a created newest (youngest) level. No edits are performed in-place. All levels other than the youngest may be read only. The system may further include an overlay table which identifies those keys within the mapping table that are invalid.
    Type: Application
    Filed: August 11, 2011
    Publication date: February 14, 2013
    Inventors: John Colgrove, John Hayes, Ethan Miller, Feng Wang
  • Publication number: 20130036250
    Abstract: The thin provisioning storage system maintains migration history between the first and the second group which the unallocated pages of virtual volume would be allocated from, and updates on writes against storage areas of virtual volume having migration history. Before the storage controller determines to migrate data allocated in the first group to the second group, the storage controller checks the migration history and if the data stored in the first group has been previously migrated from the second group and is still maintained in the second group, the storage controller would change the allocation between the virtual volume and the first group to the second group for the data subject to migration and not perform the data migration.
    Type: Application
    Filed: August 1, 2011
    Publication date: February 7, 2013
    Applicant: HITACHI, LTD.
    Inventor: Shinichi Hayashi
  • Publication number: 20130036249
    Abstract: Aspects of the present invention provide a solution for managing memory in a shared virtual computing environment. A page that is to be stored in the memory of the host in the virtual computing environment is obtained from a guest. The page is analyzed to compute an identifier for the page. This identifier is compared with other identifiers of other pages that are currently stored in the memory to determine whether the identical page is already stored in the memory. If the identical page is currently stored in the memory, a link to that page is stored in the portion of the memory that is allocated to the guest.
    Type: Application
    Filed: August 1, 2011
    Publication date: February 7, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Srihari V. Angaluri, Matthew R. Archibald, William E. Bauman, Jerrod K. Buterbaugh
  • Publication number: 20130031292
    Abstract: A host selects a memory page that has been allocated to a guest for eviction. The host may be a host machine that hosts a plurality of virtual machines. The host accesses a bitmap maintained by the guest to determine a state of a bit in the bitmap associated with the memory page. The host determines whether content of the memory page is to be preserved based on the state of the bit. In response to determining that the content of the memory page is not to be preserved, the host discards the content of the memory page.
    Type: Application
    Filed: July 28, 2011
    Publication date: January 31, 2013
    Inventor: Henri Han Van Riel
  • Publication number: 20130031293
    Abstract: A processing device executing an operating system such as a guest operating system generates a bitmap wherein bits of the bitmap represent statuses of memory pages that are available to the operating system. The processing device frees a memory page. The processing device then sets a bit in the bitmap to indicate that the memory page is unused after the memory page is freed.
    Type: Application
    Filed: July 28, 2011
    Publication date: January 31, 2013
    Inventor: Henri Han Van Riel
  • Publication number: 20130031291
    Abstract: A method is provided in one example embodiment that includes rebasing a module in a virtual partition to load at a fixed address and storing a hash of a page of memory associated with the fixed address. An external handler may receive a notification associated with an event affecting the page. An internal agent within the virtual partition can execute a task and return results based on the task to the external handler, and a policy action may be taken based on the results returned by the internal agent. In some embodiments, a code portion and a data portion of the page can be identified and only a hash of the code portion is stored.
    Type: Application
    Filed: July 27, 2011
    Publication date: January 31, 2013
    Inventors: Jonathan L. Edwards, Gregory W. Dalcher, John D. Teddy
  • Publication number: 20130031294
    Abstract: A physical host executes a hypervisor or virtual machine monitor (VMM) that instantiates at least one virtual machine (VM) and a virtual input/output server (VIOS). The VIOS determines by reference to a policy data structure a disposition of a packet of network communication with the VM, where the disposition includes one of dropping the packet and forwarding the packet. Thereafter, the determined disposition is applied to a subsequent packet in a same packet flow as the packet.
    Type: Application
    Filed: July 29, 2011
    Publication date: January 31, 2013
    Applicant: International Business Machines Corporation
    Inventors: Jeffrey J. Feng, Terry J. Hoffman, Shawn P. Mullen, Bhargavi B. Reddy
  • Publication number: 20130031328
    Abstract: Embodiments of the present technology are directed toward techniques for balancing memory accesses to different memory types.
    Type: Application
    Filed: July 26, 2011
    Publication date: January 31, 2013
    Applicant: NVIDIA CORPORATION
    Inventors: Brian Kelleher, Emmett M. Kilgariff, Wayne Yamamoto
  • Publication number: 20130024644
    Abstract: Techniques for optimizing data movement in electronic storage devices are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method for optimizing data movement in electronic storage devices comprising maintaining, on the electronic storage device, a data structure associating virtual memory addresses with physical memory addresses. Information can be provided regarding the data structure to a host which is in communication with the electronic storage device. Commands can be received from the host to modify the data structure on the electronic storage device, and the data structure can be modified in response to the received command.
    Type: Application
    Filed: May 29, 2012
    Publication date: January 24, 2013
    Applicant: STEC, INC.
    Inventors: Tony Digaleh GIVARGIS, Reza SADRI
  • Publication number: 20130013850
    Abstract: Disclosed is a process for determining a heat index for a block of data, such as an extent, for storage tiering. Weighted scores are used for read and write operations, since solid state devices operate better with read operations than write operations. The heat index associated with each extent is a function of a base score, rather than an absolute value. The base score is determined by adding the number of extents in a hot tier plus the access score, divided by the number of extents in the hot tier. In this fashion, the base score measures the weighted I/O activity relative to the size of the hot tier.
    Type: Application
    Filed: July 7, 2011
    Publication date: January 10, 2013
    Inventor: Anant Baderdinni
  • Publication number: 20130013872
    Abstract: A memory controller to provide memory access services in an adaptive computing engine is provided. The controller comprises: a network interface configured to receive a memory request from a programmable network; and a memory interface configured to access a memory to fulfill the memory request from the programmable network, wherein the memory interface receives and provides data for the memory request to the network interface, the network interface configured to send data to and receive data from the programmable network.
    Type: Application
    Filed: September 11, 2012
    Publication date: January 10, 2013
    Applicant: QST Holdings LLC
    Inventors: Frederick Curtis Furtek, Paul L. Master
  • Publication number: 20130013845
    Abstract: A replicated virtual cartridge is received into a media vault of a first virtual tape library and appears in a shadow library. The virtual cartridge is visible to a backup application via the shadow library to allow the backup application to perform a copy operation on the virtual cartridge.
    Type: Application
    Filed: July 7, 2011
    Publication date: January 10, 2013
    Inventors: Daniel Philip Coney, Andrew Damian Topham, Alastair Slater
  • Publication number: 20130007386
    Abstract: Memory arbiter with latency guarantees for multiple ports. A method of controlling access to an electronic memory includes measuring a latency value indicative of a time difference between origination of an access request from a port of a plurality of ports and a response from the electronic memory. The method also includes calculating a difference between the latency value for the port and a target value associated with the port. The method further includes calculating a running sum of differences for the port covering each of a plurality of access requests. Further, the method includes determining a delta of a priority value for the port based on the running sum of differences. Moreover, the method includes prioritizing the access by the plurality of ports according to associated priority values.
    Type: Application
    Filed: June 29, 2011
    Publication date: January 3, 2013
    Applicant: SYNOPSYS INC.
    Inventors: Pieter Van Der WOLF, Marc Jeroen Geuzebroek, Johannes Boonstra
  • Publication number: 20120331226
    Abstract: A hierarchical memory request stream arbitration technique merges coherent memory request streams from multiple memory request sources and arbitrates the merged coherent memory request stream with requests from a non-coherent memory request stream. In at least one embodiment of the invention, a method of generating a merged memory request stream from a plurality of memory request streams includes merging coherent memory requests into a first serial memory request stream. The method includes selecting, by a memory controller circuit, a memory request for placement in the merged memory request stream from at least the first serial memory request stream and a merged non-coherent request stream. The merged non-coherent memory request stream is based on an indicator of a previous memory request selected for placement in the merged memory request stream.
    Type: Application
    Filed: August 31, 2012
    Publication date: December 27, 2012
    Inventors: Guhan Krishnan, Antonio Asaro, Don Cherepacha, Thomas R. Kunjan, Joerg Winkler, Ralf Flemming, Maurice B. Steinman, Jonathan Owen, John Kalamatianos
  • Publication number: 20120331225
    Abstract: A method for preserving data availability and I/O performance when creating a virtual RAID volume includes exposing a set of backend virtual volumes. The backend virtual volumes are implemented on a set of physical storage devices (e.g., physical disks or solid state drives) residing on a storage system. The method further enables selection of the set of backend virtual volumes to create a virtual RAID volume having a selected RAID level. The method further provides verification that the backend virtual volumes will be implemented on the physical storage devices in a way that preserves the data availability and I/O performance associated with the selected RAID level.
    Type: Application
    Filed: April 29, 2012
    Publication date: December 27, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Carl E. Jones, Subhojit Roy
  • Publication number: 20120331229
    Abstract: A method of load balancing can include segmenting data from a plurality of servers into usage patterns determined from accesses to the data. Items of the data can be cached in one or more servers of the plurality of servers according to the usage patterns. Each of the plurality of servers can be designated to cache items of the data of a particular usage pattern. A reference to an item of the data cached in one of the plurality of servers can be updated to specify the server of the plurality of servers within which the item is cached.
    Type: Application
    Filed: June 24, 2011
    Publication date: December 27, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: KENNETH S. SABIR
  • Publication number: 20120331228
    Abstract: A system for caching content including a server supplying at least one of static and non-static content elements, content distinguishing functionality operative to categorize elements of the non-static content as being either dynamic content elements or pseudodynamic content elements, and caching functionality operative to cache the pseudodynamic content elements. The static content elements are content elements which are identified by at least one of the server and metadata associated with the content elements as being expected not to change, the non-static content elements are content elements which are not identified by the server and/or by metadata associated with the content elements as being static content elements, the pseudodynamic content elements are non-static content elements which, based on observation, are not expected to change, and the dynamic content elements are non-static content elements which are not pseudodynamic.
    Type: Application
    Filed: June 23, 2011
    Publication date: December 27, 2012
    Applicant: INCAPSULA, INC
    Inventors: Gur SHATZ, Boris ZINGERMAN, Ohad ALMAGOR
  • Patent number: 8341357
    Abstract: One embodiment provides a system that pre-fetches into a sibling cache. During operation, a first thread executes in a first processor core associated with a first cache, while a second thread associated with the first thread simultaneously executes in a second processor core associated with a second cache. During execution, the second thread encounters an instruction that triggers a request to a lower-level cache which is shared by the first cache and the second cache. The system responds to this request by directing a load fill which returns from the lower-level cache in response to the request to the first cache, thereby reducing cache misses for the first thread.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: December 25, 2012
    Assignee: Oracle America, Inc.
    Inventors: Martin R. Karlsson, Shailender Chaudhry, Robert E. Cypher
  • Patent number: 8341351
    Abstract: A data reception system includes a data acquisition unit acquiring data from a predetermined transmission path, an access control unit storing the data acquired by the data acquisition unit in a predetermined storage area, and a plurality of storage areas. The plurality of storage areas includes a first storage area and a second storage area having a greater storable capacity and a lower storing speed compared to the first storage area. The access control unit further includes a transfer unit. The access control unit determines whether the total amount of data stored in the first storage area is in the excess of a predetermined threshold or not and causes a transfer unit to transfer the data acquired by the data acquisition unit to the second storage area to store the data in the second storage area when the total amount is in the excess of the threshold.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: December 25, 2012
    Assignee: Sony Corporation
    Inventor: Takeo Tsumura
  • Publication number: 20120324141
    Abstract: Systems and methods for dynamically remapping elements of a set to another set based on random keys. Application of said systems and methods to dynamically mapping regions of memory space of non-volatile memory, e.g., phase-change memory, can provide a wear-leveling technique. The wear leveling technique can be effective under normal execution of typical applications, and in worst-case scenarios including the presence of malicious exploits and/or compromised operating systems, wherein constantly migrating the physical location of data inside the PCM avoids information leakage and increases security; wherein random relocation of data results in the distribution of memory requests across the physical memory space increases durability; and wherein such wear leveling schemes can be implemented to provide fine-grained wear leveling without overly-burdensome hardware overhead e.g., a look-up table.
    Type: Application
    Filed: May 24, 2012
    Publication date: December 20, 2012
    Applicant: Georgia Tech Research Corporation
    Inventors: Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee
  • Publication number: 20120311277
    Abstract: A programmable integrated circuit may have a memory controller that interfaces between master modules and system memory. The memory controller may receive memory access requests from the masters via ports that have associated priority values and fulfill the memory access requests by configuring system memory to respond to the memory access requests. To dynamically modify the associated priority values while the memory controller receives and fulfills the memory access requests, a priority value update module may be provided that dynamically updates priority values for the memory controller ports. The priority value update module may provide the updated priority values with update registers that are updated based on an update signal and a system clock. The priority values may be provided by shift registers, memory mapped registers, or provided by masters along with each memory access request.
    Type: Application
    Filed: June 1, 2011
    Publication date: December 6, 2012
    Inventors: Michael H.M. Chu, Jeffrey Schulz, Chiakang Sung, Ravish Kapasi
  • Publication number: 20120311260
    Abstract: The present invention provides a configuration which can realize both two objects of prevention of performance deterioration and a reduction in storage management cost and shift a volume to a storage device which supports a hierarchical pool. To provide the configuration, a storage managing system acquires access information indicating an access load to a logical volume in a storage subsystem from a device file in a host server as access information in a page unit. The storage managing system acquires, from a storage subsystem having a hierarchical pool function, information concerning the configuration and a capacity of hierarchies of the storage subsystem. A capacity of the logical volume is calculated from the number of pages and a page unit capacity indicated by the access information.
    Type: Application
    Filed: June 2, 2011
    Publication date: December 6, 2012
    Applicant: HITACHI, LTD.
    Inventors: Hiromichi Yamagiwa, Naoshi Maniwa, Hideo Ohata, Yasufumi Uchiyama
  • Publication number: 20120303858
    Abstract: The amount of virtual disk space that is available for use by software executing within a virtual machine (VM) may be dynamically adjusted while the VM is running in a virtual computer system. A method for reservation of disk space from a virtual machine is provided. A request is received at a first VM relating to reserving a portion of a virtual disk used by the first VM. In response, the first VM allocates additional storage in the virtual disk to a guest file stored in the virtual disk, wherein the guest file is not used to store meaningful data and then communicates sectors of the virtual disk corresponding to the additional storage for the guest file to the virtualization layer. The virtualization layer provides to a second VM access to sectors of the physical storage space that correspond to the sectors of the virtual disk that were allocated as additional storage to the guest file.
    Type: Application
    Filed: April 30, 2012
    Publication date: November 29, 2012
    Applicant: VMWARE, INC.
    Inventor: Matt GINZTON
  • Patent number: 8321629
    Abstract: The present invention calculates the power consumption of the storage system for each device which supplies power with a storage system, and controls the storage system to keep the power consumption not to exceed the upper limit. In order to achieve this, the power consumption of the chassis configuring the destination storage system is calculated with reference to the number of logical volumes configuring the pool which includes virtual logical volumes, and the logical volumes included in the source storage system are migrated to the virtual logical volumes included in the destination storage system, keeping the power consumption specified in advance per device supplying power to the chassis configuring the destination storage system not to exceed the upper limit value. (Refer to FIG. 27.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: November 27, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Shinichi Hayashi, Yuichi Taguchi
  • Publication number: 20120297138
    Abstract: Embodiments for managing data in a hierarchical storage server storing data blocks of a database system comprising primary storage devices being in an active mode and secondary storage devices being in one of an active and passive mode are provided. In response to read and write requests for data blocks at logical storage locations, a block mapping device determines physical storage locations on the storage devices. Read requests switch over secondary storage devices to the active mode when they are in the passive mode. Write requests write data blocks only to the primary storage devices. Secondary storage devices that have not been accessed for a minimum activation time may be switched over from the active to the passive mode to save power consumption and cooling. Data migration and data recall policies control moving of data blocks between the primary and secondary storage devices and are primarily based on threshold values.
    Type: Application
    Filed: July 31, 2012
    Publication date: November 22, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Oliver AUGENSTEIN, Stefan BENDER, Karl FLECKENSTEIN, Andreas UHL
  • Patent number: 8316183
    Abstract: A virtual drive data storage refactoring system includes a base drive and a plurality of virtual drives hierachly below the base drive. The virtual drives each include data storage blocks and a virtual drive controller system. The virtual drive controller system coordinates data storage on the drives by computing a signature for each data storage block, creating a list of data content for each data storage block that is sorted according to the signatures, locating the signatures for each data storage block that appear on each of the virtual drives, arranging data storage blocks on the virtual drives so that those having data content that is the same are located in corresponding locations on each of the virtual drives, and removing data storage blocks having data content that is the same from each of the virtual drives to a data storage drive that is hierarchly above the virtual drives.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: November 20, 2012
    Assignee: Dell Products L.P.
    Inventor: James Craig Lowery
  • Publication number: 20120290766
    Abstract: Described techniques increase runtime performance of workloads executing on a hypervisor by executing virtualization-aware code in an otherwise non virtualization-aware guest operating system. In one implementation, the virtualization-aware code allows workloads direct access to physical hardware devices, while allowing the system memory allocated to the workloads to be overcommitted. In one implementation, a DMA filter driver is inserted into an I/O driver stack to ensure that the target virtual memory of a DMA transfer is resident before the transfer begins. The DMA filter driver may utilize a cache to track which pages of memory are resident. The cache may also indicate which pages of memory are in use by one or more transfers, enabling the hypervisor to avoid appropriating pages of memory during a transfer.
    Type: Application
    Filed: July 23, 2012
    Publication date: November 15, 2012
    Applicant: MICROSOFT CORPORATION
    Inventor: Jacob Oshins
  • Publication number: 20120284485
    Abstract: Operating system virtual memory management for hardware transactional memory. A system includes an operating system deciding to unmap a first virtual page. As a result, the operating system removes the mapping of the first virtual page to the first physical page from the virtual memory page table. As a result, the operating system performs an action to discard transactional memory hardware state for at least the first physical page. Embodiments may further suspend hardware transactions in kernel mode. Embodiments may further perform soft page fault handling without aborting a hardware transaction, resuming the hardware transaction upon return to user mode, and even successfully committing the hardware transaction.
    Type: Application
    Filed: July 20, 2012
    Publication date: November 8, 2012
    Applicant: MICROSOFT CORPORATION
    Inventors: Koichi Yamada, Gad Sheaffer, Ali-Reza Adl-Tabatabai, Landy Wang, Martin Taillefer, Arun Kishan, David Callahan, Jan Gray, Vadim Bassin
  • Publication number: 20120284477
    Abstract: Optimizations are provided for frame management operations, including a clear operation and/or a set storage key operation, requested by pageable guests. The operations are performed, absent host intervention, on frames not resident in host memory. The operations may be specified in an instruction issued by the pageable guests.
    Type: Application
    Filed: July 20, 2012
    Publication date: November 8, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles W. Gainey, JR., Dan F. Greiner, Lisa Cranton Heller, Damian L. Osisek, Gustav E. Sittmann, III, Cynthia Sittmann
  • Publication number: 20120284486
    Abstract: Methods and apparatus for control of On-Die System Fabric (OSF) blocks are described. In one embodiment, a shadow address corresponding to a physical address may be stored in response to a user-level request and a logic circuitry (e.g., present in an OSF) may determine the physical address from the shadow address. Other embodiments are also disclosed.
    Type: Application
    Filed: July 17, 2012
    Publication date: November 8, 2012
    Inventors: Zhen Fang, Mahesh Wagh, Jasmin Ajanovic, Michael E. Espig, Ravishankar Iyer
  • Publication number: 20120278547
    Abstract: The disclosure discloses a method for hierarchically managing storage resources, which comprises: planning a storage space, establishing an address management index, and storing or reading data according to the index and a type of the data. The disclosure further discloses a system for hierarchically managing storage resources. Through the method and system of the disclosure, space can be better saved, storage requirements of data of different sizes can be met, and the storage space can be flexibly recorded and released.
    Type: Application
    Filed: November 26, 2010
    Publication date: November 1, 2012
    Applicant: ZTE CORPORATION
    Inventors: Wei Zhang, Feng Wang, Haiying Ju
  • Patent number: 8296503
    Abstract: Methods for updating and recovering user data of a non-volatile memory array such as a flash memory are disclosed. An indication for indicating a mapping relationship for a logical address is established when original user data of the logical addresses is updated into new user data. The indication records new pointers, which record the mapping relationships between logical addresses and physical addresses storing the new user data of the logical addresses. Alternatively, the indication records memory positions of the non-volatile memory array which are defined as designated memory positions and a sequence for using these designated memory positions.
    Type: Grant
    Filed: May 26, 2009
    Date of Patent: October 23, 2012
    Assignee: Mediatek Inc.
    Inventors: Tzu-chieh Lin, Chun-ying Chiang, Li-chun Tu, Hong-ching Chen, Kun-chieh Yang
  • Publication number: 20120260040
    Abstract: A sliding window policy is implemented to manage database objects. At a first time, a first portion of a database object is allocated to a first tier of a multi-tier storage system. The first portion corresponds to a first specified percentage of the size of the database object at the first time and is selected according to information associated with the database object. The remaining portion of the database object at the first time is allocated to one or more other tiers. At a second (later) time, a second portion of the database object is allocated to the first tier. The second portion corresponds to a second specified percentage of the size of the database object at the second time and is also selected according to information associated with the database object. The remaining portion of the database object at the second time is allocated to the other tier(s).
    Type: Application
    Filed: April 8, 2011
    Publication date: October 11, 2012
    Applicant: SYMANTEC CORPORATION
    Inventors: Raghupathl Mallge, Meher Shah, Gautham Ravi
  • Patent number: 8285959
    Abstract: The present invention is directed to a method for providing data element placement in a storage system via a Dynamic Storage Tiering (DST) mechanism, such that improved system efficiency is promoted. For example, the DST mechanism may implement an algorithm for providing data element placement. The data elements (ex.—virtual volume hot-spots) may be placed into storage pools, such that usage of higher performing storage pools is maximized. Hot-spots may be detected by dynamically measuring load on LBA ranges. Performance of the storage pools may be measured on an ongoing basis. Further, the hot-spots may be ranked according to load, while storage pools may be ranked according to measured performance. If a hot-spot's load decreases, the hot-spot may be moved to a lower performing storage pool. If a hot-spot's load increases, the hot-spot may be moved to a higher performing storage pool.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: October 9, 2012
    Assignee: Netapp, Inc.
    Inventor: Martin Jess
  • Publication number: 20120254581
    Abstract: A memory system, comprises a nonvolatile memory comprising multiple memory cells, and a memory controller configured to control respective cell levels of the memory cells by assigning a logical address of each memory cell to one of multiple address groups according to a frequency with which the logical address has been accessed, determining a cell level for each address group, and controlling each memory cell to have the cell level of the address group to which its logical address is assigned.
    Type: Application
    Filed: March 27, 2012
    Publication date: October 4, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Byoung Geun Kim
  • Publication number: 20120254497
    Abstract: A method and apparatus to facilitate shared pointers in a heterogeneous platform. In one embodiment of the invention, the heterogeneous or non-homogeneous platform includes, but is not limited to, a central processing core or unit, a graphics processing core or unit, a digital signal processor, an interface module, and any other form of processing cores. The heterogeneous platform has logic to facilitate sharing of pointers to a location of a memory shared by the CPU and the GPU. By sharing pointers in the heterogeneous platform, the data or information sharing between different cores in the heterogeneous platform can be simplified.
    Type: Application
    Filed: March 29, 2011
    Publication date: October 4, 2012
    Inventors: YANG NI, Rajkishore Barik, Ali-Reza Adl-Tabatabai, Tatiana Shpeisman, Jayanth N. Rao, Ben J. Ashbaugh, Tomasz Janczak
  • Publication number: 20120246382
    Abstract: Embodiments disclosed herein provide systems and method for storing metadata to unused portions of a virtual disk file. In a particular embodiment, a method provides selecting a virtual disk file stored on a data storage volume and identifying unused portions of the virtual disk file. The method further provides writing metadata for the virtual disk file in the unused portions of the virtual disk file.
    Type: Application
    Filed: January 19, 2012
    Publication date: September 27, 2012
    Inventors: Gregory L. Wade, J. Mitchell Haile, Bill Kan, Barry Herman
  • Patent number: 8275971
    Abstract: A method and a system for allowing a guest operating system (guest OS) to modify an entry in a TLB directly without an involvement of a hypervisor are disclosed. Upon receiving a guest TLB miss exception, a guest OS issues a TLBWE (TLB Write Entry) instruction to logic. The logic executes the TLBWE instruction at a supervisor mode without invoking a hypervisor. The TLB may incorporate entries in a guest page table and entries in a host page table.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: September 25, 2012
    Assignee: International Business Machines Corporation
    Inventors: Hubertus Franke, Benjamin Herrenschmidt, Jon K. Kriegel, Andrew M. Theurer, James Xenidis
  • Publication number: 20120233405
    Abstract: A method of caching reference data in a reference data cache is provided that includes receiving an address of a reference data block in the reference data cache, wherein the address includes an x coordinate and a y coordinate of the reference data block in a reference block of pixels and a reference block identifier specifying which of a plurality of reference blocks of pixels includes the reference data block, computing an index of a set of cache lines in the reference data cache using bits from the x coordinate and bits from the y coordinate, using the index and a tag comprising the reference block identifier to determine whether the reference data block is in the set of cache lines, and retrieving the reference data block from reference data storage when the reference data block is not in the set of cache lines.
    Type: Application
    Filed: March 7, 2011
    Publication date: September 13, 2012
    Inventor: Madhukar Budagavi