Abstract: A digital analog converter which is especially suitable for use in converting a digital audio signal into an analog audio signal includes a unit pulse response signal generator for successively generating unit pulse response signals at a predetermined time interval, a digital data generator for generating digital data at the predetermined time interval, a multiplier for multiplying a unit pulse response signal generated at a certain time by a predetermined item of the digital data, and a mixer for producing an analog signal output by combining the unit pulse response signals that have been multiplied by the digital data.

Abstract: A feedback coder, which employs simple CMOS push/pull amplifiers as gain elements, along with a bistable circuit, in its preferred embodiment takes the form of a second-order delta-sigma modulator. The output of the modulator is converted into pulse code modulated words by a finite impulse response filter which incorporates a partial coefficient generator utilizing simplified logic. The generator output is provided to an accumulator in which the stages operate at reduced speed. A simple multiplexer generates a serial output. The entire converter can be integrated on a semiconductor chip of relatively small area.

Abstract: A resistive network is coupled to a reference source for providing a plurality of reference signals. A comparator/multiplexer section compares a comparison signal against the reference signals, selects one of the reference signals and produces a code. An amplifier provides the comparison signal in response to the ADC input signal and subsequently in response to a signal difference between the ADC input signal and selected reference signal. Two codes are encoded and added in an adder/accumulator for providing the output code of the ADC.

Abstract: Two or more dolls with speech synthecizing systems appear to intelligently converse while signaling each other via a radio frequency transmission to indicate what has been spoken, and to request a response which is intelligent with respect to the synthecized speech of the first doll.

Abstract: In a device which is for use in a receiver of a multivalued digital communication system and which includes a reference voltage producing circuit (51) for producing signal discriminating reference voltages and signal regenerating reference voltages related to one another, a level discriminating circuit (31) for discriminating a multivalued received signal with reference to the signal discriminating reference voltages to produce a local encoded signal, a signal decoding circuit (32) for decoding the local encoded signal into a decoded signal, a signal regenerating circuit (33) responsive to the local encoded signal for regenerating a multivalved regenerated signal having the signal regenerating reference voltages, a comparator (34) for comparing the received and the regenerated signals to produce a result of comparison, and an integrator (35) for integrating the result of comparison to produce a result of integration, the signal discriminating and regenerating reference voltages are regulated by the result of

Abstract: A digital-to-analog converter filter circuit includes a means for generating a blanking signal to coincide with a change in the digital signal value to the converter and an analog switch controlled by the blanking signal. The analog switch receives the analog signal from the converter and passes the signal depending on the state of the blanking signal. The blanking signal controls the switch to block passage of the analog signal for a predetermined time sufficient for the analog signal to settle after transition from a first value to a second value in response to the change in the digital input signal value. The analog switch is connected to a vector filter which receives the analog signal and transmits a delayed transition signal from the first analog signal value signal to the second value. The filter transmits the first value until the switch passes the second value upon command of the blanking signal.

Abstract: A clamping circuit clamps a threshold of an analog to digital converter (ADC) to a signal level just below the black level of a television signal.During the blanking period, a negative-going peak is superimposed on the input signal to produce the waveform. Each time this crosses the 0000,0001 threshold of the ADC, the polarity of the output of a comparator changes. The comparator compares the ADC output and a reference value.The input signal is biased according to the integral of the comparator output. When signal levels are stable, the comparator output is symmetrical, its integral is zero and no change occurs in the biasing.If signal levels drift, the negative going peak crosses the threshold for a second time relatively sooner or later. The comparator output becomes assymmetric and has a non-zero integral. Consequently, the biasing level changes to compensate for the drift.

Abstract: An analog-to-digital conversion system for converting an analog signal to a digital signal for recording is configured to detect a low level period of the analog signal, amplify a low noise in the analog signal in the detected period by a predetermined multiplying ratio or by an amount corresponding to the signal amplitude, and subtract from the converted digital signal a number of bits corresponding to the amplification degree in the same period after analog-to-digital conversion, so as to reduce the influence of a noise entering in the analog signal before analog-to-digital conversion.