Abstract: A method for race prevention and a device that has race prevention capabilities. The method includes: selectively providing data or scan data to a input latching logic, activating the input latching logic for a first scan mode activation period, introducing a substantial time shift between the first scan mode activation period and a second scan mode activation period, and activating a output latching logic, connected to the input latching logic for a second scan mode activation period. The device includes: an interface logic, a input latching logic, a output latching logic and a control logic. The interface logic is adapted to selectively provide data or scan data to the input latching logic. The control logic is adapted to introduce a substantial time difference between an end point of a first scan mode activation period of the input latching logic and between a start point of a second scan mode activation period of the output latching logic.

Abstract: A method for booting a computer device includes steps of executing the POST and loading a commercial film form a storage unit into a volatile memory unit, wherein the computer device can update the commercial film via connecting to a network. Then the operating system is loaded.

Abstract: The invention relates to a MIMO-HARQ communication system and communication method. When a receiver carries out a CRC for received data streams and detects an error in a data stream, it feeds back to a transmitter and requests a retransmission of the data stream. The transmitter determines the correspondence between the data streams to be transmitted and a plurality of transmitting antennas in a method for retransmitting the error data stream with a transmitting antenna other than the one having transmitted the error data stream. Transmission and retransmission of a same data stream experience different spatial fading channels, so that an additional spatial diversity gain is obtained by exchanging the transmission sequences, in addition to a time diversity gain obtained by retransmission, and hence the probability of successful transmission is improved.

Abstract: Systems and methods are provided to determine execution errors in distributed computing environments. In an illustrative implementation, a computing environment comprises a test amplification engine and at least one instruction set to instruct the test amplification engine to process data representative of a request to perform a test for one or more execution errors in an distributed computing environment according to a selected execution error testing paradigm dependent on identifying critical sources of non-determinism for execution within the exemplary distributed computing environment. In an illustrative operation, a participating distributed computing environment operator (e.g.

Abstract: A storage system that may include one or more memory sections, one or more switches, and a management system. The memory sections include memory devices and a section controller capable of detecting faults with the memory section and transmitting messages to the management system regarding detected faults. The storage system may include a management system capable of receiving fault messages from the section controllers and removing from service the faulty memory sections. Additionally, the management system may determine routing algorithms for the one or more switches.

Abstract: Determining an underlying cause for errors that are detected in the data processing system is performed. An occurrence of at least one error in the data processing system is detected, thereby forming a detected error. Responsive to detecting the detected error, a determination is made as to whether there is at least one previously recorded error in an error history data structure that is the underlying cause for the detected error. The at least one previously recorded error is related to the detected error and the at least one previously recorded error is of a different type from the detected error. Responsive to identifying the at least one previously recorded error, the at least one previously recorded error is reported to a user.

Abstract: A modified classical Viterbi decoder which can take extrinsic information and output hard decisions. A modified Viterbi decoder is provided comprising a branch metric unit, the unit having a calculator; and a processor adapted to compute a revised branch metric by combining the initial branch metric and an additional weight parameter. The modified classical Viterbi decoder computes a branch metric by summing an initial branch metric and the additional weight parameter.

Abstract: A BSC macrostructure for three-dimensional wiring includes a BSC (boundary scan cell) and an aperture electrode for electrode connection which is connected to the BSC.

Abstract: Apparatus, systems, and methods are disclosed, such as those that operate within a memory device to replace one or more selected failing memory cells with one or more repair memory cells and to correct data digits read from other failing memory cells in the memory device using a different method. Additional apparatus, systems, and methods are disclosed.

Abstract: The proposed invention teaches the principle of KV transform coding is an orthogonal and invertible “embedded transform coding” method that provides a very efficient error control with low-complexity decoding and operates at very low Eb/N0. It is unique in the sense that it corrects errors and the remaining samples in error are known unlike other known techniques. The proposed invention has been implemented with error correction, single retransmission of selected samples in error and interleaving of samples of KV blocks to achieve BER of 10?7 at average EB/N0 of <10 dB and BER of 10?3 at an average BER of <3 dB. More over, the proposed system has a code redundancy of log2 (n) for correcting first order correction of one sample in error out of four samples received with a code rate of 2/3. The invention is useful for noisy wireless networks.

Abstract: Systems and methods are provided for tracing parameters indicative of performance of a mobile device that is not tethered to a host computer. The mobile device is instructed to monitor a performance characteristic when the mobile device is not tethered to the host computer. The instructions may be to trace the characteristic at a certain point, for a span in the future, under certain conditions, or at all times. When the mobile device is later tethered to the host computer, the traced parameter data is transferred to the host computer. Applications that decrease performance, as indicated by the traced parameters, may be debugged or optimized. The behavior of the mobile device before, during, and after tethering to the host computer or to a second device may be observed. The performance of a plurality of untethered mobile devices may also be traced, transferred, and compared.

Abstract: A method for monitoring a test case generator system by detecting non-reproducible pseudo-random test cases, comprising: building a first pseudo-random test case having a first sequence of seeds comprising a first starting seed and a first ending seed through the test case generator system; reproducing the first sequence of seeds of the first pseudo-random test case by building a second pseudo-random test case having a second sequence of seeds comprising a second starting seed and a second ending seed through the test case generator system when the test case generator system is operating in a reproduction mode, the first starting seed being used as the second starting seed of the second sequence of seeds; and comparing the first ending seed in the first sequence of seeds to the second ending seed in the second sequence of seeds.

Abstract: A method and system for containing a fault in a network node. A loss of all remaining communication links from a node is detected. A time duration from the loss of a first remaining communication link to the loss of a last remaining communication link is determined. It is established that the node has contained a fault when the time duration for the loss of the first remaining communication link to the loss of the last remaining communication link is not more than a predetermined amount of time.

Abstract: An apparatus and method to design an integrated circuit (IC) to reduce the toggling during shifting in and shifting out of test patterns in a IC having scan chains, while maintaining random-like filling of the “don't cares” of a test set. An average pattern of test patterns of a test set is found for both cases of where the test set is fully specified and not fully specified, inverters are judiciously inserted into the scan path and each test pattern is then modified by XOR-ing it with the average test pattern to produce a modified test pattern, which produces less toggling, translating to less power consumption. Further, the random filling of don't cares, as opposed to 0-fill, 1-fill, or adjacent fill, increases defect detection through collateral coverage.

Abstract: A standard memory module socket is removed from a target DRAM module slot on the component side and the test adaptor board connects to the target DRAM module slot on the reverse (solder) side of a personal computer motherboard, or an extender card may be used. The target DRAM module slot is a middle slot, such as the second or third of four DRAM module slots. The first and fourth DRAM module slots are populated with known good memory modules storing the BIOS at a high address and an operating system image and a test program at a low address. The test program accesses a memory chip in a test socket on a test adaptor board that is connected to the target DRAM module slot to locate defects. The motherboard does not crash since the BIOS, OS image, and test program are not stored in the memory chip under test.

Abstract: A method for detecting and correcting errors in a memory having a read/write paradigm is presented. In these implementations, various approaches to detect errors on a per word or per group of words basis and correct errors on a per group of words or per page basis, respectively, in relation to a memory and its associated differing read/write operations, are provided. For instance, in one implementation, errors are detected on a per word basis and corrected on a per page basis for a NOR Flash Memory having differing read/write operations of reading on a per word basis and writing on a per page basis. Advantageously, benefits of the various implementations include reduced encoder/decoder complexities, reduced parity overhead requirements, and reduced performance degradation.

Abstract: A solution for generating functional coverage bins for testing a device is disclosed. A method includes: receiving information of a failing test generated from a random simulation performed on the device; tracing a first sequence of signal events that happened in the failing test; correlating the signal events to coverage bins to generate a sequence of coverage bins; creating cross coverage event sequence bins based on the sequence of coverage bins; and outputting the created coverage event sequence bins for testing the device.

Abstract: A data control unit includes a primary power supply line to which a primary power supply voltage is supplied; a secondary power source line to which a secondary power supply voltage is supplied; a voltage converter for converting the primary power supply voltage into the secondary power supply voltage; a voltage level detection unit which is connected to the primary power source line, and outputs a voltage level detection signal; a reset signal generator which is connected to the secondary power source line, and outputs a reset signal; and a control signal generation unit which receives the voltage level detection signal and the reset signal, and outputs a control signal. The data control unit detects power supply cutoff, and secures the time for sufficient backup process.

Abstract: A method and apparatus for automatic error analysis and recovery for applications on one or more computer systems, which maintain a dependency structure of the applications, maintain correlation information between errors and error symptoms, and analyze and recover a problem when the problem occurs. The method, program product or system further utilizes a centralized knowledge base for runtime error handling and problem resolution.

Abstract: Systems and methods are disclosed for processing data. In one exemplary implementation, there is provided a method of generating H output data streams from W data input streams produced from input data. Moreover, the method may include generating the H discrete output data streams via application of the W data inputs to one or more transforming components or processes having specified mathematic operations and/or a generator matrix functionality, wherein the W data inputs are recoverable via a recovery process capable of reproducing the W data inputs from a subset (any W members) of the H output data streams. Further exemplary implementations may comprise a transformation process that includes producing an H-sized intermediary for each of the W inputs, combining the H-sized intermediaries into an H-sized result, and processing the H-sized result into the H output data streams.

Abstract: The present invention discloses a solution for automatically replacing a media files upon a device able to identify problems with locally stored media files. Initially, an automated process or user of a media playing device can initially identify a media file, which the media playing device is unable to play. The media playing device can be connected to an external device associated with a media store including a set of source media files. The source media files of the media store can be automatically queried for a corresponding one of the detected media file. A copy of a source media file resulting from the query can be automatically conveyed from the media store to the media playing device.

Abstract: To help identify a noise (interference) source in an electronic device that may be causing data errors in the device, relatively low level data receiver circuitry in the device is provided with one or more error signal output leads. An error signal on such a lead includes an error indication as soon as possible after the associated low level circuitry detects a data error. The timing of such an error indication is compared to the timing of noise from various possible noise sources in the device. The noise source that produced significant noise closest in time prior to the error indication may be identified as the noise source that was probably responsible for the data error that caused the error indication.

Abstract: The method is for hardening a computer based on off-the-shelf components so that it resists bombardment by particles of cosmic origin encountered at high altitude and near the poles. It relates more particularly to a computer comprising a processor/bridge pair, the bridge ensuring auxiliary functions for controlling the data exchanges between the processor and a random-access memory incorporating a Hamming-type error corrector code into the information exchanged and consists in inserting between the processor/bridge pair and the random-access memory an interface device carrying out a two-way transcoding between the Hamming-type error correction code incorporated into the information exchanged by the auxiliary functions for controlling the data exchanges of the processor/bridge pair and a Reed-Solomon-type error correction code adapted to the architecture of the random-access memory.

Abstract: A file data restoring system and method of a computer operating system and software thereof are applied in the installation of an operating system into a client computer. Divide the file data corresponding to the operating system into data blocks according to an appointed data size. Generate a check code for each of the data blocks to form a sequence list of original check codes and a sequence list of target check codes. Compare the sequence list of original check codes with the sequence list of target check codes, after installing the operating system into the computer. If the comparison result is inconsistent, a restoring call information is sent out. The position of the inconsistent check code is acquired through the restoring call information and the comparison result. The original file data corresponding to the position of the check code is read and restored to a corresponding target file.

Abstract: An integrated circuit includes an array of memory cells, and an error correction code circuit configured to correct errors in data read from the array based at least in part on a map that identifies locations of erratic memory cells in the array.

Abstract: A system and method are described for protecting certain types of multimedia data transmitted over a communication channel. For example, one embodiment of a computer-implemented method comprises: logically subdividing each of a sequence of images into a plurality of tiles, each of the tiles having a defined position within each of the sequence of images, the defined position remaining the same between successive images; encoding one or more of the tiles in each image of the sequence of images using a first compression format and encoding the reminder of the tiles in each image using the second compression format, the second compression format dependent on tiles previously-encoded by the first and/or the second compression formats; generating a forward error correction (FEC) code for tiles encoded using the first compression format; transmitting the FEC code with each of the tiles encoded using the first compression format to a client.

Abstract: A method for communication between a geologic downhole measurement device and a receiver is provided. The method includes: receiving a bit sensitive data stream representing at least one property of at least one of a geologic formation and a borehole; grouping the data stream into at least one data block; and coding the data block with a forward error correction code. A system and computer program product for communication between a geologic downhole measurement device and a receiver are also provided.

Abstract: A retransmission process control method is provided that increases the efficiency of memory usage in retransmission processes. A method for processing data in multiple retransmission processes, used in a receiving-side communication device, includes; determining whether or not a received signal can be stored in a reception buffer for retransmission processes; when the received signal cannot be stored in the reception buffer, discarding from the reception buffer at least part of existing received signals corresponding to retransmission processes in progress; and storing the received signal into the reception buffer.

Abstract: Delay-fault testing and parametric analysis systems and methods utilizing one or more variable delay time-base generators. In embodiments of the delay-fault testing systems, short-delay logic paths are provided with additional scan-chain memory elements and logic that, in conjunction with the one or more variable-delay time-base generators, provides the effect of over-clocking without the need to over-clock. Related methods provide such effective over-clocking. In embodiments of parametric analysis systems, test point sampling elements and analysis circuitry are clocked as a function of the output of the one or more variable-delay time-base generators to provide various parametric analysis functionality. Related methods address this functionality.

Abstract: A system and method for pseudorandom permutation for interleaving in wireless communication is disclosed. In one embodiment, the method comprises receiving a first ordered sequence of communication symbols having a first order, permuting the first ordered sequence of communication symbols to generate a second ordered sequence of communication symbols having a second order, and outputting the second ordered sequence of communication symbols, wherein the second order is based, at least in part, on a third order having a greater size than the second order, the third order being a pseudorandom permutation defined by the input-output relationship Y = mod ? ( m * S * ( S + 1 ) 2 , P ) , wherein P is the smallest power of two not less than the number of elements in the first ordered sequence, S is an input order represented by a sequence of consecutive integers from zero to P?1 in increasing order, Y is an output order represented as a sequence of integers, and m is an integer.

Abstract: A system and method for providing a memory device having a shared error feedback pin. The system includes a memory device having a data interface configured to receive data bits and CRC bits, CRC receiving circuitry, CRC creation circuitry, a memory device pad, and driver circuitry. The CRC receiving circuitry utilizes a CRC equation for the detection of errors in one or more of the received data and the received CRC bits. The CRC creation circuitry utilizes the CRC equation for the creation of CRC bits consistent with data to be transmitted to a separate device bits. The memory device pad is configured for reporting of any errors detected in the received data and the received CRC bits. The driver circuitry is connected to the memory device pad and merged with one or more other driver circuitries resident on one or more other memory devices into an error reporting line.

Abstract: A fault location device detects a communication device connected to a broken communication line from among communication devices that carry out communications between each other through a two-wire communication line. The communication device, when detecting a communication error, stores communication error time and a communication error counter accumulated value indicating accumulated counts of the communication error, changes into a bus off state on the basis of the communication error counter accumulated value, and, after a predetermined period of time, returns from the bus off state. The fault location device includes an acquisition unit that acquires the communication error time and communication error counter accumulated value, stored in each communication device; and a detection unit that detects a communication device connected to a broken communication line on the basis of variations in the communication error counter accumulated values while any one of the communication devices is in a bus off state.

Abstract: A memory system, with a memory controller and a memory module, is configured to transfer error securing data and address signals within signal frames between the memory controller and the memory module. The memory system includes: an address register configured to pre-store an address signal associated with at least one block of data signals to be transferred, and at least one cyclic redundancy checksum calculator included in one of the memory controller and the memory module, the calculators being configured to calculate a cyclic redundancy checksum for the at least one data signal block, wherein the pre-stored address signal is used as an initial value for the calculation of the cyclic redundancy checksum and the at least one block of data and address signals are transferred together with the calculated cyclic redundancy checksum.

Abstract: A recording medium stores a program which causes a computer to execute a process for responding to failure of a management subject apparatus, based on incident information. The program causes the computer to execute a management procedure. The procedure manages steps of the response to the failure with the incident information. A response knowledge acquisition procedure referring to failure response information in which is described response knowledge corresponding to each step of the response to the failure, and acquires response knowledge for the failure in accordance with the step of the response to the failure managed by the failure response step management procedure with the incident information. A response knowledge process execution procedure executes a process in accordance with the response knowledge for the failure acquired by the response knowledge acquisition procedure.

Abstract: A data processing apparatus and method are provided for testing stability of memory cells in a memory device. A data processing apparatus comprises a memory device having an array of memory cells for storing data values. Test circuitry is employed in a test mode of operation to execute one or more test patterns in order to detect any memory cells which may malfunction in a normal mode of operation due to cell instability following a write operation, as for example may be caused by body region history effect in embodiments where each memory cell comprises at least one transistor having a body region insulated from a substrate. Each test pattern causes a sequence of access requests to be issued to the memory device whose timing is controlled by a test mode clock signal. Dummy read control circuitry is employed in the test mode of operation, and is responsive at least to each write access request to generate an internal clock signal which has an increased frequency with respect to the test mode clock signal.

Abstract: In a network analyzer, a storage stores a set of occurrence frequencies in entire, first and final intervals. An arithmetic processor counts the value while deleting the frequency information based on the stored frequency information. The arithmetic processor determines whether to estimate the occurrence frequency in the interval next to the first interval for the stored frequency information after counting for a predetermined number of data sets or counting the value in each interval. When the determination is true, the difference in occurrence frequency in the first interval and the estimated occurrence frequency are stored as the occurrence frequency in a number, corresponding to the predetermined number—1, of the intervals shifted by one interval. The occurrence frequency in the next interval is estimated based on the set to store the estimated occurrence frequency in the storage as the occurrence frequency of the first interval in the next data sets.

Abstract: Impulse noise from nearby or intense electrical sources can disrupt communications over digital subscriber lines. There are many methods to deal with errors produced by impulse noise sources. Forward error correction (FEC) codes such as Reed Solomon coding along with scrambling and interleaving are used to correct small errors. However, for larger errors, retransmission is favored. Retransmission can be applied at the Discrete Multi-tone symbol level thus eliminating the need to insert sequence identification into data transmission units, furthermore retransmission can also be employed to exploit the error correcting capabilities of the FEC codes. Finally, an impulse noise protection system can exploit impulse noise statistics to configure the redundancy in the FEC codes and to enable the use of blanking. Exemplary embodiments of systems described can cooperatively use impulse noise statistics to utilize retransmission, FEC and blanking to mitigate the effects of impulse noise.

Abstract: Systems and methods for correcting an anomaly in a target computer that is part of a network of computers. An anomaly is detected in data stored on a target computer and it is determined what corrective data is needed to correct the anomaly. A donor computer with the corrective data is located and requested to provide the corrective data to the target computer. The corrective data is used to correct the anomaly on the target computer and the target computer may acknowledge receipt of the corrective data. In one embodiment, an arbitrator component receives the requests for the corrective data, passes the requests to potential donor computers, and receives the acknowledgements from the target computers.

Abstract: In an example embodiment, a method is provided to identify an error associated with a system battery. This system battery is operably associated with a computing device and is used to power the computing device. A parameter of the system battery is tested and an error associated with the system battery may be detected. In an example, the error may be detected before the operating system is loaded onto the computing device. In another example, the error may be detected when the computing device is waking from a reduced power mode.

Abstract: Systems and/or methods that facilitate that facilitate error correction of data stored in memory components, such as flash memory devices are presented. An optimized correction component can be used to break data into two or more data blocks. The optimized correction component can facilitated creating one or two redundancy blocks that can be associated with the data blocks, wherein data blocks and the redundancy blocks can be assembled into a data stripe that can be stored in three or more of the memory components. Upon retrieval of the data stripe, the optimal correction component, an error correction code (ECC) component or a combination thereof can correct data blocks that contain errors wherein the decision whether the optimized correction component or the error correction code (ECC) component corrects the errors can be based in part on a predetermined criteria.

Abstract: A method performed by a software module for testing a computer device. The method first selects the computer device from a device list, and links a driver of the computer device through a program interface, in which the program interface is provided by an operating system. Next, the method sets the computer device by the driver according to a function of the computer device, and records the execution time for the computer device to perform the corresponding function.

Abstract: The subject matter disclosed herein provides an outer coding framework for minimizing the error rate of packets, such as application data packets used to transmit digital video broadcast data as well as other forms of data. In one aspect, there is provided a method. The method may include inserting a received packet into one or more rows of a frame. The one or more rows including the received packets may be encoded using an outer code. A block of data from a column of the frame may be read. The frame may include the one or more rows encoded using the outer code. The block that is read may be provided to enable an inner code to encode the block before transmission through a wireless network. Related systems, apparatus, methods, and/or articles are also described.

Abstract: Various example embodiments are disclosed. According to an example embodiment, a receiving station in a wireless network may receive a plurality of Medium Access Control Packet Data Units (MPDUs) from a transmitting station. Each of the plurality of MPDUs may include a sequence number. The receiving station may also determine which of the plurality of MPDUs were successfully or not successfully received from the transmitting station. The receiving station may also transmit, to the transmitting station, at least one automatic repeat request (ARQ) feedback information element (IE). The at least one ARQ feedback IE may include a number of acknowledgment maps field indicating a number of acknowledgment maps included in the ARQ feedback IE and the indicated number of acknowledgment maps. Each of the acknowledgment maps may include a sequence format field indicating a number of block sequence fields and the indicated number of block sequence fields.

Abstract: Provided is an availability prediction method for a high availability. The method includes calculating a basic survival probability that the other node survives until a failure on one node of two nodes constituting a cluster is fixed, and determining an optimal number of nodes meeting a preset reference availability probability by calculating an availability probability for a predetermined range of the number of nodes on the basis of the basic survival probability. The method determines the number of nodes in the high availability cluster so as to match a reference availability probability, and is able to accomplish an optimal configuration of a cluster by calculating the availability probabilities for combinations between active node and passive nodes and between head nodes and switches.

Abstract: An exemplary data transmission method is used in a data transmission system which has a data source, a data receiver, first, second, and third transmission lines connected between the data source and the data receiver. The data transmission method includes: the data source generating a checking code of a first byte and a second byte; transmitting the first byte, the second byte and the checking code from the data source to the data receiver via the first, second, and third transmission lines respectively; and the data receiver judging if the first byte, the second byte and the checking code are right, if right, transmission of the first byte and the second byte is complete, if one of the first byte and the second byte is wrong, and the checking code is right, the data receiver corrects the wrong byte via the checking code.

Abstract: The subject matter disclosed herein provides an outer coding framework that, in some implementations, provides frequency diversity to outer codewords that are mapped to modulation symbols. In one aspect, there is provided a method. The method may include inserting a received packet into a frame. Moreover, an outer code may be used to encode the frame. Furthermore, the values read from a column of the frame may be inserted into a link-layer packet. In addition, the column may be shuffled by moving the values of the column based on an offset. The link-layer packet may also be provided to enable an inner code to encode the link-layer packet before transmission. Related systems, apparatus, methods, and/or articles are also described.

Abstract: A test apparatus that tests a device under test is provided, including a driver section that supplies a test signal to a corresponding pin of the device under test, a judgment section that makes a judgment concerning pass/fail of the device under test based on the response signal output by the device under test in response to the test signal, a voltage measuring section that detects a DC voltage of the signal output by the driver section, and an output side adjusting section that adjusts a duty ratio of the signal output by the driver section according to the DC voltage detected by the voltage measuring section.

Abstract: In memory devices that degrade with use, a memory controller may monitor and record a usage history of portions of the memory. The memory controller can then vary a strength of error correction coding to protect information written to various portions of the memory having different usage histories. More specifically, and memory can receive information to be stored in the memory, select a portion of memory to store the information, and store the information in the selected portion of the memory with an error correction coding having a strength that is based on a usage history of the selected portion of the memory.

Abstract: In a transport system, data is reliably transported from a sender to a receiver by organizing the data to be transported into data blocks, wherein each data block comprises a plurality of encoding units, transmitting encoding units of a first data block from the sender to the receiver, and detecting, at the sender, acknowledgments of receipt of encoding units by the receiver. At the sender, a probability that the receiver received sufficient encoding units of the first data block to recover the first data block at the receiver is detected and the probability is tested against a threshold probability to determine whether a predetermined test is met. Following the step of testing and prior to the sender receiving confirmation of recovery of the first data block at the receiver, when the predetermined test is met, transmitting encoding units of a second data block from the sender.

Abstract: One embodiment of the invention relates to a network communication device. The network communication device includes a network interface configured to receive an initial data stream. The network communication device also includes an interleaving redundancy encoder that comprises a memory unit arranged in N columns and D rows. The interleaving redundancy encoder is configured to calculate at least one redundancy byte based on a series of equally spaced, non-consecutive bytes in the initial data stream, where a number of bytes between equally spaced bytes is approximately equal to D?1. Other systems and methods are also disclosed.