Abstract: The invention provides a memory circuit comprising a plurality of storage cells for storing data and redundant spare storage cells for replacing defective storage cells, and a memory access logic for accessing said storage cells connected to a replacement setting register which is writeable during operation of said memory circuit to store replacement settings.

Abstract: A communication system comprises a transceiver capable of receiving a data burst as part of a paging block. The system also comprises processing logic capable of comparing at least part of the data burst to a plurality of permutations of the data burst to locate a matching permutation. The processing logic determines a bit error rate (BER) in accordance with a difference between the data burst and the matching permutation. The processing logic uses the BER to operate the communication system.

Abstract: A system and method for wireless communication of data are disclosed. One embodiment of the system includes a transmitter configured to transmit a data packet including a plurality of displayable elements over a wireless channel. Each displayable element includes a plurality of portions including a most significant portion and a least significant portion. The data packet is divided into a plurality of data groups including a first data group and a second data group. The first data group includes the most significant portions of the displayable elements while the second data group includes the least significant portions of the displayable elements. The system also includes a receiver configured to receive the data packet over the wireless channel and to determine whether any of the data groups is in error. The transmitter is further configured to transmit to the receiver: a retransmission packet including a selected data group in error according to a quality of service associated with the displayable elements.

Abstract: Embodiments of the present invention provide a method, system and computer program product for de-centralized nodal failover handling in a high availability computing architecture. The system can include multiple different nodes coupled to one another in a cluster over a computer communications network including an initial lead node and remaining auxiliary nodes. The system further can include a messaging service coupled to each of the nodes and nodal failover handling logic coupled to each of the nodes and to the messaging service. The logic can include program code enabled to periodically receive heartbeat messages from the messaging service for the initial lead node and to subsequently detect a lapse in the heartbeat messages, to post within a message to the messaging service a request to become a replacement lead node in response to detecting the lapse in the heartbeat messages, and to periodically post heartbeat messages to the messaging service as the replacement lead node for the initial lead node.

Abstract: The present invention relates to a method for transmitting of data frames from user equipment to a base station in a wireless telecommunication network. The method comprises an error control step adapted to retransmit the data frame from the user equipment to the base station, if the received data frame contains errors or if no acknowledge message is received by the user equipment within a predetermined amount of time. The method further comprises a transmission power control step adapted to control a transmission power of the data frames in such a way that the number of retransmissions corresponds to a predetermined number of target retransmission. The number of target retransmission is adapted depending on the traffic load and/or the number of users connected to the base station.

Abstract: When a wired interface circuit receives a CEC message destined for a node device connected through a wireless transceiver circuit, a CEC controller of a wireless node device outputs an ACK for the received CEC message from the wired interface circuit, transmits a wireless data packet containing contents of the CEC message from the wireless transceiver circuit, and waits for the wireless interface transceiver circuit to receive a wireless ACK packet for the transmitted wireless data packet.

Abstract: The invention provides a retransmission manager for use in a digital content delivery system, wherein the delivery system comprises a plurality of user devices, a set of content providers for delivering digital content to the user devices in the form of bursts of content through a source unit. The retransmission manager is connected to the user devices to receive notifications therefrom, each notification received from a given user device identifying a burst received by the given user device which is candidate for retransmission. The retransmission manager selects a set of bursts among the bursts identified by the notifications based on the amount of available bandwidth at the source unit and on negotiation messages received from at least one of the plurality of content providers, the negotiation message being related to at least one burst identified in the notifications and including, for each burst, a negotiation parameter.

Abstract: A method for testing electronic devices comprises receiving a stimulus signal for testing a device. The method comprises setting a filter by changing a performance characteristic of the filter while maintaining settings of the filter, thereby altering the stimulus signal to create an altered stimulus signal. The method comprises outputting the altered stimulus signal.

Abstract: A timing generator that needs no analog circuit for adding jitters and allows the circuit scale and power consumption to be reduced.

Abstract: A system and a method for rapidly diagnosing bugs of system software are apply for rapidly localizing a system program fault that causes a system error and then feeding back to a subscriber. First, according to the subscriber's requirement, a program of system fault analysis standard is preset and written into the system. Next, a plurality of fault insertion points is added into a program module of the system according to the subscriber's requirement for the precision of the fault analysis result. Then, fault management information is generated at the fault insertion points during the running process of the system program, and the management information is monitored for collecting relevant system fault data. After that, the collected system fault data is analyzed in real time through the program of system fault analysis standard, so as to obtain the minimum fault set for causing the system error.

Abstract: A method and computer program for selecting circuit repairs using redundant elements with consideration of aging effects provides a mechanism for raising short-term and long-term performance of memory arrays beyond present levels/yields. Available redundant elements are used as replacements for selected elements in the array. The elements for replacement are selected by BOL (beginning-of-life) testing at a selected operating point that maximizes the end-of-life (EOL) yield distribution as among a set of operating points at which post-repair yield requirements are met at beginning-of-life (BOL). The selected operating point is therefore the “best” operating point to improve yield at EOL for a desired range of operating points or maximize the EOL operating range. For a given BOL repair operating point, the yield at EOL is computed. The operating point having the best yield at EOL is selected and testing is performed at that operating point to select repairs.

Abstract: A method and application for generating an interleaver or a de-interleaver are described. The method for generating interleaver includes: setting interleaving information of a base interleaver and/or de-interleaving information of a base de-interleaver, and respectively performing a cyclic shift transform on the interleaving information of the base interleaver so as to generate a plurality of different interleavers. Alternatively, the method for generating interleaver includes: deducing from the de-interleaving information to obtain the interleaving information of the base interleaver and performing the cyclic shift on the interleaving information obtained by deduction so as to generate a plurality of different interleavers.

Abstract: An invention is disclosed for a computer software timeout algorithm that reduces the amount of list manipulation needed to satisfy system or network requirements for scheduling and cancelling timeout requests to determine whether the expiration time has been reached for execution of an input/output (I/O) request, thereby requiring action to cancel the I/O operation if it has not yet been completed.

Abstract: A method and system for automated testing of a system such as a billing module in a telecommunication system is disclosed. In a first embodiment, test APIs, scenarios and configuration information are embedded into the module itself in a way such that, when testing is desired, tests may be conducted without any need for a dedicated test environment. Tests can be run from within the module itself, thereby eliminating the risk, expense and time required to use external testing systems and data to test the module. In another embodiment, operational data such as live operational orders are wrapped in test headers and are used as input data for testing purposes within the billing module. In this embodiment, test APIs may be embedded into all modules of an operational support system so that complete system end-to-end testing is possible without the use of dedicated external test equipment and processes.

Abstract: A data processing apparatus communicates data bits on a predetermined number of sub-carrier signals of an Orthogonal Frequency Division Multiplexed (OFDM) symbol. The data processing apparatus comprises a parity interleaver operable to perform parity interleaving on Low Density Parity Check (LDPC) encoded data bits obtained by performing LDPC encoding according to a parity check matrix of an LDPC code including a parity matrix corresponding to parity bits of the LDPC code, the parity matrix having a stepwise structure, so that a parity bit of the LDPC encoded data bits is interleaved to a different parity bit position. A mapping unit maps the parity interleaved bits onto data symbols corresponding to modulation symbols of a modulation scheme of the OFDM sub-carrier signals.

Abstract: An ACS unit of a Viterbi decoder and a method for calculating the bit error rate (BER) before Viterbi decoder are provided. The ACS unit includes a state calculator and a BER calculator. The state calculator calculates the state metric of a corresponding target state in the trellis diagram and selects one of two candidate source states as the selected source state of the target state. The state calculator also provides a selection signal indicating the selected source state. The BER calculator is coupled to the state calculator for providing the sum of the BER of the selected source state and the bit error count (BEC) of the transition from the selected source state to the target state as the BER of the target state.

Abstract: A method is provided for providing a multicast service by a base station (BS) in a wireless communication system. The method includes transmitting an Nth data traffic corresponding to a multicast service to a plurality of mobile stations (MSs) through a multicast channel in an Fth frame; determining whether a Negative Acknowledgement (NACK) message indicating a failure to receive the Nth data traffic is received from at least one MS in an (F+1)th frame; and when the NACK message is received, retransmitting the Nth data traffic to an MS, which transmitted the NACK message, through an other channel different from the multicast channel in an (F+2)th frame.

Abstract: A method, system, and computer program product are provided for determining the recovery readiness of a data asset. A set of metrics are identified for a current recovery operation performed for the data asset and a current recovery objective is identified for the data asset. The current recovery operation is applied to the data asset using the set of metrics. A determination is made as to whether the current recovery operation meets the recovery objective for the data asset. Responsive to a failure of the current recovery operation to meet the recovery objective, an error is presented indicating the failure and a determination is made as to whether a different recovery policy may be implemented to meet the recovery objective for the data asset. If a different recovery policy exists that meets the recovery objective for the data asset, the different recovery policy is implemented.

Abstract: The invention is embodied for solving a problem of occurrence of degradation of the reception characteristic caused by the interference signal component if a symbol making a determination error is contained or if an error factor caused by a propagation channel estimation error or a hardware error (carrier frequency error, sampling frequency error) is contained at the interference canceling time in a wireless communication apparatus for iteratively decoding and receiving a spatial multiplex signal. A wireless communication apparatus 100 according to the invention has an error estimator 13 for estimating an error of a replica signal at the interference canceling time and a weighter 14 for weighting likelihood information for a spatial multiplex signal separated and combined after interference is canceled based on output of the error estimator 13, whereby if an error of the replica signal at the interference canceling time is contained, a good reception characteristic can be provided.

Abstract: A method for recovering malfunction of at least one resource of a mobile device in response to a malware attack and a mobile device thereof. The method comprises diagnosing at least one malfunction of at lest on resource of the mobile device without identifying a reason of the attack, and, in response to said diagnosing, recovering at least one resource of the mobile device. The mobile device comprises one or more resources operatively coupled to at least one sensor directly or indirectly coupled to a recovery block, wherein said sensor is configured to monitor at least one of said resources for information, possibly indicative of at least one affected resource, and to report, directly or indirectly this information and/or derivative thereof to the recovery block; and said recovery block is configured to initiate at least one recovery-related action in respect of at least one of said resources in case the received information and/or derivative thereof meets a certain criterion.

Abstract: A wireless communications network uses a beamforming process to increase signal quality as well as transmission capabilities and reduction of interference. An improved Golay sequence is also used in the wireless communications network. In one aspect, the processes can be used to communicate regardless of whether the system is on an OFDM mode or a single carrier mode.

Abstract: An RF/Microwave on-chip signal source for testing an integrated circuit embedded in a substrate is provided. The signal source includes an on-chip antenna embedded in the substrate to receive a signal from a signal source external to the substrate. The signal source also includes a frequency divider circuit also embedded in the substrate. The frequency divider converts one or more frequencies of the signal into an operating frequency of the integrated circuit, the signal at the operating frequency of the integrated circuit defining an on-chip test signal. The signal source further includes one or more output buffers embedded in the substrate to provide a signal interface with the integrated circuit.

Abstract: When a determination section of a reception apparatus determines that a control channel is intended for the reception apparatus, a comparing section of the reception apparatus compares control information transmitted on the control channel with a reception capability of the reception apparatus. A data channel reception section of the reception apparatus receives a data channel when the control information is within the reception capability of the reception apparatus, but does not receive the data channel when the control information exceeds the reception capability of the reception apparatus. When the control information exceeds the reception capability of the reception apparatus, the transmission section does not transmit an ACK signal and a NACK signal with respect to the data channel.

Abstract: The present invention implements a method and apparatus for using components within a Serializer/DeSerializer (SerDes) to emulate the effects of a backplane in order to facilitate automated test equipment (ATE) testing of the SerDes. The SerDes includes a transmitter pre-emphasis circuit (TPXE) that pre-emphasizes a transmitted signal and a receiver equalization circuit (RXEQ) that equalizes a received signal. The TPXE includes coefficients that are dynamically programmable.

Abstract: In some implementations, a method for testing is provided, which includes simulating a functional operational environment for a first type device-under-test with a tester. This includes recognizing a non-deterministic response signal having a predetermined protocol, receiving the non-deterministic response signal from the first type device-under-test, ascertaining an expected stimulus signal to be transferred to the first type device-under-test from the non-deterministic response signal based on the predetermined protocol, and initiating transmission of the expected stimulus signal to the first type device-under-test. The method further includes simulating a functional operational environment for a second type device-under-test with the tester after testing the first type device-under-test.

Abstract: Systems and/or methods that facilitate error correction of data are presented. An error correction code (ECC) control component facilitates enabling or disabling error correction of data being written to or read from memory, such as flash memory, based on ECC indicator data associated with a piece of data. The ECC control component can analyze data, parity code, and/or indicator data associated with the incoming data and/or data stored in the memory location where the incoming data is to be written to determine whether parity code can be written for the incoming data and/or whether error correction can be enabled with respect to the incoming data. Error correction can be enabled when an indicator bit associated with the data is unprogrammed (e.g., bit set to ‘1’ state) and can be disabled by programming the indicator bit (e.g., bit set to a ‘0’ state).

Abstract: An access control apparatus includes a memory and a command executor executing an access process on a command with the command completion time limit. An address of an inaccessible recording area is stored in the memory. Data attempted to be written on the inaccessible recording area is obtained. The data is stored in association with the address in the memory. An automated alternate processor executes the automated alternate process of the inaccessible recording area in a predefined period of time after the process executed by the command executor is completed. A memory updater deletes the address of the inaccessible recording area whose automated alternate process has succeeded and the data attempted to be written in the recording area at the address.

Abstract: A memory system includes a main memory, a sub-memory, a controller, first and second data readers and a comparator. The main memory stores data and the sub-memory stores data extracted from the data stored in the main memory for detection of an attack. The controller controls operations of the memory system through interfacing with a host. The first data reader is configured to read first data from the main memory based on address information from the controller. The second data reader is configured to store information relating to second data stored in the sub-memory and to read the second data from the sub-memory based on address information from the controller which is the same as the address information received by the first data reader. The comparator compares the first data read by the first data reader with the second data read by the second data reader to detect the attack.

Abstract: A virtualization switch includes first communication line connection terminals which can be connected to a host computer, a physical storage apparatus or a plurality of physical storage apparatuses, and another virtualization switch, a second communication line connection terminal which can be connected to a single line concentrator or a plurality of line concentrators connected to a manager computer by a second communication line a storage virtualization unit, a first communication unit which can communicate with an other virtualization switch through a first communication line, second communication unit which can communicate with the other virtualization switch through an second communication line, second communication line monitor unit which test communication between the virtualization switch, and abnormal state coping unit which executes a closing process and causes the first communication unit to output a failover designation instruction.

Abstract: In a communication method, a sequence of information bits is encoded into systematic bits and parity bits. The systematic bits and the parity bits are grouped in output blocks, each output block to be assigned to an address of a constellation scheme. The addresses include addresses that are more prone to error and address that are less prone to error so that the symbols are grouped such that bits in groups of consecutive bits of the sequence of information bits are not all assigned to addresses that are more prone to error.

Abstract: One code (a compressed redundant code) is created based on a plurality of first redundant codes, each created on the basis of a plurality of data units, and this compressed redundant code is written to a nonvolatile storage area. This compressed redundant code is used to restore either a data element constituting a multiple-failure data, or a first redundant code corresponding to the multiple-failure data, which is stored in an unreadable sub-storage area of a partially failed storage device, and to restore the data element constituting the multiple-failure data which is stored in a sub-storage area of a completely failed storage device, based on the restored either data element or first redundant code, and either another data element constituting the multiple-failure data or the first redundant code corresponding to the multiple-failure data.

Abstract: An RDS compatible receiver has a demodulator which demodulates RDS data, a register which converts the demodulated RDS data to block data and outputs the block data, an offset generating unit which predicts and outputs an offset word of the block data based on values of a pattern match flag signal and a synchronization flag signal, an error correction processing unit which performs error correction of the block data using the predicted offset word, compares the number of error corrections with a predetermined correction threshold, determines whether the predicted offset word is right or not based on the comparison result, and outputs the pattern match flag signal based on the determination result, and a synchronization determining unit which detects whether or not the predicted offset word determined to be right matches a predetermined offset sequence pattern, determines whether RDS block synchronization is established or not, and outputs the synchronization flag signal based on the determination result.

Abstract: Even when a failure incapable of being detected by a single guarantee code occurs in data, a storage controller of the present invention can detect and restore this failure. The controller, upon receiving a write command from a host, establish a first data guarantee code in the write data, and establish a second data guarantee code in the parity related to the write data. Upon receiving a read command from the host, the controller determines the correctness of the data based on the first data guarantee code, and also detects the presence or absence of a failure by comparing the first data guarantee code with the second data guarantee code. When a failure is detected, the controller restores the failure on the basis of RAID technology.

Abstract: A digital broadcasting transmission/reception system, and a signal processing method thereof for turbo-processing digital broadcasting transport stream and transmitting the processed stream, includes a parity area generating unit preparing a first area for parity insertion with respect to a dual transport stream (TS) which includes a normal stream and a turbo stream as multiplexed, a first interleaver interleaving the dual TS which is transmitted from the parity area generating unit, a turbo processing unit detecting the turbo stream from the interleaved dual TS, exclusively encoding the detected turbo stream for turbo-processing, and stuffing the encoded turbo stream into the dual TS, a deinterleaver deinterleaving the dual TS which is processed by the turbo processing unit, and a transmitting unit transmitting the dual TS which is processed at the deinterleaver.

Abstract: An apparatus for reliably transferring media over a network from a sending node to a receiving node. The sending node includes a media ascertaining element configured to ascertain if media to be transmitted from the sending node to the receiving node is either time-sensitive or not time-sensitive. The sending node also includes a transmission element that is configured to (i) transmit the non time-sensitive media from the sending node to the receiving node by adjusting the rate of transmission of the non time-sensitive media at the sending node based on network conditions and (ii) transmit the time-sensitive media from the sending node to the receiving node. The receiving node includes a media loss ascertaining element configured to ascertain at the receiving node if a predetermined acceptable network transmission loss level is met.

Abstract: A digital broadcast transmitting/receiving system, and a signal processing method thereof, includes a randomizer for randomizing a transport stream into a specified position of which stuff bytes are inserted, a stuff-byte exchanger for replacing the stuff bytes included in data output from the randomizer with specified known data, an RS encoder for performing an RS-encoding of data output from the stuff-byte exchanger, an interleaver for interleaving data output from the RS encoder, a trellis encoder for performing a trellis encoding of data output from the interleaver, an RS parity generator for generating a parity by performing an RS encoding of data output from the RS encoder, and outputting the generated parity to the trellis encoder, and a modulator/RF converter for modulating data output from the trellis encoder and performing an RF up-converting of the modulated data.

Abstract: A novel method to divide the whole decoding process of the Viterbi decoder into four pipeline stages and the Viterbi decoder therefore. With an appropriate choice on the system clock, the invention trade-off the decoding speed with the hardware cost so that the designed Viterbi decoder is able to satisfy the decoding speed requirement for the highest speed profile in VDSL2 systems, 30 MHz profile. At the same time, with four-stage pipeline to just enough to meet the speed requirement, the hardware cost for the new designed Viterbi decoder is reduced compared with single-staged decoding.

Abstract: A system and method for verifying the receive path of an input/output device such as a network interface circuit. The device's operation with various different input sources (e.g., networks) and output sources (e.g., hosts, host buses) is modeled in a verification layer that employs multiple queues to simulate receipt of packets, calculation of destination addresses and storage of the packet data by the device. Call backs are employed to signal completion of events related to storage of packet data by the device and modeling of data processing within the verification layer. Processing of tokens within the verification layer to mimic the device's processing of corresponding packets is performed according to a dynamic DMA policy modeled on the device's policy. The policy is dynamic and can be updated or replaced during verification without interrupting the verification process.

Abstract: An interleaving method to which time-first-mapping is applied for a plurality of channel-coded and rate-matched code blocks considering a modulation scheme in a mobile communication system is provided. The interleaving method includes determining sizes of a horizontal area and a vertical area of an interleaver memory, selecting a defined number of adjacent coded symbols in a same code block according to a modulation scheme, generating modulation groups in a vertical direction, sequentially writing the modulation groups in the horizontal area on a row-by-row basis, and sequentially reading the symbols written in the interleaver memory on a column-by-column basis.

Abstract: An apparatus and method for controlling a disk drive is provided. A disk lubricant sweep component for periodically initiates a disk lubricant spreading action. A disk data read check component checks data at one or more LBAs during the disk lubricant sweep. The apparatus may cache data from LBAs that have been checked by the disk data read check component and found correct and record LBAs that have been found correct, so that they can be omitted from subsequent operation of the read check component. The apparatus may further comprise an error checking and correcting component for checking and correcting data found incorrect by reason of a soft error, and an error reporting component for reporting on one or more LBAs that have been checked and found incorrect by reason of a hard error.

Abstract: A system and method for verifying the transmit path of an input/output device such as a network interface circuit. The device's operation with various different input sources (e.g., hosts, input buses) and output sources (e.g., output buses, networks) is modeled in a verification layer that employs multiple queues to simulate receipt of input data, submission to an output port and transmission from the device. Call backs are employed to signal completion of events related to receipt of data at the device and modeling of data processing within the verification layer. As call backs are resolved, corresponding tasks are executed to advance the processing of the data through the verification layer. A device-specific algorithm is executed in the verification layer to predict the ordering of output from the device, and that output is compared to the predicted output by a transmission checker.

Abstract: A digital broadcasting transmission system, and a signal processing method thereof, includes a parity area generating unit preparing a first area for parity insertion with respect to a dual transport stream (TS) which includes a normal stream and a turbo stream as multiplexed, a first interleaver interleaving the dual TS which is transmitted from the parity area generating unit, a turbo processing unit detecting the turbo stream from the interleaved dual TS, exclusively encoding the detected turbo stream for turbo-processing, and stuffing the encoded turbo stream into the dual TS, a deinterleaver deinterleaving the dual TS which is processed by the turbo processing unit, and a transmitting unit transmitting the dual TS which is processed at the deinterleaver.

Abstract: Embodiments of an application crash resist method and apparatus including an abnormal application termination service and an exception handler are disclosed herein. The service is configured to broadcast messages to cause the exception handler to be loaded by applications, and the exception handler is configured to stall abnormal termination of an application having loaded an instance of the exception handler. In various embodiments, the exception handler instances further report abnormal terminations to the service, and to receive instructions on how long to stall from the service. In various embodiments, the method and apparatus further includes a tray application through which the service obtains user inputs on how long to stall an abnormal termination from a user.

Abstract: Disclosed is a semiconductor device in which In case a data group output from a first output pin in a first word configuration is output from the first output pin and a second output pin in a second word configuration, and a data group output from a third output pin in a first word configuration is output from the third output pin and a fourth output pin in a second word configuration, the second output pin is arranged adjacent to the first output pin, and the fourth output pin is arranged adjacent to the third output pin.

Abstract: A host and a storage system each keep a shared identifier indicating a state of a system. The storage system acquires, at update of data, a data pair including data for a change through processing of the host and data before the update. The storage system relates the data pair to a shared identifier. When the host indicates an identifier, the storage system restores data using the data pair.

Abstract: Embodiments related to retransmission and a retransmission request are described and depicted.

Abstract: One embodiment relates to a method of communicating data between a transmitter and a receiver of a communication system. In this method, a payload data stream is received from a network interface layer. The payload data stream includes data units eligible for retransmission and data units non-eligible for retransmission. These data units are grouped into containers, where a container is associated with a container identifier that distinguishes the container from other containers. The containers are grouped into data transmission units, where a data transmission unit includes at least one container along with redundancy information that facilitates error detection for that data transmission unit. The data transmission units are transmitted to the receiver as a transmission data stream. Other methods and systems are also disclosed.

Abstract: A method for Fault Tree Map generation employs to transformation of Fault Trees of production installation, specific installation, technical system (Hardware and integrated Hardware/Software) to new Fault Tree diagram (Fault Tree Map), which permits drastically compact the Fault Tree depiction and facilitates performing of the Fault Tree qualitative analysis, including evaluation of combination of latent failures and evident failures, repeated events and critical events position influence, and failure propagation potentiality, besides facility of localization of each Fault Tree logical Gate and relevant failures in the fault tree printed report. Generation takes place using special symbols, which permit to reflect the Fault Tree logic, present all Fault Tree failures with graphically identification of the failure type, and show the failure repetition and also the failure critically (importance) to Fault Tree Top Event probability.

Abstract: A decoder and method for iteratively decoding of low-density parity check codes (LDPC) includes, in a code graph, performing check node decoding by determining messages from check nodes to variable nodes. In the code graph, variable node decoding is performed by determining messages from the variable nodes to the check nodes. The variable node decoding is independent from degree information regarding the variable nodes. Decoded results are output.

Abstract: A method for receiving periodic transmissions of a segmented communication is disclosed. The segmented communication is received and each segment of the segmented communication is examined to determine if the segment is valid. Valid segments are stored, while invalid segments are discarded. Next, it is computed when the invalid segments will be retransmitted. A subsequent transmission of the communication is received and a retransmission of a previously identified invalid segment is extracted, the retransmitted segment being located based on the computation. The retransmitted segment is examined to determine if it is valid.