Abstract: A microfabricated capacitive chemical sensor can be used as an autonomous chemical sensor or as an analyte-sensitive chemical preconcentrator in a larger microanalytical system. The capacitive chemical sensor detects changes in sensing film dielectric properties, such as the dielectric constant, conductivity, or dimensionality. These changes result from the interaction of a target analyte with the sensing film. This capability provides a low-power, self-heating chemical sensor suitable for remote and unattended sensing applications. The capacitive chemical sensor also enables a smart, analyte-sensitive chemical preconcentrator. After sorption of the sample by the sensing film, the film can be rapidly heated to release the sample for further analysis. Therefore, the capacitive chemical sensor can optimize the sample collection time prior to release to enable the rapid and accurate analysis of analytes by a microanalytical system.

Abstract: A charge transfer device formed in a semiconductor substrate and including an array of electrodes forming rows and columns, wherein: the electrodes extend, in rows, in successive grooves with insulated walls, disposed in the substrate thickness and parallel to the charge transfer direction.

Abstract: Pixel array structures to provide a ground contact for a CMOS pixel cell. In an embodiment, an active area of a pixel cell includes a photodiode disposed in a first portion of an active area, where a second portion of the active area extends from a side of the first portion. The second portion includes a doped region to provide a ground contact for the active area. In another embodiment, the pixel cell includes a transistor to transfer the charge from the photodiode, where a gate of the transistor is adjacent to the second portion and overlaps the side of the first portion.

Abstract: In a semiconductor device in which a glass substrate is attached to a surface of a semiconductor die with an adhesive layer being interposed therebetween, it is an object to fill a recess portion of an insulation film formed on a photodiode with the adhesive layer without bubbles therein. In a semiconductor die in which an optical semiconductor integrated circuit including a photodiode having a recess portion of an interlayer insulation film in the upper portion, an NPN bipolar transistor, and so on are formed, generally, a light shield film covers a portion except the recess portion region on the photodiode and except a dicing region. In the invention, an opening slit is further formed in the light shield film, extending from the recess portion to the outside of the recess portion, so as to attain the object.

Abstract: A charge transfer device formed in a semiconductor substrate and including an array of electrodes distributed in rows and columns, wherein: each electrode is formed in a cavity with insulated walls formed of a groove which generally extends in the row direction, having a first end closer to an upper row and a second end closer to a lower row; and the electrodes of two adjacent rows are symmetrical with respect to a plane orthogonal to the sensor and comprising the direction of a row.

Abstract: A profiled contact for a device, such as a high power semiconductor device is provided. The contact is profiled in both a direction substantially parallel to a surface of a semiconductor structure of the device and a direction substantially perpendicular to the surface of the semiconductor structure. The profiling can limit the peak electric field between two electrodes to approximately the same as the average electrical field between the electrodes, as well as limit the electric field perpendicular to the semiconductor structure both within and outside the semiconductor structure.

Abstract: A range sensor includes a charge generating region, a signal charge collecting region, an unnecessary charge collecting region, a photogate electrode, a transfer electrode, and an unnecessary charge collecting gate electrode. Outer peripheries of the charge generating region extend to sides of a polygonal pixel region except for corner portions thereof. The signal charge collecting region is disposed at a center portion of the pixel region and inside the charge generating region so as to be surrounded by the charge generating region. The unnecessary charge collecting region is disposed in the corner portion of the pixel region and outside the charge generating region. The photogate electrode is disposed on the charge generating region. The transfer electrode is disposed between the signal charge collecting region and the charge generating region. The unnecessary charge collecting gate electrode is disposed between the unnecessary charge collecting region and the charge generating region.

Abstract: A solid-state image pickup device including: a pixel region on a semiconductor substrate, the pixel region including: a sensor region for photoelectrically converting incident light; a vertical CCD formed on one side of the sensor region with a readout region interposed between the sensor region and the vertical CCD; and a channel stop region formed on a side opposite from the sensor region with the vertical CCD interposed between the sensor region and the channel stop region; and a vertical transfer electrode on the vertical CCD with an insulating film interposed between the vertical transfer electrode and the vertical CCD. The vertical transfer electrode is formed above the vertical CCD such that width of the vertical transfer electrode and width of a channel region of the vertical CCD are substantially equal to each other.

Abstract: A unit pixel of a photo detecting apparatus includes a photogate, a transfer gate and a floating diffusion region. The photogate includes a junction gate extending in a first direction and a plurality of finger gates extending from the junction gate in a second direction substantially perpendicular to the first direction. The transfer gate is formed adjacent to the junction gate. The floating diffusion region is formed adjacent to the first transfer gate.

Abstract: A printed wiring board is formed by adhering a coverlay film having a resistance layer formed on a surface of the coverlay film body to a printed wiring board body having a conductive layer formed on a surface of a substrate through an adhesive layer. The resistance layer is separated from and opposed to the conductive layer through the adhesive layer.

Abstract: A charge coupled device imager, which can operate in time delay and integration mode, can be adapted to include variable columns having one or more blocking gates or other barriers that can be independently controlled and used to divide a used portion from an unused portion. The blocking gates may require less power to electrically insulate used from the unused sections. In this regard, an imager's charge handling capacity and dynamic range can be improved, while lowering CCD operating power requirements. Blooming drains can also be included to enhance the functionality of the imager and enable bidirectional imaging capability.

Abstract: A method for manufacturing a solid state image pickup device including a first active region provided with a first conversion unit, a second active region provided with a second conversion unit, and a third active region adjoining the first and the second active regions with a field region therebetween and being provided with a pixel transistor, the method including the steps of ion-implanting first conductivity type impurity ions to form a semiconductor region serving as a potential barrier against the signal carriers at a predetermined depth in the third active region and ion-implanting second conductivity type impurity ions into the third active region with energy lower than the above-described ion-implantation energy.

Abstract: A method for producing a semiconductor device includes preparing a structure having a substrate, a planar semiconductor layer and a columnar semiconductor layer, forming a second drain/source region in the upper part of the columnar semiconductor layer, forming a contact stopper film and a contact interlayer film, and forming a contact layer on the second drain/source region. The step for forming the contact layer includes forming a pattern and etching the contact interlayer film to the contact stopper film using the pattern to form a contact hole for the contact layer and removing the contact stopper film remaining at the bottom of the contact hole by etching. The projection of the bottom surface of the contact hole onto the substrate is within the circumference of the projected profile of the contact stopper film formed on the top and side surface of the columnar semiconductor layer onto the substrate.

Abstract: A driver circuit where malfunctions in the circuit can be suppressed even when a thin film transistor is changed into an enhancement transistor or a depletion transistor is provided. In a pulse output circuit, a circuit for raising potentials of source terminals of first and second transistors from low power supply potentials is provided between the source terminals of the first and second transistors and a wiring for supplying a low power supply potential. Further, a switch for setting the potentials of the source terminals of the first and second transistors to low power supply potentials is provided. The switch is controlled by a judgment circuit for judging whether the first and second transistors are enhancement transistors or depletion transistors.

Abstract: Disclosed herein is a solid-state image pickup device, including a pixel, the pixel including: a light receiving section; a charge transfer path; a transfer electrode; a readout gate section; and a readout electrode.

Abstract: There is provided a charge trap type non-volatile memory device and a method for fabricating the same, the charge trap type non-volatile memory device including: a tunnel insulation layer formed over a substrate; a charge trap layer formed over the tunnel insulation layer, the charge trap layer including a charge trap polysilicon thin layer and a charge trap nitride-based layer; a charge barrier layer formed over the charge trap layer; a gate electrode formed over the charge barrier layer; and an oxide-based spacer formed over sidewalls of the charge trap layer and provided to isolate the charge trap layer.

Abstract: A method of fabricating an MOS device is provided. First, gates and source/drain regions of transistors are formed on a substrate. A photodiode doped region and a floating node doped region are formed in the substrate. Thereafter, a spacer stacked layer including a bottom layer, an inter-layer and a top layer is formed to cover each gate of the transistors. Afterwards, a first mask layer having an opening exposing at least the photodiode doped region is formed on the substrate, and then the top layer exposed by the opening is removed. Next, the first mask layer is removed, and then a second mask layer is formed on a region correspondingly exposed by the opening. A portion of the top layer and the inter-layer exposed by the second mask layer is removed to form spacers on sidewalls of the gates.

Abstract: A light-emitter includes a first electrode and a layered body over the first electrode. The layered body includes a charge injection layer and a light-emitting layer. A bank defines a position of the light-emitting layer of the layered body, and a second electrode is over the layered body. The charge injection layer is formed by oxidation of an upper portion of a metal. The first electrode includes a metal layer that is a lower portion of the metal. An inner portion of the charge injection layer is depressed to define a recess. A portion of the bank is on an outer portion of the charge injection layer.

Abstract: A straddle mount connector is provided for edge mounting to a circuit board of a pluggable module. The straddle mount connector includes a dielectric connector body having a base and a plug extending from the base. The base is configured to be coupled to an edge of the circuit board. The plug has opposite first and second sides and a plate cavity that extends within the plug between the first and second sides. The plug is configured to be received within a receptacle of a receptacle connector. Electrical contacts are held by the connector body. The electrical contacts include mating segments. The mating segments of a first group of the electrical contacts are arranged in a first row that extends a length along the first side of the plug. The mating segments of a second group of the electrical contacts are arranged in a second row that extends a length along the second side of the plug. A ground plate is held within the plate cavity of the plug of the connector body.

Abstract: A device for transferring charges photogenerated in a portion of a semiconductor layer delimited by at least two parallel trenches, each trench including, lengthwise, at least a first and a second conductive regions insulated from each other and from the semiconductor layer, including the repeating of a first step of biasing of the first conductive regions to a first voltage to form a volume accumulation of holes in the area of this portion located between the first regions, while the second conductive regions are biased to a second voltage greater than the first voltage, and of a second step of biasing of the first regions to the second voltage and of the second regions to the first voltage.

Abstract: An Indium Tin Oxide (ITO) gate charge coupled device (CCD) is provided. The CCD device comprises a CCD structure having a substrate layer, an oxide layer over the substrate layer, a nitride layer over the oxide layer and a plurality of parallel ITO gates extending over the nitride layer. The CCD device further comprises a plurality of substantially similarly sized channel stop regions in the substrate layer that extend transversely relative to the ITO gates, such that a given pair of channel stop regions defining a pixel column of the CCD structure. The CCD device also comprises a plurality of vent openings that extend through the nitride layer along the plurality of substantially similarly sized channel stop regions to allow for penetration of hydrogen to at least one of the oxide layer and the substrate layer.

Abstract: A solid-state imaging device of the type having photoelectric conversion elements formed in a matrix pattern on a semiconductor substrate, vertical transfer elements each of which reads signal charges from the photoelectric conversion elements arranged in the column direction and transfers the signal charges in the vertical direction, and a horizontal transfer element which transfers in the horizontal direction the signal charges sent from each of the vertical transfer elements, the horizontal transfer element includes: a charge transfer channel; a first transfer electrode; a second transfer electrode; and an interelectrode insulating film; with the first transfer electrode and the second transfer electrode being at the same potential.

Abstract: Embodiments of amplifiers with depletion and enhancement mode thin film transistors are disclosed herein. Other examples, devices, and related methods are also disclosed herein.

Abstract: A wafer stacked semiconductor package (WSP) having a vertical heat emission path and a method of fabricating the same are provided. The WSP comprises a substrate on which semiconductor chips are mounted; a plurality of semiconductor chips stacked vertically on the substrate; a cooling through-hole formed vertically in the plurality of semiconductor chips, and sealed; micro holes formed on the circumference of the cooling through-hole; and coolant filling the inside of the cooling through-hole. Accordingly, the WSP reduces a temperature difference between the semiconductor chips and quickly dissipates the heat generated by the stacked semiconductor chips.

Abstract: A charge accumulation region of a first conductivity type is buried in a semiconductor substrate. A charge transfer destination diffusion layer of the first conductivity type is formed on a surface of the semiconductor substrate. A transfer gate electrode is formed on the charge accumulation region, and charge is transferred from the charge accumulation region to the charge transfer destination diffusion layer.

Abstract: A solid-state imaging device including a first transfer electrode portion and a second transfer electrode portion having a pattern area ratio higher than that of the first transfer electrode portion. The first transfer electrode portion includes a plurality of first transfer electrodes having a single-layer structure of metal material. The second transfer electrode portion includes a plurality of second transfer electrodes having a single-layer structure of polycrystalline silicon or amorphous silicon.

Abstract: A range image sensor capable of improving its aperture ratio and yielding a range image with a favorable S/N ratio is provided. A range image sensor RS has an imaging region constituted by a plurality of one-dimensionally arranged units on a semiconductor substrate 1 and yields a range image according to a charge amount issued from the units.

Abstract: A MOS transistor suppressing a short channel effect includes a substrate, a first diffusion region and a second diffusion region separated from each other by a channel region in an upper portion of the substrate, a gate insulating layer including a first gate insulating layer disposed on a surface of the substrate in the channel region and a second gate insulating layer having a specified depth from the surface of the substrate to be disposed between the first diffusion region and the channel region, and a gate electrode disposed on the first gate insulating layer.

Abstract: A solid-state image pickup device for preventing crosstalk between adjacent pixels by providing an overflow barrier at the deep potion of a substrate. A partial P type region is provided at the predetermined position of a lower layer region of the vertical transfer register and a channel stop region. This P type region adjusts potential in the lower layer region of the vertical transfer register and the channel stop region. Accordingly, since the potential in the lower layer region of the vertical transfer register and the channel stop region at both sides of the lower layer region is low, electric charges photoelectrically-converted by the sensor region are blocked by this potential barrier and cannot be diffused easily.

Abstract: A solid-state imaging device capable of securing sufficient sensitivity and obtaining favorable characteristics is provided. The solid-state imaging device includes a charge-transfer portion 2 provided on one side of each column of light-receiving sensor portions 1, each forming a pixel, arranged in the form of a matrix and a transfer electrode of the charge-transfer portion 2 including a first transfer electrode formed of first electrode layers 3A and 3C and a second transfer electrode formed by electrically connecting first electrode layers 3B and 3D and a second electrode layer 4; the first electrode layers 3B and 3D in the second transfer electrode are independently formed in each of the charge-transfer portion 2; and the first transfer electrodes 3A and 3C and the second electrode layer 4 are laminated in a portion between pixels adjacent to each other in the direction of the charge-transfer portions 2.

Abstract: A solid-state image sensing device includes: a plurality of light receiving elements arranged in a matrix in a device formation region surrounded by a device isolation region of a semiconductor substrate; a plurality of vertical transfer sections for transferring charges of the light receiving elements in the column direction; and a horizontal transfer section for receiving the charges from the vertical transfer sections and for transferring the received charges in the row direction. The horizontal transfer section includes: a horizontal channel region; and a plurality of horizontal transfer electrodes extending over the horizontal channel region and the device isolation region and being spaced apart from each other. The distance between the horizontal transfer electrodes is larger at a boundary between the device formation region and the device isolation region than in the middle of the horizontal channel region.

Abstract: A full color complementary metal oxide semiconductor (CMOS) imaging circuit is provided. The imaging circuit is made up of an array of photodiodes including a plurality of pixel groups. Each pixel group supplies 3 electrical color signals, corresponding to 3 detectable colors. A color filter array overlies the photodiode array employing less than 3 separate filter colors. Each pixel group may be enabled as a dual-pixel including a single photodiode (PD) to supply a first color signal and stacked PDs to supply a second and third color signal. In one aspect, the color filter array employs 1 filter color per pixel group. In another aspect, the color filter array employees 2 filter colors per pixel group. In either aspect, the color filter array forms a checkerboard pattern of color filter pixels. For example, a magenta color filter may overlie the stacked PDs of each dual-pixel, to name one variation.

Abstract: An imager apparatus and associated starting material are provided. In one embodiment, an imager is provided including a silicon layer of a first conductivity type acting as a junction anode. Such silicon layer is adapted to convert light to photoelectrons. Also included is a semiconductor well of a second conductivity type formed in the silicon layer for acting as a junction cathode. Still yet, a barrier is formed adjacent to the semiconductor well. In another embodiment, a starting material is provided including a first silicon layer and an oxide layer disposed adjacent to the first silicon layer. Also included is a second silicon layer disposed adjacent to the oxide layer opposite the first silicon layer. Such second silicon layer is further equipped with an associated passivation layer and/or barrier.

Abstract: A wafer stacked semiconductor package (WSP) having a vertical heat emission path and a method of fabricating the same are provided. The WSP comprises a substrate on which semiconductor chips are mounted; a plurality of semiconductor chips stacked vertically on the substrate; a cooling through-hole formed vertically in the plurality of semiconductor chips, and sealed; micro holes formed on the circumference of the cooling through-hole; and coolant filling the inside of the cooling through-hole. Accordingly, the WSP reduces a temperature difference between the semiconductor chips and quickly dissipates the heat generated by the stacked semiconductor chips.

Abstract: An Indium Tin Oxide (ITO) gate charge coupled device (CCD) is provided. The CCD device comprises a CCD structure having a substrate layer, an oxide layer over the substrate layer, a nitride layer over the oxide layer and a plurality of parallel ITO gates extending over the nitride layer. The CCD device further comprises a plurality of substantially similarly sized channel stop regions in the substrate layer that extend transversely relative to the ITO gates, such that a given pair of channel stop regions defining a pixel column of the CCD structure. The CCD device also comprises a plurality of vent openings that extend through the nitride layer along the plurality of substantially similarly sized channel stop regions to allow for penetration of hydrogen to at least one of the oxide layer and the substrate layer.

Abstract: A pixel cell and imaging arrays using the same are disclosed. The pixel cell includes a photodiode that is connected to a floating diffusion node by a transfer gate that couples the photodiode to the floating diffusion node in response to a first gate signal. A shielding electrode shields the floating diffusion node from the first gate signal. An output stage generates a signal related to a charge on the floating diffusion node. In one aspect of the invention, the photodiode is connected to the floating diffusion node by a buried channel, and the shielding electrode includes an electrode overlying the channel and positioned between the transfer gate and the floating diffusion node. The shielding electrode is held at a potential that prevents charge from accumulating under the shielding electrode when the floating diffusion is at the second potential.

Abstract: A method and apparatus for propagating charge through a sensor and implementation thereof is provided. The method and apparatus may be used to inspect specimens, the sensor operating to advance an accumulated charge between gates of the TDI sensor. The design implementation provides a set of values representing a plurality of out of phase signals, such as sinusoidal or trapezoidal signals. These out of phase signals are converted and transmitted to the sensor. The converted signals cause the sensor to transfer charges in the sensor toward an end of the sensor. Aspects such as feed through correction and correction of nonlinearities are addressed.

Abstract: A semiconductor device, particularly, a method for manufacturing a high voltage semiconductor device is disclosed. The method includes forming a high voltage gate oxide film on a semiconductor substrate having a high voltage device region and a low voltage device region, forming a gate electrode on the semiconductor substrate having the high voltage gate oxide film, forming a fluorinated silicate glass (FSG) film and a liner film sequentially on an entire surface of the semiconductor substrate including the gate electrode, and forming an interlayer insulating film on the liner film. Thus, it is possible to prevent an increase in leakage current of the high voltage semiconductor device such as a MOS transistor.

Abstract: A charge coupled device is manufactured by using a crystalline silicon film that is formed by growing a crystal in parallel with a substrate by utilizing the nickel element with an amorphous silicon film used as a starting film. The crystal growth direction is made coincident with the charge transfer direction. As a result, the charge coupled device is given high charge transfer efficiency.

Abstract: A method of transferring charge from a photosensitive array using a plurality of vertical shift registers, each having a plurality of vertical elements including first and last vertical element is disclosed The vertical shift registers are capable of transferring charge in a first direction from the first to the last vertical element The method also includes using at least one horizontal shift register having a plurality of horizontal elements. Each of the horizontal elements is arranged to receive charge transferred from the last vertical element of a respective one of the plurality of vertical shift registers, and shift the charge in a horizontal direction. The method includes operating the horizontal shift register during a plurality of horizontal operating intervals and operating the plurality of vertical shift registers during at least a portion of the plurality of horizontal operating intervals.

Abstract: This invention provides a type of solid-state image pickup device characterized by the fact that for a solid-state image pickup device with a broad dynamic range, it is possible to suppress the dark current than photoelectrons overflowing from the photodiode, as well as its driving method. Plural pixels are integrated in an array configuration on a semiconductor substrate. Each pixel has the following parts: photodiode (CPD), transfer transistor (?T), floating diffusion (CFD), accumulating capacitive element (CS), accumulating transistor (?S), and a reset transistor. During the accumulating period of photoelectric charge, voltage (?) over that applied on the semiconductor substrate, or ?0.6 V or lower than the voltage applied on the semiconductor substrate, is applied as an OFF potential on the gate electrode of at least one transfer transistor, the accumulating transistor and the reset transistor.

Abstract: A method for producing a solid-state imaging device, which including: a photoelectric conversion section; a charge transfer section having a charge transfer electrode; and an antireflection film covering a light-receiving region in the photoelectric conversion section, wherein forming the antireflection film includes: forming a sidewall on a lateral wall of the charge transfer electrode after forming the charge transfer electrode; forming an antireflection film on a substrate surface where the sidewall is formed; forming a resist on the antireflection film; melting and flattening the resist to expose the antireflection film on the charge transfer electrode; removing the antireflection film by using the resist as the mask; removing the sidewall; covering the charge transfer electrode with an insulating film; and forming a light-shielding film that reaches a level lower than the top surface of the antireflection film, and that surrounds the periphery of the antireflection film.

Abstract: A charge transfer device formed in a semiconductor substrate and including an array of electrodes forming rows and columns, wherein: the electrodes extend, in rows, in successive grooves with insulated walls, disposed in the substrate thickness and parallel to the charge transfer direction.

Abstract: A method and system enable the subtraction of charge carrier packages in the low-noise charge domain, which is particularly interesting for the operation of demodulation pixels when high background light signals are present. The method comprises the following steps: demodulation of an optical signal and integration of the photo-generated charge carriers; charge transfer to an external capacitance. The second step means a recombination of electrons and holes in the charge domain and an influencing of the opposite charge carriers on the second plate of the capacitance. This approach allows for low-noise subtraction of charge packages in the charge domain and, at the same time, for creating pixels with much higher fill factors because the capacitances can be optimized for storing just the differential parts, without the DC component.

Abstract: A well region of a first conductivity type located in a substrate of the first conductivity type and below about half the channel length of an electrically active portion of a transistor gate is disclosed. The well region is laterally displaced from a charge collection region of a second conductivity type of a pinned photodiode.

Abstract: A light detecting system is disclosed. The system comprises an arrangement of quantum dots forming an optically active region, a channel region and a charge carrier extractor between the active region and the channel region. The charge carrier extractor is characterized by a set of gradually decreasing energy levels between a characteristic excited energy level of the active region and a characteristic conductance energy level of the channel region.

Abstract: A transistor includes a control electrode, a first current electrode and a second current electrode. The control electrode includes a body portion, and first and second hand portions protruded from first and second ends of the body portion, respectively. The first current electrode is electrically insulated from the control electrode and disposed over a region between the first and second hand portions of the control electrode. A portion of the first current electrode is overlapped with a portion of the control electrode. The second current electrode is electrically insulated from the control electrode and partially overlapped with the body portion, the first hand portion and the second hand portion of the control electrode. Therefore, parasitic capacitance is reduced.

Abstract: Disclosed is a CMOS image sensor including a gate electrode of a finger type transfer transistor for controlling the saturation state of a floating diffusion region according to the luminance level (i.e. low luminance or high luminance). The CMOS image sensor includes first and second photodiode regions for generating electrons in response to incident light, and a transfer transistor positioned between the first and second photodiodes for receiving the generated electrons transferred from the first and/or second photodiode.

Abstract: A solid-state imaging apparatus includes a pixel array comprising a plurality of light receiving elements disposed in a charge transfer direction, the plurality of light receiving elements converting a light signal into an electric signal, a first charge transfer unit and a second charge transfer unit arranged on each side of the pixel array and transferring a signal charge input from the pixel array in the charge transfer direction, a first floating diffusion region connected to the first charge transfer unit, a second floating diffusion region connected to the second charge transfer unit, a wiring layer connecting the first floating diffusion region with the second floating diffusion region, and an output circuit connected to the wiring layer and output a signal voltage in accordance with a potential of the first floating diffusion region and the second floating diffusion region.

Abstract: The anti-blooming structure of an image sensor is supplied with varying voltages during different integration periods such that charges generated in response to low level light are fully captured, whereas charges generated in response to a bright light spill over in a controlled manner. Accordingly, sensor's response may be generated to result in higher gains at low light levels and progressively lower gains at the higher light levels.