Abstract: A number of improvements relating to methods and apparatuses for kidney dialysis are disclosed. These include methods such as supplying a dialysis machine including a touch screen interface to a machine user and supplying to the machine user accessory devices to be used with the dialysis machine in operation.

Abstract: One inventive aspect relates to a display system for displaying information and a method for displaying. The system comprises a processing unit and a display unit comprising a display panel. On the image data processing path for transferring information to the display panel the number of writable memory components external to the display panel is limited to one. The writable memory component is adapted to store at least a single image frame. The systems and methods allow to reduce the power consumption based on reduction of the number of memory accesses. In another inventive aspect, a method and system is provided wherein updating of pixel information is performed content dependent. In still another inventive aspect, a system is provided wherein the display panel is connected to the processing unit using a separate, dedicated display bus.

Abstract: A video and graphics system includes a video decoding system for processing compressed video data. The compressed video data includes MPEG-2 video data containing SDTV video data or HDTV video data. The video decoding system includes a video decoder for processing the compressed video data to generate displayable video, and a memory controller for transferring the compressed video data to and from an external memory. The video decoder requests to the memory controller to transfer the compressed video data using one of predetermined addressing patterns. The predetermined addressing patterns allow for more efficient transferring of the compressed video data to and from the external memory when compared to sequentially transferring a fixed number of data bytes starting at a fixed address. The use of the predetermined addressing patterns results in reading the compressed video data from the external memory in a predetermined order in a less number of clock cycles.

Abstract: It comprises a main CPU, a main memory for storing the programs, display data and other data, a data processing circuit for performing a processing to convert the display data in the main memory to the data format for the display, a display memory section for storing the converted display data, an output processing circuit for performing a processing to output the display data on the screen, a DMA for performing a data access to the main memory, a program memory, a data memory, a display processor for interpreting the commands/data described in the program memory and the data memory and transferring the display data according thereto, and a sync signal generating circuit.

Abstract: A document processing operation system includes: an image display holding medium that includes a display section for holding display of a document image rewritably and in a substantially no-power supply state; and a processing unit that processes document data in response to operation information of a user for the medium, wherein the medium further includes: an operation device that accepts operation input from a user; and an information providing section that provides operation information entered on the operation device to the processing unit, wherein the processing unit includes: a data processing section that performs processing preset in response to the operation information for data of a document whose display is held on the medium; a holding section that holds the operation information acquired from the medium; and a start command section that causes the data processing section to start processing in response to the held operation information.

Abstract: Disclosed is a system and method for processing graphic operations on a plurality of data structures of an image with a graphics processing unit and memory. The disclosed techniques of the system and method create an accumulation buffer of the data structures for accumulating changes to the data structures. A separate buffer is then created from at least a portion of the data structures of the accumulation buffer. The disclosed techniques read the data structures from the separate buffer with the graphics processing unit. The graphics processing unit operates on the data structures read from the separate buffer with the operation. Then, the disclosed techniques write the results of the operation onto the portion of the accumulation buffer corresponding to the separate buffer.

Abstract: A method, data processing system, and computer instructions for simulating direct frame buffer access. A request for access to a frame buffer memory is received from an application. A portion of system memory is allocated for use as the frame buffer memory in response to receiving the request. A pointer to the portion of system memory is returned to the application. The application writes data to the portion of system memory, treating the portion of system memory like the frame buffer memory.

Abstract: Compressed graphic image data files, such as Compressed ARC (Arc-second Raster Chart/map) Digitized Raster Graphics (CADRG) map files for a region of interest, are stored in blocks of memory (nodes) preferably arranged as a linked list. Portions of files containing data for an area of interest including an image of interest are decompressed before the data are sent to a frame buffer for display. Nodes that do not contain requested data are flagged as unused, but not deallocated, making the data in such nodes available for use or replacement.

Abstract: The present invention is directed to an image processing apparatus for achieving an increase of capacity and an improvement in processing capability without causing a drop in performance and an increase in cost. The apparatus includes built-in memory, external memory, and a memory interface (I/F) circuit. The external memory is divided into a plurality of blocks that store predetermined data. The built in memory is accommodated on the semiconductor chip and is divided into blocks having the same capacity as a divided block of the external memory. The memory I/F circuit displaces data stored in the built-in memory with data stored in the external memory based on a displacement command.

Abstract: An improved raster engine adapted to render video data from a frame buffer to one of a plurality of disparate displays is disclosed which comprises apparatus for detecting one or more video underflow conditions. The raster engine includes a first in first out (FIFO) memory, which obtains video data from a frame buffer and provides video data to a video pipeline, along with input and output counters associated with the FIFO memory. A control logic system is associated with the FIFO memory and adapted to provide an underflow indication according to the input and output counter values. A method for detecting video underflow in a video controller raster engine is also disclosed.

Abstract: The invention provides an image display apparatus that efficiently adjusts a video display even when a change takes place in an input signal. The image display apparatus includes a video input device that receives a video signal, a video display that displays an optical image based on an input signal S1 from the video input device, and a video signal adjusting device that adjusts the display setting of the video display based on a signal mode of the input signal S1. The image display apparatus further includes a determining device that causes the video display adjusting device to adjust the display setting of the video display. The determining device includes an apparatus startup detector unit that detects whether a startup of the image display apparatus creates a change in the input signal, and a signal change detector unit that detects the change in the input signal. The determining device determines whether to cause the video display adjusting device to adjust the display setting only when it is needed.

Abstract: Method and apparatus are provided for job performance support. The apparatus for providing on-the-job performance support of a procedure comprises a memory configured to store performance support data. The performance support data comprises action data, resource data, reference data, procedure data, and assembly data. The apparatus further comprises a processor coupled to the memory and a display coupled to the processor. The processor is configured to access the memory, retrieve the performance support data, and assemble the performance support data to form the procedure. The display is configured to produce a Graphical User Interface (GUI) that visually presents the procedure assembled by the processor. The display is further configured to produce the GUI that visually presents an administrator interface.

Abstract: A system and method are provided for drawing graphics, such as to display a user interface on a display of a mobile device. A graphics stack is used to store pre-computed coordinate values to improve performance for drawing graphics, such as to display a user interface on a display of a mobile device.

Abstract: A graphics system including a custom graphics and audio processor produces exciting 2D and 3D graphics and surround sound. The system includes a graphics and audio processor including a 3D graphics pipeline and an audio digital signal processor. Techniques for efficiently buffering graphics data between a producer and a consumer within a low-cost graphics systems such as a 3D home video game overcome the problem that a small-sized FIFO buffer in the graphics hardware may not adequately load balance a producer and consumer—causing the producer to stall when the consumer renders bit primitives. One aspect of the invention solves this invention by allocating part of main memory to provide a variable number of variable sized graphics commands buffers. Applications can specify the number of buffers and the size of each. All writes to the graphics FIFO can be routed a buffer in main memory. The producer and consumer independently maintain their own read and write pointers, decoupling the producer from the consumer.

Abstract: A technique for generating a physical representation of networked components makes use of data stored within the individual components, which may be polled by a monitoring station. The data includes identification of the respective component, and data representative of a physical disposition of the component in the system. Based upon the data, the monitoring station builds a physical representation of the system, including approximately accurate physical representations of the individual components with identifying labels, facilitating monitoring and servicing of the components.

Abstract: Mechanisms for a messaging application program (e.g., an e-mail or instant messaging application program) to render information on a display. A server may download different template sets (or the client may otherwise access such template sets) to different client computing systems. Each template is usable by the messaging application program at the respective client to render a display screen in accordance with the display capabilities and/or the user display preferences and settings of the respective client computing system. The messaging application program is allowed to stay the same, while variances due to different display capabilities and/or user display preferences and settings are accommodated by the different template sets.

Abstract: A system for storing, communicating, and displaying image or graphic data over a network. The system includes a client that is connectable to a server via a network. The server is configured to store an image file having image data, where the structure of the image file preferably includes submatrices. The submatrices allow the system to render the images using an adaptive rendering technique.

Abstract: One embodiment of the present invention provides a system that facilitates redirecting the output of direct rendering graphics calls in a 3D window system. The system interposes a redirection library between an application and a direct rendering library in the 3D window system. This redirection library is a 3D foundation library that intercepts direct rendering calls. The redirection library routes the direct rendering calls to a display server. The display server renders the direct rendering calls into texture rather than rendering the direct rendering calls into a window on a screen of a display device. The system then displays the texture on a 3D shape through the display device.

Abstract: A display for sharing the display data channel is provided. The display shares the display data channel and thus the preexisting display data channel can be used as the interface for RS232 or I2C communication for performing the ISP or adjustment of the firmware. Hence, it can simplify the manufacturing tools, enhance the manufacturing efficiency, and allow the users to update the firmware by themselves.

Abstract: An image processing circuit comprising plural line buffers is provided. Each line buffer stores pixel data of plural pixels as line data. A first image processing part performs a first image processing task on original image data provided from the exterior by using the line data stored in at least one of the line buffers. A second image processing part performs a second image processing task on the processed image data from the first image processing part by using the line data stored in at least one of the line buffers. A line buffer selector selectively connects the first image processing part and the second image processing part to any number of line buffers. An output path selector selects one of an output path that skips the second image processing task and an output path that performs the second image processing task.

Abstract: Various methods, apparatuses, and systems are described in which subdivided polygons are derived from a first polygon. Bin assignments of subdivided polygons derived from a first polygon may be stored. One or more reference coordinate points associated with coordinates of the first polygon may be stored. One or more reference coordinate points associated with the coordinates of the first polygon on a subsequent frame may be compared to the stored one or more reference coordinate points from a previous frame. The bin assignments for the corresponding subdivided polygons for the subsequent frame may be reused if the results of the comparison are within a preset threshold quantity.

Abstract: The invention provides a data visualization system comprising a data value memory in which is maintained a finite set of data values; a retrieval component configured to retrieve a set of data values from the data value memory; a display component configured to display a representation of each of the set of the retrieved data values centered on respective data points; and a contour generator configured to generate and display a contoured representation around each data point, such that each data point is displayed as a local maximum. The invention further provides a data visualization system in which a display component is configured to display a graphical representation of a set of retrieved data values based at least partly on display parameters included in a database query expression. The invention also provides related methods and computer programs.

Abstract: A method and apparatus for supporting multiple displays per a drawing surface begins by receiving capability parameters regarding a first display of the multiple displays. The capability parameters include resolution, pixel depth, and/or refresh rate. Typically, the first display will be the primary display associated with a video graphics card. The processing continues by substituting selected display capabilities for the capability parameters of the first display. The selected display parameters are such that it exceeds the display capability parameters of each display, or monitor, coupled to the video graphics card. The processing continues by providing the selected display capabilities to an operating system. The operating system then stores the selected display capabilities in the display register associated with a particular video graphics card.

Abstract: A display driver, electro-optical device and electronic appliance are provided that make unnecessary processing that calculates positions in a RAM where display data is to be written according to a mounting state thereof. A display driver includes a mounting state setting register in which mounting state setting data showing a mounting state of the display driver is set, a RAM that stores display data, a row scanning flag generation circuit that generates a row scanning flag showing a scanning direction of row addresses based on the mounting state setting data, a row address decoder that decodes row addresses in accordance with the scanning direction designated by the row scanning flag, a column address decoder that decodes column addresses, a display address decoder that decodes display addresses, and a driving circuit that drives a display section based on display data read from the RAM in accordance with a decoding result of the display address decoder.

Abstract: A method for dividing a display into zones at system initialization for tracking which zones have any pixels revised so that, when the time comes to update the display, only the zones requiring revision (that is, those zones in which any pixel has been revised) are copied from shadow memory to the frame buffer for display on the display device. The memory for tracking these zones can be allocated at initialization and held since it is relatively small. Consequently, a significant performance gain may be achieved by avoiding the shortcomings of the existing methods in the art notwithstanding the fact that some “clean” pixels in each zone having even a single changed pixel are also rewritten to the frame buffer.

Abstract: Image data having a bit depth of m bits, where m is not a power of two, may be divided into two parts for storage. The first part is the n most significant bits, where n is a power of two. The second part is the k least significant bits, where k=m?n and k<n. For example, 10-bit data may be separated into 8-bit and 2-bit parts. The 8-bit data for a given image is placed in the bitstream as a contiguous block with the end of the data aligned with a memory boundary, such as a page boundary. The 2-bit data is collected into bytes that are placed in the bitstream as a contiguous block. The block of 2-bit data is placed in the bitstream preceding and contiguous with the block of 8-bit data. Padding may be provided to align the beginning of the image data with a memory boundary. The image data for multiple images may be placed in the bitstream contiguously for storage. 10-bit data for an alpha channel, if any, also may be split into 8-bit and 2-bit parts.

Abstract: Tracking and displaying of allocated messages in dynamic workload balancing systems in message driven transaction environments which involve distributing data processing transactions into messages and dynamically allocating each of the messages to different computer systems for performance, comprising enabling a user to request the performance of a data processing transaction, dynamically transforming via a server computer any requested transactions into messages free of user input and then allocating the messages to different computer systems. The system has user interactive displays for displaying the allocated messages and associated computer systems when required by the user so that he may track the messages.

Abstract: Apparatuses and methods for detecting position conflicts during fragment processing are described. Prior to executing a program on a fragment, a conflict detection unit, within a fragment processor checks if there is a position conflict indicating a RAW (read after write) hazard may exist. A RAW hazard exists when there is a pending write to a destination location that source data will be read from during execution of the program. When the fragment enters a processing pipeline, each destination location that may be written during the processing of the fragment is entered in conflict detection unit. During processing, the conflict detection unit is updated when a pending write to a destination location is completed.

Abstract: An apparatus and method for performing an insert-extract operation on packed data using computer-implemented steps is described. In one embodiment, a first data operand having a data element is accessed. A second packed data operand having at least two data elements is then accessed. The data element in the first data operand is inserted into any destination field of a destination register, or alternatively, a data element is extracted from any field of the source register.

Abstract: A system and method for using a switch to route graphics data and data for a peripheral data on an interconnect is disclosed. A graphics card includes a switch that is communicatively coupled to a computer system. The switch receives graphics data and data for a peripheral device from the computer system via a first link. The switch routes the data for a peripheral device to a console via a second link and routes the graphics data to a graphics controller via a third link. The graphics controller forms a part of the graphics card and is communicatively coupled to the switch via the third link, wherein the graphics controller generates a video signal to drive a video display.

Abstract: A method of deferring evaluation of a transform, in accordance with one embodiment of the present invention, includes buffering a plurality of vertex data. The method also includes receiving a draw command, accessing a given vertex data corresponding to the draw command and an associated transform indicator bit. The given vertex data is transformed if the associated indicator bit is cleared. After performing the transform, the vertex data is overwritten with the transformed vertex data and the associated transform indicator bit is set.

Abstract: A system that can store electronic program guide information using 3D graphics is disclosed. In a particular embodiment, a data filter and a text-to-image converter are used for converting filtered data into a set of digital images that are defined as a set of texture maps. In order to apply those texture maps, a memory analyzer analyzes the set-top box layout and indicates available memory types. The memory analyzer controls a memory distributor for distributing texture maps into the appropriate types of memory.

Abstract: An image processing apparatus includes an auxiliary storage device 19 stored first data of a given object image higher in LOD level, a main memory 11 stored second data of the given object image lower in the LOD level than the first data, a CPU 10, and a GPU 18. The CPU 10 calculates an apparent speed of the object image on a screen, and determines data to be used in the geometry processing of the object image to one of the first data and the second data in accordance with the apparent speed. The GPU 18 takes in the first data (or the second data) from the auxiliary storage device 19 (or the main memory 11) to conduct the rendering process in the case where the geometry processing is conducted by using the first data (or the second data).

Abstract: In order to perform control to optimize a display area during the execution of application software, the cellular phone 1 according to the present invention communicates with an application software distribution apparatus for distributing application software and is characterized by comprising a display unit 5 that includes a display screen 51 and serves to display information on the display screen 51; a wireless unit 7 for receiving, from the application software distribution apparatus, application software, and attribute data that indicates an assumed display area that is to be used as a display area during execution of the application software; and a control unit 2 for controlling the display area of the application software in the display screen 51 of the display 5 on the basis of the attribute data received by the wireless unit 7 and displayable area data that indicates the displayable area of the display screen 51.

Abstract: A pixel load instruction for a programmable graphics processor. The pixel load instruction may be used during processing of graphics data to load graphics data from a writable output buffer into a local storage element. Using the pixel load instruction may ensure that the graphics data loaded is current, i.e., any pending writes to the location storing the graphics data are completed prior to loading the graphics data. Furthermore, the pixel load instruction may be enabled and disabled for one or more writable output buffers by setting or clearing bits in a pixel load enable register.

Abstract: A pixel operable within a photographing device includes a light receiving portion for generating an electric signal corresponding to an intensity of received light, an amplifying portion for amplifying an output signal of the light receiving portion, a number of storing portions for storing, as a current signal, an electric signal amplified by the amplifying portion, a load portion for converting current outputs of the number of storing portions into voltages, a bias portion for supplying an offset current to an input of the load portion, and a calculating portion for calculating an output of the load portion, wherein a number of the pixels are arranged in a matrix. The storing portions and the photographing device are disposed on the same circuit, thereby expediting pixel processing. Additionally, with a bias, the output becomes stable.

Abstract: In rendering a page description on a rendering system, a method comprises the step of receiving objects and generating one or more sets of render instructions. For each received object it is first determined whether by adding the corresponding render instructions of a current received object to a current set of render instructions the resources of the rendering system will be exceeded. If the resources would be exceeded then a new set of render instructions are created, render instructions are added thereto to draw the current set of render instructions as a background image, and then the corresponding render instructions of the current received object are added to the new set. On the other hand, if the resources would not be exceeded then the corresponding render instructions of the current received object are added to the current set. Finally, the method renders the one or more sets of rendering instructions.

Abstract: The invention concerns an image information apparatus that stores a plurality of image information corresponding to a plurality of images. The apparatus includes a receiving section to receive the plurality of image information, an ID information reading section to read the ID information corresponding to the image information, a memory section to store the plurality of image information and the ID information read by the ID information reading section relatively, and an ID distinction section that outputs an ID distinction-signal when detecting that the second ID information does not coincide with the first ID information. The memory section stores a plurality of the image information corresponding to the first ID information, before the second ID information is received, when the memory section receives the ID distinction-signal outputted by the ID distinction section.

Abstract: An image processing apparatus capable of performing a refresh operation without causing a drop in performance, an increase in cost, or damage to the apparatus. The apparatus further being capable of achieving a reduction in power consumption, and being provided with a memory I/F circuit able to not only refresh, for example, four DRAM modules simultaneously, but also capable of refreshing two DRAM modules at a same timing, then refreshing the remaining two DRAM modules simultaneously at a next timing, or refreshing the four DRAM modules one by one in order based on given refresh control data, and controlling the timing of the refresh operation for each divided DRAM module.

Abstract: There is disclosed a color liquid crystal display (LCD) device capable of displaying color images in response to direct entry of input data and/or instructions through operation of an associated coordinate pointing tool. Typically, this tool is a pen-like input device known as the “input pen” for use in determining the individual position for color display on the screen of a built-in LCD panel. A coordinate detector operates to recognize the position as designated by the input pen, generating and issuing an output signal indicative of the corresponding coordinate data. A color designator circuit designates a color as presently selected for color display. A memory device stores therein color data representative of the color designated. A memory controller is responsive to receipt of an address issued from the selected coordinate data for controlling the color data to be written into and read out of the memory.

Abstract: Overlay buffering scheme for multi-channel data in which one memory buffer content is overlayed over another as memory locations of an input buffer are freed when data is output from the input buffer. By overlaying the buffer content, only one input buffer is used, reducing the needed memory by half.

Abstract: Disclosed is a memory access control apparatus capable of writing image data in an external memory or reading the image data. The memory access control apparatus comprises a memory access control unit for storing image data in a memory by a two-dimensional array according to values of a bank, a row, and a column inside the memory where the image data is to be stored calculated on the basis of coordinate values of the image data constituting one image frame and predetermined data.

Abstract: An apparatus and method for displaying a multimedia screen in a mobile terminal. A first memory selectively stores multimedia image data received at a service request of the mobile terminal or text data and background screen image data provided for a display service of the mobile terminal. A second memory stores the text data and the background screen image data. An image output processor reads data from the first memory and the second memory, and provides the read data to a display unit of the mobile terminal.

Abstract: Apparatuses and methods for detecting position conflicts during fragment processing are described. Prior to executing a program on a fragment, a conflict detection unit, within a fragment processor checks if there is a position conflict indicating a RAW (read after write) hazard may exist. A RAW hazard exists when there is a pending write to a destination location that source data will be read from during execution of the program. When the fragment enters a processing pipeline, each destination location that may be written during the processing of the fragment is entered in conflict detection unit. During processing, the conflict detection unit is updated when a pending write to a destination location is completed.

Abstract: A system for processing graphics data. The system comprises a local memory for storing a first vertex array. The system further comprises a host memory for storing a second vertex array. A page table is configured to store page table entries related to the second vertex array, the page table entries including information indicating pages that have changed from the first vertex array to a second vertex array. A write watch module is coupled to the page table. The write watch module is configured to cause the first vertex array to be updated with changed pages.

Abstract: A system and a method for transcoding multiple media channels are provided. The system includes a first processor to parse a media data stream having one or more media data channels and a vector processor to decompress, scale, and then compress the parsed media channel. A parsed media data channel, in one embodiment, is accessed using a bit manipulator and packetized into decoder instruction packets and transmitted to the vector processor using a sequencer. The vector processor decompresses the decoder instruction pacets, scales a macroblock generated from the packets, and then compresses the scaled macroblock. As a result, the scaled and compressed output has less data associated with the media channel, allowing for faster and/or more efficient storage or transmission. A reduced sized scale buffer is associated with another disclosed embodiment.

Abstract: Caching fonts on a display computer may be performed in order to reduce network bandwidth utilization and/or to improve CPU usage. Text commands may be recorded when they are executed to create a portion of a graphics image. These text commands may be used to update a data structure with information, and this data structure may be used to more efficiently transmit the text portions of the graphics image. A caching mechanism may be used wherein the font utilized by the text command is stored in the cache if a compatible font does not already exist in the cache. Once the font has been cached, subsequent text commands utilizing the font may be executed with a dramatic reduction in network bandwidth.

Abstract: A method for an image reducing processing circuit includes the memory architecture of two FIFO units. The method includes the following steps of: providing an input processing unit receiving original image data and delivering the image data; providing a horizontal direction image processing unit receiving the image data from the input processing unit; providing a first step FIFO unit receiving the image data from the horizontal direction image processing unit to read and write the image data on the same access frequency; providing a vertical direction image processing unit receiving the image data from the first step FIFO unit; providing a second step FIFO unit receiving the image data from the vertical direction image processing unit and implementing the readout/writing of the image data on two access frequency, and providing an output processing unit receiving the image data from the second step FIFO unit and outputting reduced image.

Abstract: Methods and apparatuses for dynamic virtual frame buffer management. At least one embodiment of the present invention dynamically enables or disables the use of a virtual frame buffer, which is not under control of graphics hardware of a data processing system, without restarting the graphical user interface system (e.g., the window system) of the data processing system. For example, in response to the addition or removing of a frame buffer that is under control of a graphics controller (e.g., due to the activation or deactivation of the graphics controller, or the hot plug-in or hot disconnection of the graphics controller), the virtual frame buffer is disabled or enabled respectively.

Abstract: A display is capable of displaying images in response to differently formatted signals. The display includes a switch that enables a user to select among a plurality of signal formats. The switch has a first setting that corresponds to a first of the plurality of signal formats and a second setting that corresponds to a second of the plurality of signal formats. The display also includes a memory module that receives requests from a channel and transmits a response associated with the setting of said switch.