Storage Accessing And Control Patents (Class 711/100)
  • Patent number: 11182285
    Abstract: A memory system may include: a nonvolatile memory device; a volatile memory suitable for storing write data; and a controller suitable for: allocating a normal write buffer in the volatile memory when normal write data are inputted, allocating a first write buffer in the volatile memory when first write data, which are grouped into a first transaction and first total size information on a total size of the first transaction, are inputted, allocating a second write buffer in the volatile memory when second write data, which are grouped into a second transaction and second total size information on a total size of the second transaction, are inputted, managing sizes of the first and second write buffers to change them in response to the first and second total size information, respectively, and managing a size of the normal write buffer to fix it to a set size.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: November 23, 2021
    Assignee: SK hynix Inc.
    Inventor: Hae-Gi Choi
  • Patent number: 11176061
    Abstract: Memory access circuitry (26) enforces ownership rights for memory regions. A given memory region is associated with an owner realm specified from multiple realms, each realm corresponding to a portion of at least one software process executed by processing circuitry (8). The owner realm has a right to exclude other realms from accessing data within the memory region. Realm management circuitry (20) accesses a realm management tree storing realm management data for at least two realms in a tree structure having a variable number of levels. The realms are identified using a realm identifier which has a variable number of variable length bit portions each providing an index into a given level of the realm management tree.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: November 16, 2021
    Assignee: ARM Limited
    Inventors: Gareth Rhys Stockwell, Jason Parker, Matthew Lucien Evans, Martin Weidmann
  • Patent number: 11169818
    Abstract: Systems and methods that may be implemented in a Unified Extensible Firmware Interface (UEFI) pre-boot environment time to dynamically locate and load bootable images stored in one or more operating system (OS) partitions on a system storage device/s (e.g., HDD, SSD) that is formatted with an advanced filesystem (e.g., such as NTFS, EXT3, etc.). An OS-based filesystem-independent method may be provided to access OS filesystem data during UEFI pre-boot time. Individual selected boot images stored across multiple OS filesystem partitions may be located and loaded to boot from UEFI pre-boot.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: November 9, 2021
    Assignee: Dell Products L.P.
    Inventors: Shekar Babu Suryanarayana, Ibrahim Sayyed
  • Patent number: 11171854
    Abstract: Proposed are concepts for predicting workload of an application. Resource usage of a first application is monitored to obtain resource usage data associated with the first application. A workload signature for the first application is generated based on the obtained resource usage data, wherein the workload signature comprises information relating to static and time variant resource usage of the first application. Resource usage of a second application is predicted based on the workload signature of the first application.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: November 9, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Henry P. Nash
  • Patent number: 11163717
    Abstract: An apparatus is provided that includes a set of registers, and an interface of a computing block. The computing block includes one of a physical layer block or a media access control layer block. The interface includes one or more pins to transmit asynchronous signals, one or more pins to receive asynchronous signals, and a set of pins to communicate particular signals to access the set of registers, where a set of control and status signals of a defined interface are mapped to respective bits of the set of registers.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: November 2, 2021
    Assignee: Intel Corporation
    Inventors: Michelle Jen, Dan Froelich, Debendra Das Sharma, Bruce Tennant, Quinn Devine, Su Wei Lim
  • Patent number: 11157520
    Abstract: A dataset's uniqueness level may be calculated by analyzing a dataset to determine a uniqueness level. In cases where the uniqueness level may be too low for a particular purpose, meaning when the dataset may not provide enough anonymity, the dataset may be adjusted by recomputing the dataset with different resolutions of spatial data, temporal data, content data, and relationship data. By adjusting the resolution or accuracy of the data elements, the uniqueness level may thereby be adjusted. An error calculation may be determined by comparing the adjusted dataset to the original data, and the error value may represent the consistency of the data to the original data. The uniqueness level may be used as an assurance level of anonymity, which may be advertised when a dataset is sold or transferred to a third party for analysis.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: October 26, 2021
    Assignee: DataSpark, Pte Ltd.
    Inventors: The Anh Dang, Amy Xuemei Shi-Nash
  • Patent number: 11157325
    Abstract: An illustrative embodiment disclosed herein is an apparatus including a processor having programmed instructions that identify a bucket identifier corresponding to a bucket. The bucket identifier includes a prefix. The processor has programmed instructions that determine that the prefix matches a predetermined prefix, assign an expiry duration to the bucket, and, after the expiry duration, delete the bucket identifier.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: October 26, 2021
    Assignee: Nutanix, Inc.
    Inventors: Manik Taneja, Dezhou Jiang, Ranjan Parthasarathy, Xingchi Jin
  • Patent number: 11144462
    Abstract: In one embodiment, a task control block (TCB) for allocating cache storage such as cache segments in a multi-track cache write operation may be enqueued in a wait queue for a relatively long wait period, the first time the task control block is used, and may be re-enqueued on the wait queue for a relatively short wait period, each time the task control block is used for allocating cache segments for subsequent cache writes of the remaining tracks of the multi-track cache write operation. As a result, time-out suspensions caused by throttling of host input-output operations to facilitate cache draining, may be reduced or eliminated. It is appreciated that wait classification of task control blocks in accordance with the present description may be applied to applications other than draining a cache. Other features and aspects may be realized, depending upon the particular application.
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: October 12, 2021
    Assignee: International Business Machines Corporation
    Inventors: Lokesh M. Gupta, Kevin J. Ash, Kyler A. Anderson, Matthew G. Borlick, Jared M. Minch
  • Patent number: 11120126
    Abstract: A system and method is provided for implementing platform security on a consumer electronic device having an open development platform. The device is of the type which includes an abstraction layer operable between device hardware and application software. A secured software agent is provided for embedding within the abstraction layer forming the operating system. The secured software agent is configured to limit access to the abstraction layer by either blocking loadable kernel modules from loading, blocking writing to the system call table or blocking requests to attach debug utilities to certified applications or kernel components.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: September 14, 2021
    Assignee: IRDETO B.V.
    Inventor: Ron Vandergeest
  • Patent number: 11120002
    Abstract: The present teaching relates to concurrent database operation. In one example, a plurality of requests which includes a scan request to obtain first data associated with a plurality of first keys stored in a database is received concurrently. A global version number is updated upon receipt of the scan request. The first data associated with the plurality of first keys is obtained based on the updated global version number. The first data is provided in response to the scan request.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: September 14, 2021
    Assignee: Verizon Media Inc.
    Inventors: Edward Bortnikov, Anastasia Braginsky, Eshcar Hillel, Guy Gueta, Dmitry Basin, Moshe Sulamy
  • Patent number: 11113262
    Abstract: Implementations of the present disclosure include associating a first transaction executed within a database system with a first transaction control block (TCB) index, setting a status of the first transaction to active and a lock status of the first transaction to holding in response to a first set of locks being established for the first transaction, the first set of locks including one or more locks that each inhibit access to a respective resource within the database system, providing a lock table that records, for a set of locks within the database system, a set of lock owners including one or more transactions identified based on respective TCB indexes and a wait queue, and determining that the first transaction has completed, and in response setting the status of the first transaction to indicate completion of the transaction and the lock status of the first transaction to released.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: September 7, 2021
    Assignee: SAP SE
    Inventors: Changgyoo Park, Byunghoon Kim
  • Patent number: 11113699
    Abstract: An identity system for the Internet of Things (IOT) that enables users and machines to identify, authenticate and interact with products and collectibles without relying on a third-party-controlled authentication service. The system includes wireless tamperproof tags coupled to products and an open registry database where a chain of ownership of the items is able to be stored. The open registry enables public access to the item identity and data combined with item registration anonymity.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: September 7, 2021
    Assignee: Chronicled, Inc.
    Inventors: Samantha Radocchia, David Aho, Ryan Orr, Maurizio Greco
  • Patent number: 11115363
    Abstract: The present disclosure relates to systems, non-transitory computer-readable media, and methods for dynamically controlling ephemeral messaging threads and ephemeral message duration settings across computing devices while improving security by maintaining end-to-end encryption. In particular, in one or more embodiments, the disclosed systems can transmit encrypted ephemeral messages, including ephemeral message duration settings and ephemeral setting timestamps. The disclosed systems can decrypt received messages on receiving client devices and dynamically apply ephemeral message duration settings to different message threads. For example, the disclosed systems can modify existing duration settings at a receiving client device to match a received ephemeral message duration setting based on determining that the received ephemeral setting timestamp predates an existing setting timestamp.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: September 7, 2021
    Assignee: WHATSAPP LLC
    Inventors: Santiago Pina Ros, Jimmy Enrico Jacques Holzer, Shalini Sah, Elton Kyin-Fong Leong, Dafeng Ou, Christopher Luc, Nurzhan Bakibayev, Zafir Khan
  • Patent number: 11106465
    Abstract: Vector add-with-carry instructions are described which use some elements of a destination vector register, or corresponding fields of a predicate register, to provide the carry information corresponding to results of an add-with-carry operation. This is useful for accelerating computations involving multiplications of long integer values.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: August 31, 2021
    Assignee: Arm Limited
    Inventors: Mbou Eyole, Nigel John Stephens, Neil Burgess, Grigorios Magklis
  • Patent number: 11099740
    Abstract: Techniques manage a storage device. Such techniques involve: in response to receiving an I/O request for a storage device comprising a plurality of disks, determining, from the plurality of disks, at least one disk related to the I/O request; allocating, to each of the at least one disk, at least one access credit for completing the I/O request from total access credits of the disk, wherein the total access credits are associated with at least one of a type of the disk, a type of the I/O request and performance of the disk; and in response to respective access credits being allocated to the at least one disk, performing access requested by the I/O request to each of the at least one disk. Such techniques can effectively improve the overall access performance of the storage device.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: August 24, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Baote Zhuo, Jian Gao, Jibing Dong, Jianbin Kang, Geng Han
  • Patent number: 11099980
    Abstract: One embodiment provides a method comprising maintaining, on a storage unit, mapping data between a first set of logical addresses (e.g., logical block addresses or LBAs) viewed by a host and a first set of physical addresses (e.g., physical block addresses or PBAs) and a second set of physical addresses of the storage unit. A first logical address (e.g., LBA) of the first set of logical addresses corresponds to a first physical address (e.g., PBA) of the first set of physical addresses that maintains current data for the first logical address. The first logical address further corresponds to a second physical address (e.g., PBA) of the second set of physical addresses that maintains prior data for the first logical address. The method further comprises receiving, at the storage unit, a command from the host to perform a multi-device operation involving the first logical address. The operation is performed atomically.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: August 24, 2021
    Assignee: International Business Machines Corporation
    Inventors: Steven R. Hetzler, Robert M. Rees
  • Patent number: 11099990
    Abstract: A system and method for efficiently forwarding cache misses to another level of the cache hierarchy. Logic in a cache controller receives a first non-cacheable load miss request and stores it in a miss queue. When the logic determines the target address of the first load miss request is within a target address range of an older pending second load miss request stored in the miss queue with an open merge window, the logic merges the two requests into a single merged miss request. Additional requests may be similarly merged. The logic issues the merged miss requests based on determining the merge window has closed. The logic further prevents any other load miss requests, which were not previously merged in the merged miss request before it was issued, from obtaining a copy of data from the returned fill data. Such prevention in a non-coherent memory computing system supports memory ordering.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: August 24, 2021
    Assignee: Apple Inc.
    Inventors: Gideon N. Levinsky, Brian R. Mestan, Deepak Limaye, Mridul Agarwal
  • Patent number: 11099948
    Abstract: Caching storage segments (e.g., pages) loaded from a remote storage such that, during recovery, the cached loaded storage segments may be at least partially recovered without reloading the storage segments from the remote storage. During normal operation of a computing system, storage segments are loaded from remote storage into local memory of a computing system. At some point, either due to eviction of the storage segment due to aging out of the storage segment, or due to writing of the storage segment, it is determined to write at least some of the loaded storage segments into local persistent storage. In conjunction with this, the corresponding storage segment is written to a respective storage address of the local persistent storage. Also, a correlation between an identifier of the storage segment and the respective address in the persistent storage is recorded in a persistent data structure.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: August 24, 2021
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Cristian Diaconu, Vikram Wakade, Naveen Prakash
  • Patent number: 11093105
    Abstract: Systems and methods are provided for controlling playback of media content items on a media playback device. A graphical user interface displays media playback controls including an automatic playback switch. The switch is configured to enable or disable automatic playback of an autoplay queue of media content items. An initial queue of media content is selected for playback on the media playback device. When automatic playback is enabled, the system automatically generates a queue of media that is related to the initial queue and initiates playback on the media playback device after the initial queue concludes. Automatic playback options can also include repeating the initial queue or a single track within the initial queue.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: August 17, 2021
    Assignee: Spotify AB
    Inventors: Daniel Herzog, Glenn James Gentzke, Jeffrey Paul Baxter, Kylan McBride, Mark Kizelshteyn, Thomas Gayno
  • Patent number: 11086819
    Abstract: Disclosed are examples of systems, apparatus, methods and computer program products for deleting data of an object within a multi-tenant database. Described is a mechanism for performing operations such as an efficient delete operation by introducing a new delete operation (or method) that is configured to allow a data structure such as an object to identify one or more records to be deleted. In order to ensure that the operation is efficient, the mechanism may determine characteristics of a data store and determine whether the information provided within the data structure provides an efficient identification of the data to be deleted. Upon a successful validation, an initial delete request may be translated to an appropriate delete operation for the underlying database.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: August 10, 2021
    Assignee: salesforce.com, inc.
    Inventors: Jan Asita Fernando, Cody Marcel, Sahil Ramrakhyani, Samarpan Jain, Brian Esserlieu, James Ferguson, Saikiran Perumala, Charles Fineman, Jay Hurst, Seshank Kalvala
  • Patent number: 11068294
    Abstract: A method is discussed for balancing processing loads to at least a first and a second VM instances associated with the same processing circuitry. Information about first and second applications respectively running on the first and second VM instances is obtained. Incoming data corresponding to a first and second pluralities of jobs to be performed respectively by the first and second VM instances is received. Based on the obtained information and on the received data, a first number of the first plurality of jobs which the first VM instance is allowed to perform is determined by means of the processing circuitry, and a second number of the second plurality of jobs which the second VM instance is allowed to perform is determined by means of the processing circuitry. The first VM instance is instructed to release the processing circuitry after having performed the determined first number of jobs to allow the second VM instance to use the processing circuitry for performing the second number of jobs.
    Type: Grant
    Filed: November 26, 2015
    Date of Patent: July 20, 2021
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Daniel Turull, Lars Westberg
  • Patent number: 11068394
    Abstract: Provided is a neural network system for processing data transferred from an external memory. The neural network system includes an internal memory storing input data transferred from the external memory, an operator performing a multidimensional matrix operation by using the input data of the internal memory and transferring a result of the multidimensional array operation as output data to the internal memory, and a data moving controller controlling an exchange of the input data or the output data between the external memory and the internal memory. The data moving controller reorders a dimension order with respect to an access address of the external memory to generate an access address of the internal memory, for the multidimensional matrix operation.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: July 20, 2021
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jeongmin Yang, Young-Su Kwon
  • Patent number: 11068351
    Abstract: Switching from primary to backup data storage by preparing a backup copy of multiple data sets, where, prior to the preparing, the backup copy is updated in accordance with a backup protocol specifying synchronously updating the backup copy to reflect changes made to one type of data stored in a primary copy of the data sets, and asynchronously updating the backup copy to reflect changes made to another type of data stored in the primary copy, and where the preparing includes identifying any inconsistency in any interdependent data in the data sets of the backup copy in accordance with a predefined schema of interdependent data in the data sets, and correcting any identified inconsistency in the data sets of the backup copy in accordance with a predefined inconsistency correction protocol, and causing the backup copy to be used in place of the primary copy for directly servicing data transactions.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: July 20, 2021
    Assignee: International Business Machines Corporation
    Inventors: Dean Har'el Lorenz, Roie Melamed, Alexey Roytman, Aidan Shribman
  • Patent number: 11068191
    Abstract: In one aspect, adaptive replication modes in a storage system are provided. An aspect includes during an active replication session in which a first type of replication is performed at the storage system, monitoring write input/output (IO) operations, collecting data from the write IO operations, and determining, from the collected data, write IO latency. Upon determining that a threshold value has been met from the write IO latency, where the threshold value is defined for the first type of replication, an aspect includes automatically switching from the first type of replication to a second type of replication. The second type of replication is configured to compensate for operational deficiencies detected in response to the write IO latency.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: July 20, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Xiangping Chen, Ying Hu
  • Patent number: 11068384
    Abstract: Methods and systems are presented for testing software applications in a production-like environment that simulates real-world failures of production environments. A production environment has production applications and databases configured to process user requests from users for conducting transactions with a service provider. A testing system provides an intermediate interface that enables a software application operating in the test environment to access at least one of a production application or a production database. The intermediate interface can be configured based on different failure configurations to simulate production component failures in the production environment. Failure injection and randomized failure modes can be employed, including for network-related failures (latency, dropped packets, connections, etc.) that might occur in the production environment.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: July 20, 2021
    Assignee: PayPal, Inc.
    Inventors: Pengshan Zhang, Jun Zhang, Xiaohan Yun, Xin Chen
  • Patent number: 11061566
    Abstract: A computing device includes a first processor; a second processor; a network interface communicably coupling the first and second processors to a network; an interface bus communicably coupling the first processor to the second processor; a first interface communicably coupling the second processor to the interface bus; a second interface communicably coupling the second processor to the interface bus, the second interface being separate from the first interface, wherein the second interface is configured to provide the second processor with management functionality over one or more hardware components of the computing device; and storage means communicably coupled to the second processor, wherein the second processor regulates access of the first processor to the storage means.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: July 13, 2021
    Inventor: Keicy Chung
  • Patent number: 11055001
    Abstract: A system includes a memory and a processor coupled to the memory, where the processor is configured to perform various operations. The operations include receiving, in response to a first read input/output operation, a first location of a first data block. The operations also include executing the first read input/output operation at the first data block at the first location. The operations also include selecting a second location within a first search range for destaging a second data block based at least in part on the first location. The operations also include destaging the second data block at the second location upon a determination that a second read input/output operation is not currently executing or queued for execution.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: July 6, 2021
    Assignee: Seagate Technology LLC
    Inventors: Michael David Barrell, Zachary David Traut
  • Patent number: 11048580
    Abstract: Exemplary methods, apparatuses, and systems include a memory controller receiving a user payload to be written to a memory. The memory controller determines a plurality of locations within the memory within which the user payload will be written. After detecting the destination of the user payload, the memory controller detects, within a data structure, the presence of an identifier of a first location within a user data portion of the plurality of locations. The memory controller writes the user payload to the user data portion of the plurality of locations and, in response to detecting the presence of the identifier in the data structure, writes a copy of one or more bits in the user payload written to the first location to a spare data portion of the plurality of locations.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: June 29, 2021
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Samuel E. Bradshaw, Justin Eno, Sean Stephen Eilert, Sai Krishna Mylavarapu
  • Patent number: 11023150
    Abstract: A computer-implemented method, according to one embodiment, includes: maintaining a block switching metric for each block of memory in the storage system. A determination is made as to whether a first block in a first pool should be transferred to a second pool according to a block switching metric which corresponds to the first block. In response to determining that the first block in the first pool should be transferred to the second pool according to the block switching metric which corresponds to the first block, the first block is erased. The first block is then transferred from the first pool to a second RTU queue which corresponds to the second pool. A second block in the second pool is also erased and transferred from the second pool to a first RTU queue which corresponds to the first pool.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: June 1, 2021
    Assignee: International Business Machines Corporation
    Inventors: Roman Alexander Pletka, Aaron Daniel Fry, Timothy Fisher, Sasa Tomic, Nikolaos Papandreou, Nikolas Ioannou, Radu Ioan Stoica, Charalampos Pozidis, Andrew D. Walls
  • Patent number: 11016471
    Abstract: A method for semi-automated development data management for control devices includes saving a development data model in a central data store comprising a plurality of mutually related configuration data units, wherein the configuration data units each store control commands and/or configuration parameters. The method further includes providing a ruleset and identifying an initial configuration data unit, wherein it is possible, using the ruleset, to identify further configuration data units automatically on a basis of a relationship thereof with the initial configuration data unit. In addition, the method includes applying the provided ruleset to the development data model in order to identify a subset of configuration data units within the development data model and saving the identified subset.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: May 25, 2021
    Assignee: DSPACE DIGITAL SIGNAL PROCESSING AND CONTROL ENGINEERING GMBH
    Inventors: Dirk Stichling, Jobst Richert, Michael Beine, Ansgar Kuhlmann, Thomas Misch
  • Patent number: 11003616
    Abstract: In a computer comprising a plurality of integrated circuits (ICs), each IC may be connected to all other ICs via a respective point-to-point interconnect. A source IC divides the data to be transmitted to a destination IC for a transaction to generate multiple data cells so that each data cell includes a different portion of the data. The source IC transmits one of the data cells to the destination IC and remaining data cells to intermediate ICs, wherein an intermediate IC is an IC other than the source IC or the destination IC. The intermediate ICs forward the remaining data cells to the destination IC.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: May 11, 2021
    Assignee: Amazon Technologies, Inc
    Inventors: Guy Nakibly, Adi Habusha, Yaniv Shapira, Daniel Joseph Grey
  • Patent number: 10999353
    Abstract: A method comprises initiating a first application in a first one of a plurality of distributed processing nodes, and responsive to initiation of the first application, identifying a plurality of beacon entities to be contacted in conjunction with execution of at least a portion of the first application. The method also comprises, for each of at least a subset of the identified beacon entities, initiating an additional application in an additional one of the plurality of distributed processing nodes. The method further comprises aggregating processing results from the first and one or more additional processing nodes, and providing the aggregated processing results to a client. The plurality of distributed processing nodes may comprise a plurality of YARN clusters associated with respective data zones, with each of the clusters being configured to perform processing operations utilizing local data resources locally accessible within its corresponding data zone.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: May 4, 2021
    Assignee: EMC IP Holding Company LLC
    Inventor: Patricia Gomes Soares Florissi
  • Patent number: 10990581
    Abstract: Various systems and methods of tracking a size of a database change log are described herein. A system is disclosed herein, according to some embodiments. An indication of a plurality of change events that have occurred at the database is received. A new log segment is generated for the change log for the database based on the received indication including the plurality of change events. Metadata for an end log segment from the change log is retrieved to identify a cumulative size for the change log. A new cumulative size for the change log is determined based on a size of the new log segment and the identified cumulative size. The new log segment is stored to the change log as a new end log segment with metadata indicating the new cumulative size for the change log.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: April 27, 2021
    Assignee: Amazon Technologies, Inc.
    Inventor: Vaibhav Jain
  • Patent number: 10991414
    Abstract: A system and method for refreshing memory cells of a memory device includes storing each bit of a B-bit word in a different sub-array of a memory device. Each of the bits is associated with a bit position, and the memory device includes a plurality of sub-arrays. The system and method also include determining a refresh interval for a plurality of the bit positions based upon a relative importance of the plurality of the bit positions to a performance of a machine learning or signal processing task involving the B-bit word. The refresh interval is based upon a fidelity metric and a resource metric. The system and method further include refreshing the plurality of sub-arrays based upon the refresh interval determined for the plurality of bit positions, and dynamically updating the refresh interval for the plurality of bit positions upon receiving a new fidelity metric or a new resource metric.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: April 27, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Yongjune Kim, Won Ho Choi, Cyril Guyot, Yuval Cassuto
  • Patent number: 10983915
    Abstract: Systems, apparatuses, and methods for implementing flexible dictionary sharing techniques for caches are disclosed. A set-associative cache includes a dictionary for each data array set. When a cache line is to be allocated in the cache, a cache controller determines to which set a base index of the cache line address maps. Then, a selector unit determines which dictionary of a group of dictionaries stored by those sets neighboring this set would achieve the most compression for the cache line. This dictionary is then selected to compress the cache line. An offset is added to the base index of the cache line to generate a full index in order to map the cache line to the set corresponding to this chosen dictionary. The compressed cache line is stored in this set with the chosen dictionary, and the offset is stored in the corresponding tag array entry.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: April 20, 2021
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Alexander D. Breslow, John Kalamatianos
  • Patent number: 10977182
    Abstract: An offset can be determined based on a characteristic of a memory system associated with a system block. The system block corresponds to logical blocks. A first group of physical blocks of the memory system can be assigned to a group of the plurality of logical blocks of the system block. A second group of physical blocks of the memory system can be identified at a location that is based on the offset and the first group of physical blocks. Furthermore, the second group of physical blocks of the memory system can be assigned to another group of the plurality of logical blocks associated with the system block. Data can be stored by using the system block with the first group and second group of physical blocks.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: April 13, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Ashutosh Malshe, Karl D. Schuh
  • Patent number: 10963577
    Abstract: A computer system with multiple security levels, the system comprising a high-power processing device (130), a low-power processing device (110), and an interface unit (120) comprising functions for moving classified information between the high-power device (130) and the low-power device (110) according to formal rules for confidentiality and/or integrity. Additional security aspects, e.g. availability, may readily be accommodated. A method for implementing multiple levels of security along a number of independent security axes on the system is also disclosed.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: March 30, 2021
    Assignee: CUPP Computing AS
    Inventor: Omar Nathaniel Ely
  • Patent number: 10963402
    Abstract: An electronic device includes a queue with multiple sub-queues arranged in a logical hierarchy from a lowest sub-queue to a highest sub-queue, each sub-queue including a separate subset of a set of entries of the queue, and a separate age matrix for each sub-queue. The electronic device also includes a controller that stores items in entries in the lowest sub-queue until the lowest sub-queue is full and then stores items in successively next higher sub-queues in the hierarchy. The controller also removes an item that is ready for removal from an entry in the lowest sub-queue. The controller then shifts items in sub-queues in the hierarchy to fill the vacancy in the lowest sub-queue. For the shifting, the controller uses an age matrix associated with each sub-queue to determine an oldest item in that sub-queue and then moves the oldest item to a next lower sub-queue in the hierarchy.
    Type: Grant
    Filed: December 28, 2019
    Date of Patent: March 30, 2021
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Gregg Donley, Mark Silla
  • Patent number: 10956276
    Abstract: The system state recovery methods, systems and products disclosed herein enable an efficient means of recovering from a permanent site outage event in a distributed, block-based storage system. Embodiments teach using directory trees and journal updates for neighboring zones, which are still operational, as a means of recovering data for the site experiencing an outage. We further disclose load balancing techniques in order to improve efficiency of recovery. Load balancing is performed by selecting a leader zone and a group of non-leaders, which will comprise a set of recovery drivers. The systems within the set of recovery drivers are used to piece together lost data from the zone experiencing an outage. In embodiments, the systems, methods and products could be used with an Elastic Cloud Systemâ„¢.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: March 23, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Mikhail Danilov, Mikhail Borisov
  • Patent number: 10944807
    Abstract: Implementations are provided herein for organizing present and future reads from a tiered streaming data storage layer. Implementations allow for access to multi-tiered streaming data organized in different append-only segments, some of which may be related to each other. Streaming data can be read from fast local tier 1 storage, streaming data can be retrieved from fold tier 2 storage, and registrations can be made to read streaming data that has not yet been written to the storage layer.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: March 9, 2021
    Assignee: EMC IP Holding Company LLC
    Inventor: Andrei Paduroiu
  • Patent number: 10942843
    Abstract: A user definition of a memory shape can be received and a multidimensional, contiguous, physical portion of a memory array can be allocated according to the memory shape. The user definition of the memory shape can include a quantity of contiguous columns of the memory array, a quantity of contiguous rows of the memory array, and a major dimension of the memory shape. The major dimension can correspond to a dimension by which to initially stride data stored in the memory shape.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: March 9, 2021
    Assignee: Micron Technology, Inc.
    Inventors: John D. Leidel, Isom Crawford, Jr.
  • Patent number: 10938897
    Abstract: Extended group service changes are facilitated in a data storage system. Node devices of a data storage system are identified that are merging into a cluster of the node devices. In response to the identifying, respective merge locks are caused at a group of the node devices that are sending service updates.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: March 2, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Antony Richards, Ron Steinke, Suraj Raju
  • Patent number: 10936394
    Abstract: According to the embodiments, an external storage device switches to an interface controller for supporting only a read operation of nonvolatile memory when a shift condition for shifting to a read only mode is met. A host device switches to an interface driver for supporting only the read operation of the nonvolatile memory when determining to recognize as read only memory based on information acquired from the external storage device.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: March 2, 2021
    Assignee: Toshiba Memory Corporation
    Inventor: Daisuke Hashimoto
  • Patent number: 10939014
    Abstract: An image forming apparatus having a plurality of functions includes a storage unit including a storage area divided into a shared area to be used by a plurality of functions and exclusive areas each to be used by one function. In a case where writing into or reading from the storage unit is necessary in a course of PDL processing, a determination is made whether the shared area or a page description language (PDL) exclusive area is to be used.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: March 2, 2021
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kenta Matsui
  • Patent number: 10928998
    Abstract: Systems and methods are provided for configuring automatic playback settings on a media playback device. A graphical user interface displays automatic playback settings and receives selections of customized settings for automatic playback. The settings can include context granularity for automatic playback, limiting autoplay to when the media playback device is connected to a wireless network, and activating an audible notification when automatic playback of media content is beginning. An initial queue of media content is selected for playback on the media playback device. The system ascertains whether autoplay is enabled for a particular situation. If autoplay is enabled, the system automatically generates a queue of media that is related to the initial queue and initiates playback on the media playback device after the initial queue concludes.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: February 23, 2021
    Assignee: Spotify AB
    Inventors: Adam Chase, Andrew Greene, Christopher Barthle, Eric Lundin, Jeffrey Paul Baxter, Kevin Sweeney, Mark Kizelshteyn, Matthew Young-Wook Lim, Michelle Ackerman, Thomas Gayno, Kylan McBride, Joseph Levin
  • Patent number: 10922242
    Abstract: The present disclosure describes logical to physical tables that are configured to provide multiple sector support and provide for help in processing of data when a sector is mapped or unmapped. In the cases where sectors are unmapped, the present disclosure provides mechanisms to concurrently support multiple unique unmapped data patterns depending upon the specific type of unmapped sector.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: February 16, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Cory Lappi, William Jared Walker, Darin Edward Gerhart
  • Patent number: 10922287
    Abstract: Aspects of the subject technology relate to ways to determine the optimal storage of data structures in a hierarchy of memory types. In some aspects, a process of the technology can include steps for determining a latency cost for each of a plurality of fields in an object, identifying at least one field having a latency cost that exceeds a predetermined threshold, and determining whether to store the at least one field to a first memory device or a second memory device based on the latency cost. Systems and machine-readable media are also provided.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: February 16, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Johnu George, Amit Kumar Saha, Arun Saha, Debojyoti Dutta
  • Patent number: 10915448
    Abstract: Method and apparatus for managing data in a data storage system. A storage array controller device is coupled to a plurality of storage devices by an external data path, with the storage devices used for non-volatile memory (NVM) storage of user data from a host. A copy back operation is initiated by issuing a copy back transfer command that identifies a selected data set stored in a source device and a unique identifier (ID) value that identifies a destination device. A peer-to-peer connection is established over the external data path in response to the copy back transfer command so that the selected data set is transferred from the source device to the destination device while bypassing the storage array controller device. Normal data transfers can be carried out between the storage array controller and the respective source and destination devices during the copy back operation.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: February 9, 2021
    Assignee: Seagate Technology LLC
    Inventors: Gomathirajan Authoor Velayuthaperumal, Vijay Nanjunda Swamy
  • Patent number: 10915530
    Abstract: A computer-implemented method is provided for analysis of process data. The method comprises receiving an APE statement (Advanced Process Algebra Execution), wherein the APE statement defines a query of process instances from the storage means, and wherein the APE statement comprises at least one process operator, and executing the APE statement and reading the process instances according to the APE statement from the storage means, and providing the result of the query for further processing.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: February 9, 2021
    Assignee: CELONIS SE
    Inventors: Alexander Rinke, Martin Klenk, Bastian Nominacher
  • Patent number: 10908944
    Abstract: An apparatus (2) with multiple processing elements (4, 6, 8) has shared transactional processing resources (10, 50, 75) for supporting processing of transactions, which comprise operations performed speculatively following a transaction start event whose results are committed following a transaction end event. The transactional processing resources may have a significant overhead and sharing these between the processing elements helps reduce energy consumption and circuit area.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: February 2, 2021
    Assignee: ARM LIMITED
    Inventors: Stephan Diestelhorst, Matthew James Horsnell, Guy Larri