Abstract: Presented herein are methodologies for increasing effective throughput on a network. A method includes receiving a command request via a communication bus, the command request including a command ID, determining, based on the command ID, whether data in the command request is to be joined with data from other command requests having the same command ID, when it is determined, based on the command ID, that the data in the command request is to be joined with other data from other command requests having the same command ID, writing the data to a selected buffer in which the other data is already stored, and causing the data and the other data in the buffer to be sent as a payload of a single packet across a communications fabric.

Abstract: A set of test cases is obtained to evaluate the resource configuration of a computing environment. One or more test cases of the set of test cases are randomly selected and sent to one or more logical partitions of the computing environment. Execution of the one or more test cases on the one or more logical partitions is monitored. Based on the monitoring, verify whether processing associated with the one or more logical partitions is being performed at an acceptable level. Based on the verifying indicating that the processing is not at an acceptable level, initiating reconfiguring of resources of at least one logical partition of the one or more logical partitions.

Abstract: A high availability industrial automation controller used in a high availability industrial automation system is disclosed. The controller includes instructions executable by a processor to receive information about a lost redundancy in the industrial automation system, change a first redundancy state and a second redundancy state associated with a first task and a second task, respectively, upon receiving the information, perform the first task and the second task. The performing the first/second task can include identifying the first/second redundancy state has been changed, modifying operation of the first/second task in response to the first/second redundancy state being changed, and resetting the first/second redundancy state. Also disclosed is a method of operating the industrial automation controller.

Abstract: Provided are a computer program product, system, and method for determining modified tracks to destage during a cache scan. A cache scan is initiated at a time interval to determine modified tracks to destage from a cache to the first or second storage. A modified track is processed during the cache scan. The modified track is destaged to the first storage in response to the modified track stored in the first storage. A determination is made as to whether there was a host write to the second storage since a previous cache scan in response to the modified track stored in the second storage. The modified track is destaged to the second storage in response to determining that there was a host write to the second storage since the previous cache scan.

Abstract: According to one embodiment, a memory chip includes a memory cell array and first circuitry. The first circuitry executes a first operation of reading data from a target area of the memory cell array, using a parameter. After the first operation, the first circuitry executes a second operation of changing a set value of the parameter to read the data.

Abstract: Provided are a computer program product, system, and method for migrating jobs from a source server from which data is migrated to a target server to which the data is migrated. Mirrored data is copied from a source storage to a target storage. A determination is made of at least one eligible job of the jobs executing in the source server having execution characteristics indicating that the job is eligible for migration to the target server. The determined at least one eligible job is migrated to the target server to execute on the target server and perform operations with respect to the mirrored data in the target storage. The migrated eligible job is disabled at the source server.

Abstract: An apparatus includes a root port for coupling to a root complex, and a plurality of endpoint ports for coupling to endpoint devices, wherein each endpoint port is associated with a function number. A downstream buffer queues transaction layer packets (TLPs) received from the root port, wherein each TLP in the downstream buffer is directed to an endpoint port associated with the identified function number. An upstream buffer queues TLPs received from each endpoint port, and directs the queued TLPs to the root port. A method includes associating a function number with each endpoint port of a switch, wherein each endpoint port is adapted for coupling to an endpoint device. The method further includes receiving a first TLP from a root complex, identifying a function number within the first TLP, and directing the first TLP to an endpoint device through the endpoint port associated with the identified function number.

Abstract: Attributing consumed storage capacity among entities storing data in a storage array includes: identifying a data object stored in the storage array and shared by a plurality of entities, where the data object occupies an amount of storage capacity of the storage array; and attributing to each entity a fractional portion of the amount of storage capacity occupied by the data object.

Abstract: An image forming apparatus includes a printer, a controller configured to transmit a control signal to the printer to control the printer, a storage device including a volatile cache memory region and a non-volatile storage region, and a power control circuit. The power control circuit is configured to supply power from an external power source thereto to the printer and the controller, and supply auxiliary power stored therein when the power from the external power source is cut off. The controller includes a processor configured to, in case that the power from the external power source is cut off, instruct the storage device to transfer data from the volatile cache memory region to the non-volatile storage region, and then cause power supplied to the processor to be cut off.

Abstract: Disclosed are examples of systems, apparatus, methods and computer program products for deleting data of an object within a multi-tenant database. Described is a mechanism for performing operations such as an efficient delete operation by introducing a new delete operation (or method) that is configured to allow a data structure such as an object to identify one or more records to be deleted. In order to ensure that the operation is efficient, the mechanism may perform a validation of the values provided to the delete operation based on the type of data store used for storing the records. For example, the validation may ensure that the values provided to the method correspond to a composite primary key when records are stored in a non-relational data store. Upon a successful validation, an initial delete request may be translated to an appropriate delete operation for the underlying database.

Abstract: A processing device comprises a memory comprising memory blocks configured to store bit values, wherein bit values of an initial memory block are set to a target value; a memory controller configured to perform control of copying bit values from at least one source memory block to at least one destination memory block; the memory controller being configured to perform: copying the set bit values to the at least one destination memory block, subsequently copying the set bit values and the copied bit values to further destination memory blocks.

Abstract: An electronic device handles accesses of a branch prediction functional block when executing instructions in program code. The electronic device includes a processor having the branch prediction functional block that provides branch prediction information for control transfer instructions (CTIs) in the program code and a minimum predictor use (MPU) functional block. The MPU functional block determines, based on a record associated with a given fetch group of instructions, that a specified number of subsequent fetch groups of instructions that were previously determined to include no CTIs or conditional CTIs that were not taken are to be fetched for execution in sequence following the given fetch group. The MPU functional block then, when each of the specified number of the subsequent fetch groups is fetched and prepared for execution, prevents corresponding accesses of the branch prediction functional block for acquiring branch prediction information for instructions in that subsequent fetch group.

Abstract: Memory management is provided for processors, such as GPUs used to process data using a trained machine learning model. Requests received to a CPU can be stored to a request queue until the queue is full, or until a timeout value has been reached for periods of lower activity. The requests can then be batched and sent to a GPU as a single message on a single thread. Memory can be pre-allocated, and the trained model loaded into GPU memory once for processing of the relevant batches. The individual requests can be processed by the GPU and the results analyzed to determine at least a subset of results to return to the CPU, which can be provided back as results of the processing.

Abstract: A method for log analysis includes receiving log outputs from an application and generating a log file by recording the log outputs in the log file and, for each log output in the log file, attaching a log context record to the log output. The log context record is encoded with a call stack having stack frames and one or more variables in the stack frames. The method further includes grouping the log outputs in the log file based on their log context records.

Abstract: Example implementations relate to allocating an I/O request. In an example, a demultiplexer may forward an I/O request to a file system instance to which the I/O request belongs. The file system instance may tag the I/O request with a file system instance identifier associated with that file system instance. A volume manager may identify an extent pool to which the I/O request is to be allocated from among a plurality of extent pools of a storage based on the file system instance identifier tagged to the I/O request.

Abstract: A method and apparatus for garbage collection is disclosed herein. The method includes performing a garbage collection process without pausing execution of a runtime environment. The method also includes executing a first CPU instruction to load a first pointer that points to a first location in a first region of memory, where the first region of memory is undergoing garbage collection. The method also includes moving a first object pointed to by the first pointer from the first location in memory to a second location in memory.

Abstract: Provided herein may be a memory controller and a method of operating the memory controller. The memory controller may include: a host interface layer configured to receive a request for a memory device from a host; a flash translation layer configured to generate a descriptor including a flag indicating whether the request is a priority read request; and a flash interface layer configured to suspend requests input prior to the priority read request depending on the flag, store the requests input prior to the priority read request, and perform the priority read request.

Abstract: Systems, methods, and computer program products for trace management in a distributed computing environment are described. A trace manager receives a request to analyze a trace of a series of calls between applications serving requests in a microservice architecture. The trace manager determines metrics including, for example, latency information and start time for the series of calls. The trace manager presents the metrics in association with log entries correlated to the series of calls. A call stack, or one or more latency indicators, provides a user interface of selecting one or more calls. A user selection of a particular call in the call stack or a latency indicator causes one or more corresponding log entries to be emphasized or filtered. The call stack and the one or more latency indicators can have various display configurations.

Abstract: A data storing method, a memory control circuit unit and a memory storage device are provided. The method includes: receiving a first write command from a host system; determining whether to write a first data corresponding to the first write command by using a first mode or write the first data by using a second mode according to an available buffer memory state; writing the first data into a first physical erasing unit among a plurality of physical erasing units by using the first mode when the first data is determined to be written by using the first mode; and writing the first data into a second physical erasing unit among the physical erasing units by using the second mode when the first data is determined to be written by using the second mode.

Abstract: A plurality of mapping modes may be shifted between in real time while maintaining continuous memory mapped access to an application. Data may be migrated between different types storage devices and/or interconnects. The shift between the plurality of mapping modes may be based on a change to the type storage device and/or type of interconnect for the data migration.

Abstract: A system and method for offset protection data in a RAID array. A computer system comprises client computers and data storage arrays coupled to one another via a network. A data storage array utilizes solid-state drives and Flash memory cells for data storage. A storage controller within a data storage array is configured to store user data in a first page of a first storage device of the plurality of storage devices; generate intra-device protection data corresponding to the user data, and store the intra-device protection data at a first offset within the first page. The controller is further configured to generate inter-device protection data corresponding to the first page, and store the inter-device protection data at a second offset within a second page in a second storage device of the plurality of storage devices, wherein the first offset is different from the second offset.

Abstract: A data storage device in a two-layer control structure is provided. A control unit of the data storage device has a command processor and a first non-volatile memory (NVM) controller. The command processor is operative to communicate with a host. The first non-volatile memory (NVM) controller operates a first NVM of the data storage device. Earlier than the command processor operates according to a ROM image corresponding to the command processor, the first NVM controller operates according to a ROM image corresponding to the first NVM controller to access the first NVM to get a firmware image for the command processor and loads the command processor with the firmware image.

Abstract: Described in detail herein are systems and methods for detecting absent like physical objects at a first facility and replenishing the like physical objects from the second facility to the first facility. The system includes an autonomous robot device configured to detect absent like physical objects at a first facility and transmit an identifier associated with the like physical objects to a first computing system. The first computing system determines the need for the addition of the like physical objects in the first facility and transmits the data associated with the like physical objects to the second computing system. The second computing system corrects a perpetual inventory error associated with the like physical objects based on the received data and transmits instructions to an autonomous robot picker disposed at a second facility to replenish the like physical objects at the first facility.

Abstract: A Solid-State Disk (SSD) Manufacturing Self Test (MST) capability enables an SSD manufacturer to generate and load tests onto SSDs, run the tests, and gather results. The SSDs self execute the loaded tests when powered up. The self executing is while coupled to a host that loaded the tests or while coupled to a rack unable to load the tests but enabled to provide power to the SSDs. The rack is optionally cost-reduced to enable cost-efficient parallel testing of relatively larger numbers of SSDs for production. The host writes the tests to an ‘input’ SMART log of each SSD, and each SSD writes results to a respective included ‘output’ SMART log. The commands include write drive, erase drive, SATA PHY burn-in, delay, and stress mode. The SSD MST capability is optionally used in conjunction with an SSD virtual manufacturing model.

Abstract: A method and apparatus for garbage collection is disclosed herein. The method includes specifying a load-monitored region within a memory managed by a run-time environment, enabling a load-monitored event-based branch configured to occur responsive to executing a first type of CPU instruction to load a pointer that points to a first location in the load-monitored region, performing a garbage collection process in background without pausing executing in the run-time environment, executing a CPU instruction of the first type to load a pointer that points to the first location in the load-monitored region, and responsive to triggering a load-monitored event-based branch, moving an object pointed to by the pointer with a handler from the first location in memory to a second location in memory.

Abstract: A method of determining an access address includes determining a first address translation rule to translate a first input address to a first output address, determining a second address translation rule to translate a second input address to a second output address, and using at least one of the first address translation rule and the second address translation rule to determine the access address. An apparatus for accessing a memory based on a memory address includes a first address translator configured to translate a first input address to a first output address and a second address translator configured to translate a second input address to a second output address. The apparatus is configured to use at least one of the first address translator and the second address translator to translate the memory address to the access address.

Abstract: The invention relates to a method and apparatus for recording and maintaining stored information system object relationship information. Information contained within a stored information system (including system catalogs, referential constraints, triggers, table hierarchies, column references, indexes, stored program packages, system catalogs, stored procedures, stored queries, log/trace files of dynamically executed code, etc.) are searched to identify dependency relationships between objects. This object relationship information is stored and maintained in an information base. Information within the information based may be organized based upon subsets of objects that support a common application, service, or capability.

Abstract: A memory subsystem obtains commands from a host system to relate data items. Relationship data stored in a memory of the memory subsystem is updated to include relations between data items stored in a media of the memory subsystem. The memory subsystem obtains commands from the host system to read data items related to a specified data item. Based on the relationship data, the memory subsystem determines or identifies data items related to the specified data item and locates the related data items based on mapping data stored in the memory that includes physical addresses of the related data items on the media. The memory subsystem sends the related data items to the host system.

Abstract: A method includes receiving, by a producer thread, an offer request associated with an item. Additionally, the method includes increasing, by the producer thread, a producer sequence. The producer thread determines (i) a chunk identifier, associated with the producer sequence, of a memory chunk from a doubly linked list of memory chunks and (ii) a slot position, from the producer sequence, in the memory chunk to offer the item. Additionally, the producer thread writes the item into the memory chunk at the slot position. A consumer thread determines the slot position of the item, consumes the item at the slot position, and determines the status of the slot position as an intermediate slot or the end slot. Responsive to determining the slot position as the end slot, the consumer thread detaches the memory chunk to remove the memory chunk from the doubly linked list of memory chunks.

Abstract: A semiconductor memory system including a resistive variable memory device and a driving method thereof are provided. The semiconductor memory system includes a memory controller including a scheduler configured to determine a generation period of a write command; a memory device including a memory cell array, the memory device being configured to write data input from the memory controller in the memory cell array in response to the write command; and a data determination circuit configured to output a change signal to the scheduler when all logic levels of the input data are equal to each other, the scheduler changing the generation period of the write command in response to the change signal.

Abstract: Described embodiments provide systems and methods of managing storage of data of a user across storage service providers. A storage service may receive a request to store data by a user. The storage service may communicate with storage service providers and may maintain storage vectors for each storage service provider. The storage service may identify a policy for the user. The policy may specify usage of the storage service providers based on a user profile. The storage service may determine, based on the policy, storage service providers to use to store the data of the user. The storage service may store a first portion of the data to a first storage vector of a first storage service provider. The storage service may store a second portion of the data to one of a second storage vector of a second storage service provider or a storage of the storage service.

Abstract: Embodiments include method, systems and computer program products for fusing one or more transaction request messages. The computer-implemented method includes comparing, using a memory controller, at least two electronic transaction request messages and determining if the at least two electronic transaction request messages are of a same electronic transaction request message type. The memory controller is used to determine that the at least two electronic transaction request messages are directed to associated portions of memory based at least in part on determining that the at least two electronic transaction request messages are the same electronic transaction request message type. The memory controller fuses the at least two electronic transaction request messages based at least in part on determining that the at least two electronic transaction request messages are directed to associated portions of memory.

Abstract: In one embodiment, a system includes one or more processors and a memory storing instructions that, when executed by the one or more processors, cause the one or more processors to perform operations including sequencing a plurality of rows into a first sequence based on a first criteria and determining to store a first set of the plurality of rows in a first block of a first storage unit in accordance with the first sequence. The operations further include determining to store, in a first block of the second storage unit, a block identification of the first block of the first storage unit and a row identification for each row of the first set of the plurality of rows. The operations further include re-creating the first set of the plurality of rows of the first block of the first storage unit using information stored in the second storage unit.

Abstract: A memory sub-system performs a first wear leveling operation among a plurality of individual data units of the memory component after a first interval and performs a second wear leveling operation among a first plurality of groups of data units of the memory component after a second interval, wherein a first group of the first plurality of groups comprises the plurality of individual data units. The memory sub-system further performs a third wear leveling operation among a second plurality of groups of data units of the memory component after a third interval, wherein a second group of the second plurality of groups comprises the first plurality of groups of data units.

Abstract: A memory module comprises an address buffer circuit, a command/address channel, and a plurality of memory components controlled by the address buffer circuit via the command/address channel. At least one memory component comprises a plurality of data ports, a memory core to store data, and a data interface. The data interface is capable of transferring data between the memory core and the data ports. The data interface supports a first data width mode in which the data interface transfers data at a first bit width and a first burst length via the data ports. The data interface also supports a second data width mode in which the data interface transfers data at a second bit width and second burst length via the data ports. The first bit width is greater than the second bit width and the first burst length is shorter than the second burst length.

Abstract: A method for improving performance of a system including a first processor and a second processor includes obtaining a code region specified to be executed on the second processor, the code region including a plurality of instructions, calculating a performance improvement of executing at least one of the plurality of instructions included in the code region on the second processor over executing the at least one instruction on the first processor, removing the at least one instruction from the code region in response to a condition including that the performance improvement does not exceed a first threshold, and repeating the calculating and the removing to produce a modified code region specified to be executed on the second processor.

Abstract: The present disclosure generally relates to a device, method, or system for time sensitive networking. In an example, the device can include a time-sensitive networking controller and a scheduler. The device also includes an enhanced gate control list maintained on the time-sensitive networking controller to include a direct memory access address, a launch time, and a pre-fetch time for a data packet. The device may also include a transmitter of the time-sensitive networking controller to transmit the data packet retrieved using the direct memory access address at the launch time identified by the scheduler.

Abstract: A storage device includes a nonvolatile memory with physical blocks each including a plurality of clusters, and a controller that maintains a first table storing a relationship between a logical address and a physical address of the cluster, and a second table storing a relationship between a logical block and physical blocks allocated thereto. The controller performs garbage collection processing which includes copying data read from valid clusters of the first logical block to a destination logical block, erasing all data of the physical blocks of the first logical block, creating a new logical block when the data read contains an uncorrectable error, allocating the physical blocks of the first logical block to the new logical block, updating the second table so that the physical blocks of the first logical block are associated with the new logical block and no physical blocks are associated with the first logical block.

Abstract: Embodiments described herein provide a mission-critical artificial intelligence (AI) processor (MAIP), which includes an instruction buffer, processing circuitry, a data buffer, command circuitry, and communication circuitry. During operation, the instruction buffer stores a first hardware instruction and a second hardware instruction. The processing circuitry executes the first hardware instruction, which computes an intermediate stage of an AI model. The data buffer stores data generated from executing the first hardware instruction. The command circuitry determines that the second hardware instruction is a hardware-initiated store instruction for transferring the data from the data buffer. Based on the hardware-initiated store instruction, the communication circuitry transfers the data from the data buffer to a memory device of a computing system, which includes the mission-critical processor, via a communication interface.

Abstract: The present disclosure describes use of two security processors for a mobile device. In some aspects, a first security processor device embodied in a security component of an apparatus receives a user input via an input device and transmits a security condition signal to a second security processor device embodied in a System on Chip (SoC) component of the apparatus, causing the SoC component to perform a security operation. In other aspects, the first security processor receives a signal via a sensor device sensing environmental conditions surrounding the apparatus and, in response, transmits a security condition signal to the second security processor, causing the SoC component to perform a security operation. The security operation is directly controlled, maintained, and implemented by the second security processor embodied in the SoC component.

Abstract: A database may delete rows of data based on one or more predicate parameters. A method of data storage includes receiving a delete request for a database, where the delete request includes one or more predicate parameters and adding the predicate parameters to a set of deletion predicate parameters in metadata of the database. The method may further include performing a compaction of the database, where the compaction includes rewriting each data element of the database unless a key of the data element corresponds to at least one of the set of deletion predicate parameters.

Abstract: The disclosure enables management of block storage more efficiently than with traditional free space bitmap approaches. An exemplary method includes segregating disk gap indices by differentiated gap sizes; maintaining a set of lists for segregated sizes, such that each list identifies gaps of a common size; comparing a length of a list with trigger criteria, and based at least on the length of the list meeting the criteria, writing at least a portion of the list into a disk gap. Writing gap locations into gaps in disk storage reduces memory burdens, and the gap data can later be extracted when the list becomes short. These processes can be performed iteratively. The prior need for traversing a free space bitmap to find a gap of a particular size is eliminated; the new method permits more rapid location of a particular size gap by selecting an element of the proper list.

Abstract: A method of accessing a remote storage subsystem from a host device separate from the remote storage subsystem and connected via interfaces to a data communications topology is disclosed. In one embodiment, the communications interface comprises an RDMA network fabric. In one embodiment, the method includes queuing a write command or a read command in a submission queue of the remote storage subsystem, and placing a write data into a memory of the remote storage subsystem. The method further includes transmitting a message to the remote storage subsystem indicating the write command or the read command has been submitted in the submission queue, and detecting a command completion status from a completion queue of the remote storage subsystem. The method further includes transmitting a message to the remote storage subsystem indicating the command completion status has been detected.

Abstract: This computer system is configured by connecting a plurality of computers via a communication network. At least one computer among the computers has a storage device and a communication device. The communication device has: a controller that controls data transmission/reception via the communication network; and an intermediate memory that stores data transmitted/received between the storage device and other calculators on the communication network.

Abstract: Data volumes for a customer can be placed on various storage tiers, including different hardware types or storage systems, that are determined to be appropriate for the anticipated usage of those data volumes. The actual usage can be monitored to determine one or more types of workload for the data volume, and a determination made as to whether all, or portions, of the data volume could obtain a significant performance improvement by being migrated to a different storage tier. In some instances the chunks or partitions of a volume can be concurrently distributed across multiple different storage tiers in order to satisfy various performance and/or cost criteria. Once workload information is available for a customer, that information can be used to determine the storage tiers for initial placement of subsequent data volumes.

Abstract: A hashing system can use a set of multiple numbers that are co-prime to the size of a hash table to select a probe offset when collisions occur. Selecting a probe offset that is co-prime to the hash table size ensures that each hash table slot is available for any insert operation. Utilizing different co-prime numbers for different keys helps avoid clustering of items inserted into the hash table. When a collision occurs, the hashing system can compute a next index to check by selecting a probe offset that is located at a computed index on a list of numbers that are each co-prime to the number of slots in the hash table. The hashing system can compute the index into the list of numbers by applying a hash function to the data item and calculating a modulus of the result with respect to a count of the co-prime numbers list.

Abstract: According to one embodiment, a data processing system includes a plurality of processing units, each processing unit having one or more processor cores. The system further includes a plurality of memory roots, each memory root being associated with one of the processing units. Each memory root includes one or more branches and a plurality of memory leaves to store data. Each of the branches is associated with one or more of the memory leaves and to provide access to the data stored therein. The system further includes a memory fabric coupled to each of the branches of each memory root to allow each branch to access data stored in any of the memory leaves associated with any one of remaining branches.

Abstract: Methods and devices for managing first-in first-out (FIFO) queues in graphics processing are described. A write operation can be executed by multiple write threads on a graphics processing unit (GPU) to write data to memory locations in the multiple pages of memory. The write operation can also include allocating additional pages of memory for the FIFO queue where a write allocation pointer is determined to achieve a threshold, such to grow the FIFO queue before the memory is actually needed for writing. Similarly, comprises a read operation can be executed by multiple read threads to read data from the memory locations. The read operation can also include deallocating pages of memory back to a memory pool where a read done pointer is determined to achieve a threshold, such as an end of a page.

Abstract: A method, apparatus, computer-readable medium, and/or system described herein may be used to efficiently store, move, and/or process data across a plurality of computing clusters. For example, a computing device may receive an indication of one or more data storage locations within a first cluster of servers and/or an indication of one or more data storage locations within a second cluster of servers. The computing device may generate a data file comprising the indication of the one or more data storage locations within the first cluster of servers and/or the indication of one or more data storage locations within the second cluster of servers. Based on the generated data file, the computing device may generate a job to move data stored at the one or more data storage locations within the first cluster of servers to the one or more data storage locations within the second cluster of servers. Based on the job, the computing device may transmit, e.g.

Abstract: A memory device includes: a plurality of first control signal interfaces respectively corresponding to a plurality of channels, and suitable for receiving control signals from a host; a plurality of first data interfaces respectively corresponding to the plurality of channels, and suitable for exchanging data and data strobe signals with the host; a second control signal interface suitable for receiving control signals through a selected one of the first control signal interfaces and a selected one of the channels and outputting the received control signals, in a monitoring mode; and a second data interface suitable for receiving a part of the data and data strobe signals exchanged through a selected one of the first data interfaces and the selected channel, and outputting the received part of the data and data strobe signals, in the monitoring mode.