Abstract: A semiconductor integrated circuit comprises a transistor which has a first electrode, a second electrode and a third electrode, said transistor conducting a current of a first power source from the second electrode to the third electrode by a power supplied to the first electrode; a driver to supply said first electrode with power for driving said transistor; a reference voltage circuit to generate a reference voltage which is variable in response to temperature of said transistor, said reference voltage being used as the reference for comparison; a comparative voltage circuit to generate a comparative voltage which is variable in response to a current flowing from said second electrode to said third electrode, said comparative voltage being compared with said reference voltage; and a controller which receives said reference voltage and said comparative voltage and which supplies a control signal to said driver, said control signal being based on a result of the comparison between the comparative voltage and

Abstract: A voltage switching circuit is disclosed which is constructed from a minimum number of transistors and prevents the threshold voltage margin from being lowered by causing high-voltage cutoff and supply voltage transfer functions heretofore performed by a single depletion transistor to be shared between two series-connected depletion transistors different in gate insulating film thickness or threshold voltage. Thus, without using enhancement transistors which involve an increase in pattern area a voltage switching circuit can be provided which is small in chip area, low in cost and high in yield and reliability and provides a stable operation with a low supply voltage which is impossible with one depletion transistor.

Abstract: The invention relates to a high frequency switch used in a communication apparatus or the like, such as a portable terminal. The switch includes a first signal terminal, a first diode, the cathode of which is directly or indirectly connected to the first signal terminal, a bias controlling device having an end which is connected to the anode of the first diode, a second signal terminal directly or indirectly connected to the anode of the first diode, an impedance converting device having an end which is directly or indirectly connected to the first signal terminal, a serial circuit having a high frequency voltage dividing device and a second diode, the serial circuit being connected to the other end of the impedance converting device, and a third signal terminal directly or indirectly connected to the other end of the impedance converting device.

Abstract: A power module having a plurality of power devices arranged in parallel with each other and switched by gate signals with substantially equal electric potential. The power module includes: a collector electrode pattern, first and second power devices provided on the collector electrode pattern and each having a collector electrode connected to the collector electrode pattern; an emitter electrode pattern provided along the collector electrode pattern and having an emitter lead, and first and second connection means for connecting emitter electrodes on the first and second power devices and the emitter electrode pattern, respectively. The power module is characterized in that an inductance component of at least one of the first and second connection means is adjusted so that the inductance component between the emitter electrode on the first power device and the emitter lead is substantially equal to that between the emitter electrode on the second power device and the emitter lead.

Abstract: In a circuit arrangement for discharging at least one circuit node, an input and at least one output connectible to the at least one circuit node are provided along with at least one controllable resistor, a capacitor and a diode. A first terminal of the controllable path of the controllable resistor is connected to the output. A second terminal of the controllable path of the controllable resistor is connected to the input. A terminal of the capacitor and a cathode of the diode are connected to a control terminal of the controllable resistor. An anode of the diode is connected to the input. The circuit arrangement requires a very small area in an integrated circuit and enables a very fast discharge of the circuit node.

Abstract: A voltage switching circuit is disclosed which is constructed from a minimum number of transistors and prevents the threshold voltage margin from being lowered by causing high-voltage cutoff and supply voltage transfer functions heretofore performed by a single depletion transistor to be shared between two series-connected depletion transistors different in gate insulating film thickness or threshold voltage. Thus, without using enhancement transistors which involve an increase in pattern area a voltage switching circuit can be provided which is small in chip area, low in cost and high in yield and reliability and provides a stable operation with a low supply voltage which is impossible with one depletion transistor.

Abstract: A configuration, in which switches 107 and 109 are loaded to bias lines 104 and 105, is adopted. It is such structured that a high frequency switch 100 can be changed over at a high speed by closing the switches 107-109 to discharge the electric charge accumulated on PIN diodes D1 and D2 at a high speed when turning OFF the PIN diodes D1 and D2.

Abstract: An address element, including a polysilicon resistor functioning as a heating element and blocking diode preventing sneak current to unaddressed elements, is selectively addressed using row and column address lines in a thin film structure having a minimum number of address lines and a minimum number of layers. The resistor heater element is well suited for igniting a fuel cell such as a fuel cell in an array of fuel cells disposed in a thin film microthruster.

Abstract: A circuit simulating the function of a diode in the sense that it conducts current in one direction and blocks current in the opposite direction, but which has a low forward voltage drop. A voltage comparator and a three terminal switch are connected so that the intrinsic reverse diode associated with the switch is harnessed to conduct current in the direction in which it is desired to conduct current and to block current in the direction in which it is desired to block current. A voltage comparator controls the control terminal of the three terminal switch to turn on the switch to conduct current and to interrupt current. Alternate embodiments of voltage comparators are disclosed. The voltage comparator may include charging and discharging transistors so that the switch turns on and off at a high speed. The invention further includes a method of conducting current in one direction and blocking current in a second direction which reduces power losses.

Abstract: Apparatus for opening and closing electrical circuits including one or more normally-open switches and normally-closed switches. A normally-open switch includes at least one MOSFET assembly consisting of a plurality of MOSFETs of different current-carrying capacities connected in parallel and circuitry for turning on the MOSFETs in time sequence. The normally-closed switch includes a pnp bipolar transistor, an npn bipolar transistor, and a circuit for short-circuiting the emitter-base junctions of the two transistors. The base and the collector of the npn transistor are connected respectively to the collector and the base of the pnp transistor. The normally-open and normally-closed switches both include a means for accommodating a current flow in either direction through the switch terminals.

Abstract: In a switching circuit, a first electrical element (22) is disabled before a second electrical element (30) is enabled. The switching operation is called break before make and ensures that disabling operation of a first electrical element occurs before enabling operation of a second electrical element. The assurance is in the form of a disable signal being detected from a first electrical element at an input of a first detection circuit (28). Correspondingly, the detected disable signal of the first electrical element enables operation of the second electrical element. Alternatively, a detected disable from the second electrical element at the input of the second detection circuit (20) enables operation of the first electrical element.

Abstract: A driver circuit for a high frequency switching circuit such as a converter for a gas discharge lamp includes a resonant circuit which transfers energy from the parasitic input capacitance of one or more power switching devices during switching of the latter. The energy transfer prevents dissipation of the capacative energy in the driver circuit which may otherwise destroy one or more components of the driver circuit. The resonant circuit includes a discrete inductor in the driver circuit. Preferably, one or more discrete capacitors are also included within the driver circuit to maintain resonance at a given frequency regardless parasitic capacitance variation.

Abstract: A high density, high speed, and low power circuit scheme is presented for vector switching port applications for advanced IC design. Embodiments exhibit superior area-delay-power properties. The technique benefits a wide range of product applications ranging from high speed high bandwidth router to low power portable computing hardware. 5.0 TBPS peak traffic can be supported for an on-chip vector port.

Abstract: A switching element having two signal inputs and two signal outputs, in which switching element a first and second transistor are provided, the base terminals of which are connected to one another and are connected to a drive unit. The collector terminals of the first and second transistor form the two signal outputs and the emitter terminals of the first and second transistor form the two signal inputs to which a current source can be connected in each case. The switching element provides for implementation of a switching system with low power loss.

Abstract: An integrated circuit device 1 such as a current sensor includes a circuit configuration 3 which is driven from supply rails (P1, P2) at a given operational voltage. An external data connection P7 is arranged to supply data to a controlling micro-controller 2 that operates at a running voltage different from the voltage for the device 1. An enable connection (6) couples an enabling signal from the micro-controller 2 at its running voltage to pin P8 on the device 1. In response, the circuit configuration 3 supplies data for the micro-controller 2, to the data pin P7. The integrated circuit device 1 includes control circuitry (R1, T1) responsive to the enabling signal applied to pin P8 to ensure that the data supplied at pin P7 is at a voltage compatible with the running voltage of the micro-controller 2. No pin to receive a rail voltage corresponding to the running voltage for the micro-controller 2 is needed for the integrated circuit device 1.

Abstract: The method addresses and interrogates addressable cells having at least one element including a polysilicon resistor functioning as a heating element and blocking diode preventing sneak current to un addressed elements, for selectively addressing one of the cells using row and column address line in a thin film structure having a minimum number of address lines and a minimum number of layers. The resistor heating element can be used for igniting a respective fuel cell in an array of fuel cells disposed in a thin film microthruster. After ignition, the address lines are used to interrogate the cell location for verification of fuel cell ignition well suited for monitoring fuel burns and usage of the microthruster.

Abstract: The present invention refers to a circuit for current injection control comprising a first transistor having an input terminal, an output terminal and a control terminal, having the characteristic of comprising a second transistor having an input terminal connected to said output terminal of said first transistor, an output terminal and a control terminal and also comprising coupling means placed between said input terminal and said control terminal of said second transistor, said coupling means being active when said first and second transistor are in cut-off zone.

Abstract: A signal switching circuit is disclosed wherein first to fourth diode pairs each comprising two series-connected diodes are disposed respectively between a first input terminal and a first output terminal, between a second input terminal and the first output terminal, between the first input terminal and the second output terminal, and between the second input terminal and the second output terminal, and first to fourth capacitor means connected respectively between diode-to-diode connection points in the diode pairs and the ground are provided. The first diode pair or the second diode pair is rendered conductive in an alternative manner. Likewise, the third diode pair or the fourth diode pair is rendered conductive in an alternative manner. By residual inductance in each of the diode pairs thus rendered conductive and the associated capacitor means there is constructed a low pass filter for passing therethrough the corresponding first or second signal.

Abstract: A control arrangement and method is provided for electronic devices in which an electronic switch is maintained in a conducting state at all times other than when it is desired to render the electronic switch nonconducting. In a specific embodiment, a latched control signal is utilized which is changed by the receipt of a momentary signal to change the conducting state of the electronic switch. For example, according to one specific arrangement, the momentary signal is a secure, complex signal such that appropriate decoding and detection of the proper signal is required to change the conducting state of the electronic switch.

Abstract: A semiconductor integrated circuit includes a plurality of logical elements connected in series or parallel, the plurality of logical elements including a semiconductor substrate and an insulating layer provided on the semiconductor substrate; and a buffer circuit connected between a logical element group including at least two of the plurality of logical elements and another logical element group including at least two of the plurality of logical elements.

Abstract: A voltage switching circuit is disclosed which is constructed from a minimum number of transistors and prevents the threshold voltage margin from being lowered by causing high-voltage cutoff and supply voltage transfer functions heretofore performed by a single depletion transistor to be shared between two series-connected depletion transistors different in gate insulating film thickness or threshold voltage. Thus, without using enhancement transistors which involve an increase in pattern area a voltage switching circuit can be provided which is small in chip area, low in cost and high in yield and reliability and provides a stable operation with a low supply voltage which is impossible with one depletion transistor.

Abstract: The present invention provides a semiconductor switching circuit and a semiconductor device using the switching circuit that can maintain sufficient isolation characteristics even when dealing with high frequency signals. The semiconductor switching circuit includes a first semiconductor switching element connected between a first terminal and a second terminal, a second semiconductor switching element, one end of the second switching element being connected to one of the first and second terminals, and an open stub connected to the other end of the second switching element.

Abstract: A compound semiconductor switching device is based on a designing guideline that isolation should be assured by reducing the gate width of switching FET, thereby reducing the capacitance of the FET. Proper isolation between the two signal passes IS obtained with a FET gate width of about 700 &mgr;m or smaller at a signal frequency of about 2.4 GHz or higher, without employing a shunt FET.

Abstract: To switch a switch of an audio source for example the problem exists that switching noise can occur.

Abstract: The present invention relates to the use of a programmable soft fuse for disabling a signal line using an electronic switching circuit, a latch, a control circuit, and a reset circuit. In another preferred embodiment, a precharge device is included.

Abstract: A delay matched clock and data generator utilizes a re-timing element having the functionality of a two-input multiplexer, connected and operated such that the level on the output(s) is controlled from level control inputs, and the timing of transitions on the output(s) is controlled from timing control inputs. The level control inputs on the re-timing element correspond to the data input(s) on an equivalent multiplexer. The generator further has control inputs for stopping the clock low or stopping the clock high, and the generator may be operated for polarity independent clock gating or clock synthesis.

Abstract: An improved net driver circuit is provided. The net driver circuit includes a control circuit. A bi-directional input/output (I/O) circuit is coupled to the control circuit. The bi-directional input/output (I/O) circuit includes a receiver and a driver. The control circuit monitors the net and responsive to a new changed state of the net being identified, the control circuit enables the driver to drive the net to the new changed state. The receiver senses the current state of the net and the control circuit remembers the previous state of the net. When the net state is the same as the previous state, the control circuit causes the driver to be in a high impedance state.

Abstract: A fast voltage ramp generator comprises a chain of transistors connected collector to emitter in series, and biased to avalanched switching mode. A respective transformer secondary is connected to apply a switching pulse across the base emitter junction of each transistor of the chain to effect avalanche switching of the chain. The transformer secondaries are the secondaries of discrete transformers with respective primaries connected in series. The transformers are formed of ferrite beads having plated through holes constituting the secondaries of the transformers. The beads are threaded on an insulated conductor which constitutes the series connected primaries of the transformers.

Abstract: The switching di/dt and switching dv/dt of a MOS gate controlled ("MOS-gated") power device are controlled by respectively controlling the voltage and current waveforms. Open loop control of the turn-on of the MOS-gated device is provided by coupling a common terminal of a current generator circuit, which provides a current to the gate of the MOS device, to a first resistor for controlling the switching dv/dt. At the detection of a negative dv/dt, the common terminal of the current generator circuit is then coupled to a second resistor for controlling the switching di/dt. The first and second resistors are, in turn, coupled to the source terminal fo the MOS-gated device. An analogous operation provides turn-off control of the MOS-gated power device. Closed loop control is also provided by measuring the switching dv/dt and the switching di/dt which are then fed back to the circuit to control the current supplied to the gate of the MOS-gated device.

Abstract: An integrated dynamic interconnect device for connecting and disconnecting at least a portion of a parasitically powered integrated electronic circuit, includes a power input, a power output, a signal input to receive a connect/disconnect signal, and an integrated switching mechanism which is responsive to the signal input receiving a connect/disconnect signal to electrically connect and disconnect the power input and the power output.

Abstract: A FET drive circuit is disclosed. The disclosed drive circuit develops a unipolar voltage from a bi-polar source voltage and facilitates fast turn-off of the driven FET. Preferably, the drive circuit includes a first diode having a first reverse recovery time, a transistor, and a second diode having a second reverse recovery time which is longer than the first reverse recovery time.

Abstract: A gate drive circuit for a bidirectional blocking MOSFET, the bidirectional blocking MOSFET being characterized in the source region is not shorted to the body regions In one embodiment, the gate drive circuit includes diodes connected between the source/drain regions and a charge pump, the charge pump generating a gate drive voltage applied to a gate of the bidirectional blocking MOSFET. In a second embodiment, a charge pump generates a gate drive voltage which is applied to the gate of the bidirectional blocking MOSFET, and is also connected to the source/drain regions through zener diodes. In the second embodiment, the potential applied to the gate of the bidirectional blocking MOSFET is limited to a zener diode drop above the lower of the voltages of the source/drain regions. In a fourth embodiment, a charge pump generates a floating gate drive voltage which is applied to the gate of the bidirectional blocking MOSFET through first and second depletion mode MOSFETS.

Abstract: An inductive load drive circuit includes a transistor for pulling-in an excitation current having a predetermined polarity and generated by an inductive load. The transistor is turned-on by a first idling loop when a drive voltage of the inductive load has a negative polarity, and the transistor is turned-on by a second idling loop when the drive voltage has a positive polarity. Though both of the first idling loop and the second idling operate on the basis of the drive voltage, in pulling the excitation current into the circuit, the drive voltage reaches a lower limit of a dynamic range at a time that the first idling loop is suitably operated while the drive voltage reaches an upper limit of the dynamic range at a time that the second idling loop is suitably operated.

Abstract: Two electronic modules are connected to share and to independently read the sensed value from a single environmental sensor element, by communicating between each other when a particular module is reading the sensor output signal. The sensor output signal is a function of the value of the reference voltage being applied by the reading module and the characteristics of the environment being sensed. A module provides a toggle signal when it completes its reading of the sensor so that the other (non-reading) module will know when it may apply its reference voltage to the sensor and complete its reading of the sensor. The modules alternate the reading of the sensor in order to eliminate the need for a plurality of corresponding sensors.

Abstract: An electronic switching device which can be connected via an outside conductor to one pole of a voltage source and only via one other outside conductor to a terminal of a consumer, in which the other terminal of the consumer can be connected to the other pole of the voltage source, therefore a two-wire switching device, with a proximity indicator (1) which can be influenced from the outside, with an electronic switch (3), which can be controlled by the proximity indicator (1) via a switching amplifier (2), and with operating voltage supply circuit (4) for making available the operating voltage required by proximity indicator (1), and optionally by the switching amplifier (2) (=internal operating voltage), the operating voltage supply circuit (4) an having in-phase regulator (5) and proximity indicator (1) and the switching amplifier (2) being connected to the output of the in-phase regulator (5).

Abstract: An apparatus for controlling an electrical appliance coupled with an output terminus and configured to operate in response to an alternating input signal, such as input AC power. The apparatus comprises a reference signal generator for receiving the input signal and generating a reference signal (either V.sub.RAMP or V.sub.CONTROL) in response to the input signal, and a control circuit for controlling connection of the input signal to the output terminus in response to the reference signal and to a user-defined set-point signal. The control circuit is coupled with the reference signal generator and with a set-point terminal. The set-point terminal receives the set-point signal and the control circuit controls connection of the input signal with the output terminus in response to a predetermined relationship between the reference signal and the set-point signal; the apparatus is capable of generating a modified periodically interrupted AC power output based on an AC power input.

Abstract: A bilateral switch (302) plus inductance (304) to drive a capacitive load (306 plus 350) by resonant charging and discharging the load.

Abstract: A multiport switch buffers and transfers cells of digital data. It provides the ability to control the synchronization of the ports in a distributed manner. Each port is associated with a counter that starts counting when transmission by either the port it is associated with is transferring a cell, or when another port is transferring a cell on a channel that conflicts with the channel attached to the port. The counter counts the appropriate number of digits corresponding to the length of the cell whereupon the port is provided with a signal indicating that the transmission has ended. In association with other control signals, the port may then begin transmitting a new cell. When multiple switches are attached to the same channel, the counter serves as a self-queuing mechanism that relieves a central controller from having to keep track of the transmission of bits by each port, and from having to select the next port for transmission.

Abstract: A charge amplifier with DC offset cancelling for use in a pixel element of an MOS image sensor is disclosed. The charge amplifier can be manufactured using a standard CMOS single polycrystalline process, making it much more cost effective than prior art designs. The charge amplifier includes an operational amplifier, a source capacitor, a series capacitor, and a feedback capacitor. The source capacitor holds the input signal. The output of the operational amplifier provides the output signal. Switches control the routing of the signal flow from the source capacitor, the series capacitor, and the feedback capacitor.

Abstract: The invention relates to a charge-pump control circuit for a power transistor including a driver circuit connected to a first supply voltage through a diode and to a second voltage through a switch and a first load. The driver circuit is connected to the power transistor, and the power transistor is linked to a pump capacitor. The power transistor is connected between a further supply voltage and a second load. The control circuit of the invention further includes a control logic circuit connected between the first supply voltage and the second voltage. The control logic circuit is connected to the driver circuit and to the switch, and the switch is connected between the power transistor and the first load. The switch is also connected to the driver circuit, and to a circuit for checking the charged state of the pump capacitor which is connected between the switch and the control logic circuit.

Abstract: A mechanism for automatically enabling and disabling clock signals includes a driver for providing a clock signal as an output, a gate coupled to the driver, and a sensing circuit coupled to both the output of the driver and to the gate. The sensing circuit provides a signal to the gate responsive to the output being in a first state. The gate then prevents the driver from driving the clock signal responsive to the signal from the sensing circuit. In one embodiment, a generator is coupled to the driver for providing a waveform to the driver. The driver then provides the clock signal based on this input waveform. Additionally, the gate is situated between the generator and the driver. The gate, based on the output of the sensing circuit, can then prevent the waveform from being provided to the driver.

Abstract: A terminating circuit including a pair of diodes connected to have polarities opposite to each other is provided across a magnetic head. When the potential difference across the magnetic head is drastically changed to be equal to or higher than the breakdown voltage of the diodes at the time of switching of a writing current, either one of the diodes breaks down, so that a part of the writing current flows out through the terminating circuit. As a result, ringing due to the drastic change is removed. When the potential difference across the magnetic head is lower than the breakdown voltage of the diodes, since either one of the diodes is reversely biased, the resistance of the terminating circuit is maintained high. Consequently, within this range, the writing current flowing to the magnetic head never flows out to the terminating circuit. As a result, the deterioration of the reading and writing characteristics is prevented.

Abstract: An apparatus controls the operation mode of a time division switching device selected from two incorporated in an electronic switching system for reliability thereof. Mode information representing previous operation modes of the two time switching devices is received and processed to issue a first and a second mode control signals. Thereafter, status of each component in the selected switching device and a power from a power supply in the unselected switching device are analyzed to produce each component status information and power status information. Next, an initial duplexing control signal is obtained based on each component status information, the first and the second mode control signals, and the power status information.

Abstract: A gate drive circuit for a bidirectional blocking MOSFET, the bidirectional blocking MOSFET being characterized in the source region is not shorted to the body region. In one embodiment, the gate drive circuit includes diodes connected between the source/drain regions and a charge pump, the charge pump generating a gate drive voltage applied to a gate of the bidirectional blocking MOSFET. In a second embodiment, a charge pump generates a gate drive voltage which is applied to the gate of the bidirectional blocking MOSFET, and is also connected to the source/drain regions through zener diodes. In the second embodiment, the potential applied to the gate of the bidirectional blocking MOSFET is limited to a zener diode drop above the lower of the voltages of the source/drain regions. In a fourth embodiment, a charge pump generates a floating gate drive voltage which is applied to gate of the bidirectional blocking MOSFET through first and second depletion mode MOSFETS.

Abstract: An integratable reversing switch selectively imposes a ground potential or a supply potential being positive relative thereto upon a terminal of a load having another terminal being connected to a supply potential that is negative relative to the ground potential. A first switch is connected between the load and the positive supply potential. A second switch is controlled in complementary fashion thereto and is connected between the load and the ground potential. The second switch is formed by an inversely operated DMOS field effect transistor.

Abstract: A switching circuit further decreasing the insertion loss. The first capacitor is connected between the drain terminal of the field effect transistor and the ground and/or the second capacitor is connected between the source terminal of the field effect transistor and the ground, and the capacitances of the first and/or second capacitors are set to optimum values. Accordingly, the switching circuit can be easily obtained which is low in insertion loss at a desired frequency. Besides, since a bias circuit for generating bias voltage from control voltage which is applied to the two control terminals of a switching circuit using a field effect transistor is provided, a switching circuit which does not need exclusive bias terminals and is superior in isolation property can be realized.

Abstract: A method and an apparatus for providing an adjustable floating capacitance between a first node and a second node in an integrated circuit. First and second transistors having commonly coupled gates are coupled between the input and output nodes of a digitally-adjustable floating MOS capacitor. The source and drain of the first transistor are coupled to the input node, while the source and drain of the second transistor are coupled to the output node. A switch responsive to an enable signal is coupled to the gates of the first and second transistors. In response to the enable signal, the switch alternatively couples the gates of the first and second transistors to either a first potential or a second potential. When the gates of the first and second transistors are coupled to the first potential, a first capacitance is realized between the input and output nodes.

Abstract: A serial interface includes a first port capable of transmitting and receiving data in a serial fashion. A first p-channel transistor is coupled to the a first port. A first n-channel transistor is coupled to the a first port. A first control circuit is coupled to the first p-channel transistor for disabling the first p-channel transistor so that the first port can operate in a first serial data transfer mode wherein the first n-channel transistor operates in an open-drain fashion. A second port is capable of transmitting and receiving a clock signal which is used to control data transfer through the first port. A second p-channel transistor is coupled to the a second port. A second n-channel transistor is coupled to the a second port. A second control circuit is coupled to the second p-channel transistor for disabling the second p-channel transistor so that the second port can operate in the first serial data transfer mode wherein the second n-channel transistor operates in an open-drain fashion.

Abstract: The present invention provides a driver circuitry having a single input terminal for receiving an input signal of binary digits consisting of high and low levels, and at least first and second output terminals, wherein the input signal is varied almost linearly in a first time period so as to be shifted between high and low levels, the driver circuitry comprises first and second control circuits. The first control circuit is coupled to the input terminal for receiving the input signal. The first control circuit is also coupled to the first output terminal for outputting a first output signal of binary digits via the first output terminal. The first control circuit is biased between a high voltage line which supplies a high level of voltage and a low voltage line which supplies a low level of voltage.

Abstract: Circuits and methods are provide for improving the turn-off switching speed of a high-speed integrated circuit, bipolar switching regulator. The regulator runs at megahertz frequencies, yet is efficient as previously available bipolar integrated circuit switching regulators operating at much lower frequencies. The turn-off circuitry increases the speed at which the switch turns off by momentarily providing additional current to boost the base discharge current during the on-to-off transition period of the switch. In a preferred embodiment, the circuitry includes a capacitor for storing a charge, a resistor for limiting the amount of additional current provided, and a diode for delivering the additional current to the base of an NPN transistor, the collector of which is coupled to the switch's base, for boosting that transistors collector current and the switch's base discharge current. The diode then blocks current during the off-to-on transition period of the switch.