Abstract: An integrated circuit includes a high side driver and a low side driver. The low side driver is electrically coupled with the high side driver. A circuit is electrically coupled with the high side driver and a first node between the high side driver and the low side driver. The circuit is configured to substantially turn off the high side driver if the high side driver leaves a cutoff region of the high side driver during a tri-state mode.

Abstract: A self-oscillating switch circuit for amplitude modulation dimming for dimming a LED load. The self-oscillating switch circuit comprises a high-power input terminal (S2) for supplying a first power to the load and a low-power input terminal (S1) for supplying a second power to the load. The switch circuit further comprises a power switch semi-conductor device (Q1) configured for controlling a load current from at least one of the high-power input terminal (S2) and the low-power input terminal (S1) to the output terminal. A control semi-conductor device (Q2) is configured to control the power switch semi-conductor device (Q1) in response to a sensing voltage.

Abstract: A switched capacitor circuit includes a capacitor and switches located on an input side and an output side of the capacitor. The switched capacitor circuit also includes an operational amplifier of a later stage which receives an output of the capacitor, wherein a current value of a current supplied to the operational amplifier is switched according to at least one open/closed state of at least one of the switches.

Abstract: In a first aspect, an RF switch includes a main transistor and a gate-to-source shorting circuit. When the RF switch is turned off, the gate-to-source shorting circuit is turned on to short the source and gate of the main transistor together, thereby preventing a Vgs from developing that would cause the main transistor to leak. When the RF switch is turned on, the gate-to-source shorting circuit is turned off to decouple the source from the gate. The gate is supplied with a digital logic high voltage to turn on the main transistor. In a second aspect, an RF switch includes a main transistor that has a bulk terminal. When the RF switch is turned off, the bulk is connected to ground through a high resistance. When the RF switch is turned on, the source and bulk are shorted together thereby reducing the threshold voltage of the main transistor.

Abstract: In combining an analog terminal of an A/D converter with a digital terminal, the effect of the noise from the digital terminal is reduced. A semiconductor integrated circuit includes a high-speed external terminal, a low-speed external terminal, a high-speed analog switch, a low-speed analog switch, and an A/D converter. The high-speed external terminal is coupled to an input of the A/D converter via the high-speed analog switch, and the low-speed external terminal is coupled to the input of the A/D converter via the low-speed analog switch. A plurality of inputs of a plurality of low-speed digital input buffer circuits and a plurality of outputs of a plurality of low-speed digital output buffer circuits are coupled to a plurality of low-speed external terminals.

Abstract: This document provides apparatus and methods for providing low-power operation of an interface circuit during an interval when a port of the interface circuit is in an uncoupled state.

Abstract: In some embodiments, an input/output (I/O) circuit sends and receives a high-level signal and a low-level signal via a coupling capacitance provided on a communication line. The I/O circuit includes a receiving portion including a first detection circuit arranged to detect one of the signals and a second detection circuit arranged to detect the other signal, a transmitting portion including a three-value output circuit configured to output one of signals consisting of a high-level signal, a low-level signal, and a high impedance signal, and a control circuit configured to control the receiving portion and the transmitting portion. The control circuit judges a level of an inputted signal depending on detection results of the first detection circuit and the second detection circuit in a receiving state and controls an output value of the three-value output circuit in a transmitting state.

Abstract: A transmission gate circuit includes a first transmission gate, having a first switching device, coupled in series with a second transmission gate, having a second switching device, and control circuitry which places the first transmission gate and the second transmission gate into a conductive state to provide a conductive path through the first transmission gate and the second transmission gate. When the voltage of the first terminal is above a first voltage level and outside a safe operating voltage area of at least one of the first and second switching device, the first switching device remains within its safe operating voltage area and the second switching device remains within its safe operating voltage area.

Abstract: A method for charging accumulation means configured by an electric charging device is disclosed. The charging device includes switching arms respectively including a first switch and a second switch. The method involves ordering a predetermined number of first switches to close respectively for an associated closure time, and on each opening of a first switch that was previously closed, another first switch is ordered to close for an associated closure time, so that a constant number of first switches are closed at a same time.

Abstract: Successive approximation register (SAR) analog-to-digital converters (ADCs) generally use one or more comparators to convert an analog signal to a digital signal. These comparators, however, can consume a great deal of power, so it is desirable to have a comparator configuration that consumes less power. Here, a multi-bandwidth comparator is provided, which can be switched between different coarse resolution and fine resolution. By using this single multi-bandwidth comparator, lower power consumption with a small amount of area can be achieved.

Abstract: A power switch circuit providing voltage to an output port is provided. The switch circuit includes a single power supply, a switch unit, a controlling unit, and a logic unit. The switch unit is connected between the single power supply and an output port and capable of being turned on and off alternatively for continuing or discontinuing power from the single power supply to the output port; the single power supply provides power to the output port. The controlling unit is configured for generating a voltage controlling signal and transmitting the voltage controlling signal to the logic unit. The logic unit receives and inverts the voltage controlling signal, and outputs the inverted voltage controlling signal to turn on or turn off the switch unit.

Abstract: Embodiments of the invention controlling power distribution in an ablation control apparatus or the like. In one embodiment, a power switching apparatus comprises a first switch assembly having an input end to receive a power input signal, the first switch assembly having a plurality of output channels; a second switch assembly coupled to the output channels of the first switch assembly; a plurality of power receiving members coupled to the second switch assembly; and a controller controlling the first switch assembly to selectively transmit the power input signal to the output channels one at a time in a cyclical manner according to a first switching rate.

Abstract: A switch circuit, particularly suitable for dimmer switches, detects zero-crossing or similar points in the supply and uses those to make predictions of future zero-crossing occurrences. The predicted occurrences may be used to time the operation of the switch itself to chop the supply which results in less variation in the power supplied (flicker if the switch circuit is operating a lamp) since the positions of the measured zero-crossings can be subject to noise but flicker is reduced if the switch is operated at times with respect to the true supply waveform. The predicted times may be obtained from a local oscillator having a period set by, for example, low pass filtering the period of the measured zero-crossings. The phase of the oscillator may be adjusted such that an error between the predicted and measured zero-crossings is reduced.

Abstract: An element substrate includes a plurality of terminals, a first receiving circuit and a second receiving circuit each receiving a differential signal via one of the terminals included in the plurality of terminals, a driving circuit including a first input unit for inputting a first signal and a second input unit for inputting a second signal and driving a driving element based on the first signal and the second signal, and a setting circuit for setting a first connection state of connecting an output from the first receiving circuit to the first input unit and connecting an output from the second receiving circuit to the second input unit, and a second connection state of connecting an output from the first receiving circuit to the second input unit and connecting an output from the second receiving circuit to the first input unit based on an externally input signal.

Abstract: A connecting apparatus for field devices in an explosion-hazard zone, comprising an input terminal area for a first connecting line, an output terminal area for a second connecting line, a covering device for protecting at least one of the terminal areas, a first switching element for passing an electric current from the input terminal area to the output terminal area, a control unit for controlling the first switching element, a first sensor device that detects opening of the covering device, where the first sensor device is connected to the control unit and the control unit is configured to operate the first switching element.

Abstract: A microwave generator and/or methods thereof. A microwave generator may include a plurality of connected sequential sections in cascade. A microwave generator may include a first section and an output section. Each section may include an intermediate conductor, an upper conductor and a lower conductor. A first isolating material having a first thickness may be connected between an intermediate conductor and an upper conductor. A second isolating material having a second thickness may be connected between an intermediate conductor and a lower conductor. A switch may be connected between an intermediate conductor and an upper conductor and/or a lower conductor, forming a switched thickness and an unswitched thickness. The unswitched thickness of an output section is larger than the unswitched thickness of the first section and the increase in unswitched thickness from the first section to the output section includes a monotonic increase.

Abstract: A switching device includes a first switch disposed between a power source voltage and an intermediate node, the first switch forming a current path on the basis of an input signal, a second switch disposed between the intermediate node and a ground, the second switch forming a current path on the basis of a voltage of the intermediate node, and a transmission gate receiving the input signal, the transmission gate outputting the input signal on the basis of the voltage of the intermediate node.

Abstract: A power switch circuit includes first and second power switches, first to fourth inverters, first and second diodes. An input of the first inverter is connected to a first positive terminal of the first power switch. An input of the second inverter is connected to an output of the first inverter. A cathode of the first diode is connected to an output of the second inverter. An anode of the first diode is connected to a power-on terminal of a motherboard. An input of the third inverter is connected to a second positive terminal of the second power switch. An input of the fourth inverter is connected to an output of the third inverter. A cathode of the second diode is connected to an output of the fourth inverter. An anode of the second diode is connected to the power-on terminal.

Abstract: A control circuit for a washing machine that avoids contact bounce short circuit failures is provided. A washing machine that utilizes an induction motor including a starting winding used to start rotation of the motor at the beginning of a cycle. Such washing machines require that the motor be operated in both directions during different cycles. To enable such operation, a mechanical timer uses a pair of single pole, double throw switches in a switching assembly to reverse the L1 and neutral connections to the starter winding. To avoid the contact shorting problem, the control wiring runs either the L1 or neutral side of the voltage source, or both, through the centrifugal switch to open the input contact(s) once the motor has reached its operating speed. Then, if the switching assembly has L1 and N contacts touching at the same time, it will not result in a dead short.

Abstract: A method and apparatus for selectively charging a secondary voltage rail includes selectively and partially charging a secondary voltage rail using at least one soft start power gate switch and using an initial power control indicator. The partially charged secondary voltage rail is selectively charged, using at least one main power gate switch, based on the initial power control indicator and a detected voltage on the secondary voltage rail. When the initial power control indicator is in a state representative of an initial power up command and when the detected voltage is greater than or equal to a predetermined voltage level, at least one main power gate switch is closed thereby charging the secondary voltage rail.

Abstract: An analog switch having a low capacitance is achieved. Potentials of input/output terminals of the analog switch and a well potential and a gate potential of an NMOS switching device are operated in synchronization via level shift buffers, thereby cancelling parasitic capacitances present between these elements.

Abstract: In one embodiment, a semiconductor circuit for coupling a first node to a second node includes a first transistor having a first terminal coupled to the first node, a second terminal coupled to the second node, and a control terminal coupled to a control node. The circuit also includes a level shifting circuit having a series diode for coupling a bulk terminal of the first transistor to the control node, and a supply coupling circuit coupled between a first power supply node and the control node.

Abstract: A power control integrated circuit is provided having a voltage switching device and a retention switching device that has an input from an overdrive voltage supply such that in a retention enabled configuration a retention switching device is switched on more strongly relative to being both coupled to and driven from the voltage supply input signal associated with the voltage switching device. An overdriven retention switching device is provided as a separate entity from the voltage switching device itself and a computer readable storage medium is provided storing a data structure comprising a standard cell circuit definition for use in generating validating the circuit layout of a circuit cell of an integrated circuit. The circuit cell comprising an overdriven retention switching device.

Abstract: A high voltage switch circuit of a semiconductor device includes a buffer circuit configured to output a control signal in response to an input signal and a boost circuit configured to output a block selection signal to an output terminal by connecting a current path between a voltage supply node and the output terminal in response to the control signal, and to block the current path in case where the control signal falls from a high voltage level to a low voltage level.

Abstract: A voltage supply circuit includes a switching circuit to switch among a plurality of driving voltages including a first driving voltage and a second driving voltage lower than the first driving voltage based on an operation mode of a display apparatus and control at least one of a switching speed and a switching timing so that one of a first switching speed and a first switching timing to the first driving voltage becomes faster than a corresponding one of a second switching speed and a second switching timing to the second driving voltage.

Abstract: Nitrogen-doped MgO insulating layers exhibit voltage controlled resistance states, e.g., a high resistance and a low resistance state. Patterned nano-devices on the 100 nm scale show highly reproducible switching characteristics. The voltage levels at which such devices are switched between the two resistance levels can be systematically lowered by increasing the nitrogen concentration. Similarly, the resistance of the high resistance state can be varied by varying the nitrogen concentration, and decreases by orders of magnitude by varying the nitrogen concentrations by a few percent. On the other hand, the resistance of the low resistance state is nearly insensitive to the nitrogen doping level. The resistance of single Mg50O50-xNx layer devices can be varied over a wide range by limiting the current that can be passed during the SET process. Associated data storage devices can be constructed.

Abstract: A method of driving an array of switches comprising supplying the same drive signal to a first drive terminal of a plurality of the switches of an array and supplying second drive signals to a second drive terminal of each of the plurality of switches, the second drive signal supplied to a first of the switches being of a form selected to close the first switch, the form of the second drive signal supplied to the remaining switches being selected to prevent false activation of those switches.

Abstract: A method of monitoring an electrical power switching module of an underwater installation, the power switching module being operable to switch AC power in use, comprises the steps of: a) measuring at least one operating parameter of the power switching module and producing a signal indicative of the measured parameter; b) if the signal is not digital, then converting the signal into a digital format; and c) outputting the digital signal on a bus.

Abstract: Apparatus for controlling an integrated circuit comprises a power control device for controlling the power to at least part of the integrated circuit, the power control device is connected to a first input, for receiving a power-down signal, and a second input, for receiving a power-up signal, the power control device is adapted to power-up the at least part of the integrated circuit if a power-up signal is received at the second input when the at least part of the integrated circuit is in a powered-down state, and the power control device is further adapted to maintain the at least part of the integrated circuit in the powered-up state regardless of any signal received at the second input when the at least part of the integrated circuit is in a powered-up state, the apparatus is arranged so that the second input is also connected to a component of the integrated circuit and the apparatus comprising means for sending a signal to the component of the integrated circuit via the second input when the at least pa

Abstract: A resistor-ladder voltage generator circuit is provided, which controls so that k switches among consecutive (k+1) switches out of a plurality of switches connected to the resistor ladder circuit are simultaneously set to an ON state, and which temporally switches the value of k. This allows voltage waveforms having different slopes to be arbitrarily obtained, ranging from a voltage waveform having a small slope to a voltage waveform having a large slope, thereby improving the resolution of a generated voltage waveform without increasing the numbers of resistors and switches, while A/D conversion time is not increased even if the number of bits is increased. In addition, by using this voltage generator circuit as a ramp generator circuit, and by dynamically switching the slope of the ramp wave, acceleration of an image sensor is achieved.

Abstract: A switching circuit includes a first switching module, a second switching module, a first relay module, a second relay module, and a processing module. The first switching module includes a switch and a first transistor. The base of the first transistor functions as a first reset terminal. The second switching module includes a second transistor. An output terminal of the second relay module functions as a second reset terminal. Two input terminals of the processing module are connected to the first and second reset terminals respectively. The processing module resets a system with a first type or a second type according to voltages of the first and second reset terminals.

Abstract: Embodiments related to operating a high-side switch in a safety-related application are described and depicted.

Abstract: A low-side driver circuit includes a low-side driver integrated circuit and a controllable switch. The low-side driver integrated circuit is responsive to an on-off command input signal to selectively operate in an ON mode and an OFF mode. The controllable switch is responsive to the on-off command signal to selectively operate in a CLOSED mode and an OPEN mode. The low-side driver integrated circuit and the controllable switch are configured to simultaneously operate in the ON mode and the CLOSED mode, respectively, and in the OFF mode and the OPEN mode, respectively. During a voltage transient the potential will be realized across the controllable switch, thus protecting the lower voltage rated low-side integrated circuit.

Abstract: A hybrid switch circuit includes a hybrid switch that couples an input conductor connected to an AC power supply to an output conductor connected to a load. The hybrid switch includes a power semiconductor in parallel with an electromagnetic relay. A control circuit turns on the hybrid switch by turning on the power semiconductor at a zero-voltage crossing of the AC voltage to provide a conductive path and then closing the relay to provide a conductive bypass path that bypasses the power semiconductor. The control circuit turns off the hybrid switch by opening the relay and subsequently turning off the power semiconductor at a zero crossing of the load current. The control circuit operates in response to at least one switch control signal that indicates whether an operating fault condition exists.

Abstract: A method for using pins in different mode during different time is provided. The method is able to make at least one pin of a SOC be used in a first interface mode or a second interface mode during different time; wherein the SOC comprises a first interface circuit, a first pin, a second interface circuit, and a second pin; the first interface circuit comprises a first bidirectional PAD unit, a first signal interface unit of the first interface mode and a interface unit of the second interface mode; the second interface circuit comprises a second bidirectional PAD unit, a second signal interface unit of the first interface mode. The method comprises: selecting the output of the first signal interface unit or the output of the interface unit of the second interface mode to be connected with the first pin through the first bidirectional PAD unit during different time.

Abstract: The invention discloses a photoelectric energy transducing apparatus, which includes a photoelectric energy transducing module and a semiconductor switch. The photoelectric energy transducing module includes a photoelectric energy transducing semiconductor structure, a first positive electrode, and a negative electrode. The semiconductor switch includes a second positive electrode and a second negative electrode. The second positive electrode is electrically connected to the first negative electrode. The second negative electrode is electrically connected to the first positive electrode. When light radiates onto the photoelectric energy transducing semiconductor structure, an electromotive force is induced between the first positive electrode and the first negative electrode, and the electromotive force provides a reverse bias on the semiconductor switch so that the semiconductor switch is cut off.

Abstract: One interface chip and a plurality of core chips are electrically connected via a plurality of through silicon vias. A data signal of a driver circuit is input into the core chip via any one of the through silicon vias. An output switching circuit activates any one of tri-state inverters and selects one of the through silicon vias. The tri-state inverters amplify the data signal and transmit it to the through silicon via. Similarly, an input switching circuit activates any one of tri-state inverters. These tri-state inverters also amplify the data signal transmitted from the through silicon via and supply it to the receiver circuit.

Abstract: A system for addressing electrical signals is disclosed, comprising an electromagnetically conductive control element, at least one control signal, at least one electromagnetic pulse modulator associated with the control element, and a threshold element positioned proximate to the control element, having an electromagnetic resistance that is conditional and changes as a result of fluctuations in the electromagnetic field of the control element.

Abstract: The invention relates to a receiving circuit for transmission through interconnections used for sending a plurality of electrical signals. Each of the output signals of the receiving circuit produced by the receiving circuit of the invention is delivered by an output of a combining circuit having 4 inputs and 4 outputs. Each signal terminal of the receiving circuit is connected to a first input terminal of a differential circuit, the differential circuit also having a second input terminal and a single output terminal. The common terminal of the receiving circuit is connected to the second input terminal of each of the differential circuits. Each input of the combining circuit is coupled to the output terminal of one of the differential circuits. Each of the output signals of the receiving circuit is a linear combination of the voltages between one of the signal terminals and the common terminal.

Abstract: In some embodiments, an input/output (I/O) circuit sends and receives a high-level signal and a low-level signal via a coupling capacitance provided on a communication line. The I/O circuit includes a receiving portion including a first detection circuit arranged to detect one of the signals and a second detection circuit arranged to detect the other signal, a transmitting portion including a three-value output circuit configured to output one of signals consisting of a high-level signal, a low-level signal, and a high impedance signal, and a control circuit configured to control the receiving portion and the transmitting portion. The control circuit judges a level of an inputted signal depending on detection results of the first detection circuit and the second detection circuit in a receiving state and controls an output value of the three-value output circuit in a transmitting state.

Abstract: Nanotube switching devices having nanotube bridges are disclosed. Two-terminal nanotube switches include conductive terminals extending up from a substrate and defining a void in the substrate. Nantoube articles are suspended over the void or form a bottom surface of a void. The nanotube articles are arranged to permanently contact at least a portion of the conductive terminals. An electrical stimulus circuit in communication with the conductive terminals is used to generate and apply selected waveforms to induce a change in resistance of the device between relatively high and low resistance values. Relatively high and relatively low resistance values correspond to states of the device. A single conductive terminal and a interconnect line may be used. The nanotube article may comprise a patterned region of nanotube fabric, having an active region with a relatively high or relatively low resistance value. Methods of making each device are disclosed.

Abstract: A semiconductor integrated circuit 1 according to an exemplary embodiment of the present invention is including: a first wire that is supplied with a clock signal; a second wire that is supplied with the clock signal, the clock signal is supplied or shut off independently of the clock signal supplied to the first wire; a first area that includes a first mesh shape wire supplied with the clock signal from the first wire; a second area that includes a second mesh shape wire supplied with the clock signal from the second wire; and a switching circuit that switches to a conduction or a shutoff of a signal transmitted between the first mesh shape wire and the second mesh shape wire.

Abstract: An electronic device connectable with an electronic accessory according to the present disclosure is provided. The electronic device includes a jack, a data signal transceiving unit, a measuring unit, a switching unit and a processing unit. The jack is adapted to receive an insertion of a plug of the electronic accessory and has a first contact terminal adapted to be in contact with a first contact of the plug. The data signal transceiving unit is adapted to transmit to or receive from the electronic accessory a data signal through the first contact terminal of the jack. The measuring unit is adapted to measure a parameter resulted from the contact of the first contact terminal of the jack with the first contact of the plug through the first contact terminal when the plug is inserted into the jack. The switching unit is adapted to selectively connect the first contact terminal of the jack electrically to the data signal transceiving unit or the measuring unit.

Abstract: In an integrated circuit (IC) adapted for use in a stack of interconnected ICs, interrupted through-silicon-vias (TSVs) are provided in addition to uninterrupted TSVs. The interrupted TSVs provide signal paths other than common parallel paths between the ICs of the stack. This permits IC identification schemes and other functionalities to be implemented using TSVs, without requiring angular rotation of alternate ICs of the stack.

Abstract: A method and apparatus for anti-islanding of distributed power generation systems having an inverter comprising a phase locked loop (PLL), a phase shift generator for injecting a phase shift into the PLL during at least one sample period, and a phase error signature monitor for monitoring at least one phase error response of the PLL during the at least one sample period.

Abstract: There has been a problem that the distortion characteristic of a switch circuit for a high frequency is deteriorated. A switch circuit in accordance with one aspect of the present invention includes a transistor connected in series between input and output terminals, a control terminal that receives a signal to control the conductive state of the transistor, a first resistor connected between the control electrode of the transistor and the control terminal, and a series circuit of a diode and a second resistor, the series circuit being connected in parallel with the first resistor between the control terminal and the control electrode of the transistor.

Abstract: Techniques are disclosed for reducing off-state leakage current in a differential switching device. The techniques can be embodied, for example, in a method that includes receiving a differential input signal at a differential input of each of a primary switch and a dummy switch. In an enabled-state of the device, the method further includes passing the differential input signal to a differential output of the primary switch. In a disabled-state of the device, the method further includes canceling off-state leakage current at the differential output of the primary switch, by virtue of the dummy switch having its differential output reverse-coupled to the differential output of the primary switch. The method may further include preventing the dummy switch from passing signals other than off-state leakage signals. The techniques can be embodied, for instance, in a switching device.

Abstract: Switches with improved biasing and having better isolation and reliability are described. In an exemplary design, a switch is implemented with a set of transistors, a set of resistors, and an additional resistor. The set of transistors is coupled in a stacked configuration, receives an input signal, and provides an output signal. The set of resistors is coupled to the gates of the set of transistors. The additional resistor is coupled to the set of resistors and receives a control signal for the set of transistors. The resistors reduce signal loss through parasitic capacitances of the transistors when they are turned on. The resistors also help split the signal swing of the input signal approximately evenly across the transistors when they are turned off, which may improve reliability of the transistors. The switch may be used in a switchplexer, a power amplifier (PA) module, etc.

Abstract: Methods, circuits and systems for converting of a non-predicated asynchronous netlist to a predicated asynchronous netlist are described. These may operate to identify one or more portions of an asynchronous netlist corresponding to a partially utilized portion of an asynchronous circuit. The asynchronous netlist may be modified to control the partially utilized portion. Additional methods, circuits, and systems are disclosed.

Abstract: A signal processing device such as an RFIC having a function of holding therein control data, enabling stable operation of an integrated circuit because of suspension of power supply during the intermittent reception suspension period in the standby mode, and enabling further improvement of power saving. A portable communication terminal device and a radio communication system are also provided. The signal processing device has an RFIC unit (12) and an ASIC unit (13) connected to the RFIC unit (12) via an input/output buffer circuit (140), making control such that power supply to the RFIC unit (12) is suspended during the reception suspension period during which signaling information is not received in the standby mode and power is supplied to the RFIC unit (12) when signaling information is received, and including an SPI therein.