Abstract: A probe includes a contact member brought into contact with an object to be tested. Contact particles having conductivity are uniformly distributed in the contact member. A part of the contact particles protrude from a surface of the contact member on the side of the object to be tested. A conductive member having elasticity is placed on a surface of the contact member on the opposite side to the object to be tested. The probe further includes an insulating sheet including a through hole and the contact member is so positioned as to penetrate the through hole. An upper part of the contact member is formed of a conductor which does not include the contact particles. An additional conductor is placed on a surface of the conductor on the side opposite to the object to be tested.

Abstract: A first device and a second device can include at least one alignment feature and at least one corresponding constraint. The alignment feature and the constraint can be configured to align the first device and the second device when the alignment feature is inserted into the constraint. The alignment feature and the constraint can be further configured to direct relative movement between the first device and the second device due to relative thermal expansion or contraction between the first device and the second device. The directed relative movement can keep the first device and the second device aligned over a predetermined temperature range.

Abstract: An improved system for capacitive testing electrical connections in a low signal environment. The system includes features that increase sensitivity of a capacitive probe. One feature is a spacer positioned to allow the probe to be partially inserted into the component without contacting the pins. The spacer may be a collar on the probe that contacts the housing of the component, contacts the substrate of the circuit assembly, or both. In some other embodiments, the spacer may be a riser extending beyond the surface of the sense plate that contacts the component, a riser portion of the component, or a combination of both. The spacer improves sensitivity by establishing a small gap between a sense plate of the probe and pins under test without risk of damage to the pins. A second feature is a guard plate of the probe with reduced capacitance to a sense plate of the probe. Reducing capacitance also increases the sensitivity of the probe.

Abstract: The invention relates to a full grid cassette for a parallel tester for testing a non-componented printed circuit board, to a spring contact pin for such a full grid cassette and to an adapter for a parallel tester for testing a non-componented printed circuit board.

Abstract: A contactor is brought into contact with and separated from an electrode formed on a test target, and includes an elastic member that overlaps with a conductive member having a contact and which urges the contact in a pressing direction. The elastic member is fixed at a predetermined fixed position in a state projecting to the outside of a main body member and the conductive member is electrically connected from the outside of a housing of the main body member of the contactor.

Abstract: Methods and apparatus are provided herein for time-resolved analysis of the effect of a perturbation (e.g., a light or voltage pulse) on a sample. By operating in the time domain, the provided method enables sub-microsecond time-resolved measurement of transient, or time-varying, forces acting on a cantilever.

Abstract: An embodiment of a method for testing an integrated circuit comprises a first step for determining at least one of a group selected from whether or not the chuck top receiving the integrated circuit exists near a probe card which transmits and receives electrical signals to and from the integrated circuit, whether or not the integrated circuit is under testing, and whether or not the probe card has a given temperature, and a second step for adjusting power for heating to be supplied to a heating element provided in the probe card according to the determination result in the first step.

Abstract: A measuring device includes: a probe applying a voltage to an electrode of an element; and a supplying member supplying an insulating liquid to a contact portion between the electrode and the probe via a surface of the probe. Accordingly, the insulating liquid can be securely supplied to the contact portion between the electrode and the probe via the surface of the probe positioned relative to the electrode.

Abstract: The present invention has an object to provide an electronic circuit testing apparatus that is preferable for testing an electronic circuit which carries out communications between substrates based on inductive coupling and is capable of testing the electronic circuit without using test pads, wherein a probe 15 is caused to intervene in a communications channel composed by inductive coupling based on the first and second transmitter coils 21a, 21b; and the first and second receiver coils 23a, 23b, and an LSI is tested by a tester 11, buffers 12 and 13, and a Tx/Rx switch 14. Accordingly, it is not be necessary for that the electronic circuit testing apparatus is provided with a needle that touches pads and leads of the electronic circuit, and the service life there can be lengthened.

Abstract: A method of testing a multi-die integrated circuit (IC) can include testing an inter-die connection of the multi-die IC. The inter-die connection can include a micro-bump coupling a first die to a second die. The method can include detecting whether a fault occurs during testing of the inter-die connection. Responsive to detecting the fault, the multi-die integrated circuit can be designated as including a faulty inter-die connection. Also described is an integrated circuit that includes a first die, a second die on which the first die may be disposed, a plurality of inter-die connections coupling the first die to the second die, and a plurality of probe pads, where each probe pad is coupled to at least one of the inter-die connections.

Abstract: The present idea refers to a needle head, its use in a probe arrangement, and a method for electrically contacting multiple electronic components. The needle head comprises a body with a lower surface, needle electrodes emerging from the lower surface, and multiple outlets arranged in the lower surface. A channel is arranged between an inlet in the body and the outlets for conveying a medium from the inlet to the outlets. By this means, electronic components arranged in close distance under the lower surface of the needle head are directly exposed to the medium which provides a test environment during a test of the electronic components.

Abstract: A digital circuit block includes first to fourth conducting segments, a digital logic, first and second conducting layers, and a dielectric layer. The first and second conducting segments are coupled to first and second supply voltages, respectively. The digital logic and dielectric layer are between the first and second conducting segments. The third conducting segment includes a first end electrically connected to the first conducting segment, a second end not electrically connected to the second conducting segment, and a first portion located at the first conducting layer. The fourth conducting segment includes a first end electrically connected to the second conducting segment, a second end not electrically connected to the first conducting segment, and a second portion located at the second conducting layer. The first and second portions and dielectric layer are formed a first capacitive element to reduce the supply voltage drop between the first and second supply voltages.

Abstract: High-frequency resonance method is used to measure magnetic parameters of magnetic thin film stacks that show magnetoresistance including MTJs and giant magnetoresistance spin valves. The thin film sample can be unpatterned. Probe tips are electrically connected to the surface of the film (or alternatively one probe tip can be punched into the thin film stack) and voltage measurements are taken while injecting high frequency oscillating current between them to cause a change in electrical resistance when one of the layers in the magnetic film stack changes direction. A measured resonance curve can be determined from voltages at different current frequencies. The damping, related to the width of the resonance curve peak, is determined through curve fitting. In embodiments of the invention a variable magnetic field is also applied to vary the resonance frequency and extract the magnetic anisotropy and/or magnetic saturation of the magnetic layers.

Abstract: In an embodiment, a chuck to support a solar cell in hot spot testing is provided. This embodiment of the chuck comprises a base portion and a support portion disposed above the base portion. The support portion is configured to support the solar cell above the base portion and to define a cavity between a bottom surface of the solar cell and the base portion that thermally separates a portion of the bottom surface of the solar cell from the base portion.

Abstract: A probe system for providing signal paths between an integrated circuit (IC) tester and input/output, power and ground pads on the surfaces of ICs to be tested includes a probe board assembly, a flex cable and a set of probes arranged to contact the IC's I/O pads. The probe board assembly includes one or more rigid substrate layers with traces and vias formed on or within the substrate layers providing relatively low bandwidth signal paths linking the tester to probes accessing some of the IC's pads. The flex cable provides relatively high bandwidth signal paths linking the tester to probes accessing others of the IC's pads.

Abstract: A method of testing a semiconductor device includes a conductive foreign matter test step of measuring the resistance value between the first and second conductive patterns to determine whether conductive foreign matter is present between the first and second conductive patterns, a first open circuit test step of measuring the resistance value between two points on the first conductive pattern to determine whether there is an open circuit in the first conductive pattern, and a second open circuit test step of measuring the resistance value between two points on the second conductive pattern to determine whether there is an open circuit in the second conductive pattern. The measurement of the resistance value in each of the test steps is accomplished by pressing probes vertically against the first conductive pattern or the second conductive pattern or both.

Abstract: A method is provided for design and programming of a probe card with an on-board programmable controller in a wafer test system. Consideration of introduction of the programmable controller is included in a CAD wafer layout and probe card design process. The CAD design is further loaded into the programmable controller, such as an FPGA to program it: (1) to control direction of signals to particular ICs, even during the test process (2) to generate test vector signals to provide to the ICs, and (3) to receive test signals and process test results from the received signals. In some embodiments, burn-in only testing is provided to limit test system circuitry needed so that with a programmable controller on the probe card, text equipment external to the probe card can be eliminated or significantly reduced from conventional test equipment.

Abstract: Disclosed is a probe (21) for an oscilloscope (24) comprising a multi-stage transistor amplifier (26) which is used as an impedance transformer and the output of which is connected to the oscilloscope (24). An electronic switching device (27) that can be remote-controlled by means of the oscilloscope (24) is assigned to the input (Vin) of the amplifier (26). Said electronic switching device (27) allows frame potential or a reference voltage to be alternatively connected to the amplifier input (Vin) instead of the measuring-circuit voltage of the measuring tip (22) such that the direct voltage offset is measured when the amplifier input (Vin) is connected to frame while the gain error in the oscilloscope (24) is measured when the reference voltage is applied, and said direct voltage offset or gain error is adequately taken into account when the measuring-circuit voltage in the oscilloscope is evaluated.

Abstract: In accordance with an embodiment, a probe card comprises a contact pad interface comprising front side contacts and back side contacts electrically coupled together. The front side contacts are arranged to simultaneously electrically couple respective bumps of a plurality of dies on a wafer, and the back side contacts are arranged to electrically couple respective contacts of a testing structure.

Abstract: Identifying a signal on a printed circuit board (‘PCB’) under test, including a test probe with a radio transmitter and transmitter antenna, the test probe positioned with the transmitter antenna at a test point on the PCB, the test probe transmitting a radio signal; at least two radio receivers, each receiver having a receiver antenna, each receiver antenna positioned at predetermined, separate physical locations with respect to the PCB, the receivers coupled to at least one signal strength meter, each receiver receiving the transmitted radio signal; and a signal-identifying controller connected to the signal strength meter, the signal-identifying controller reading, from the signal strength meter, signal strengths of the transmitted radio signal as received at the radio receivers; determining, in dependence upon the read signal strengths, a test signal identifier; and displaying the test signal identifier.

Abstract: A display apparatus includes a display panel including a plurality of pixels, a plurality of first lines and a plurality of second lines, a plurality of first pads electrically connected to the first lines, respectively, where the first pads are divided into a first group and a second group, a plurality of pads including a second pad, a third pad, a fourth pad and a fifth pad, a first shorting bar configured to be connected to the first group of the first pads and to be connected between the second pad and the fourth pad during a test process of the first lines, and a second shorting bar configured to be connected to the second group of the first pads and to be connected between the third pad and the fifth pad during the test process of the first lines.

Abstract: A probe card is provided. The probe card can serialize, analogize and divide a digital signal by a analog-to-digital converter (ADC), a digital-to-analog converter (DAC), and a power divided unit respectively. The probe card can increase signal channels, and is not restricted by signal channels of a tester to test more DUTs simultaneously. Moreover, the probe card has fine impedance matching and channels separating to raise testing efficiency and reduce signal loss.

Abstract: The terminals of a device under test are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane that includes a top contact plate facing the device under test, a bottom contact plate facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The top and bottom pins contact each other at an interface that is inclined with respect to the membrane surface normal. When compressed longitudinally, the pins translate toward each other by sliding along the interface. The sliding is largely longitudinal, with a small and desirable lateral component determined by the inclination of the interface.

Abstract: A semiconductor inspecting device comprises a probe card for transmitting a signal or power supply to semiconductor wafers having one or more subject chips formed therein, and is constituted such that the first semiconductor wafer faces the first face of the probe card and such that the second semiconductor wafer faces the second face of the probe card on the opposite side of the first face. The probe card includes one or more inspecting chips, which can perform non-contact transmissions with the first subject chip in the first semiconductor wafer and the second subject chip in the second semiconductor wafer.

Abstract: A tester for a testing a Hard Disk Drive (HDD) flex circuit prior to electrical installation of a Head Gimbal Assembly (HGA) includes a shorting block that makes electrical contact to the bondpads on the sample. The shorting block includes one or more electrical contacts that are electrically grounded and have a size and/or configuration to contact the bondpads as well as the surface of the sample around the bondpads to accommodate positioning tolerances of the sample under test, without need for optics, precise probes, or precision stages. The electrical contacts of the shorting block may be, e.g., a matrix of pogopins or a flexible electrically-conductive material. During testing, the bondpads are shorted together and to ground with the shorting block while it is determined whether Short failures are properly detected. While the shorting block is not engaged with the bondpads, it is determined whether open failures are properly detected.

Abstract: A laser diode includes a junction surface configured to interface with an integrated optics slider. Cathode and anode electrical junctions are disposed on the junction surface. The cathode and anode electrical junctions are configured for electrical and mechanical coupling to the integrated optics slider. At least one test pad is disposed on the junction surface that is physically separate from and electrically coupled to one of the cathode and anode electrical junctions. The test pad is configured to be contacted by a test probe and is not configured for electrical or mechanical coupling to the integrated optics slider.

Abstract: There is provided a method and a device for accurately detecting the contact of a mechanical probe with a contact object. The contact detecting device comprises a mechanical probe movable for being in contact with a contacted object, a charged particle beam source which generates a charged particle beam applied to the contacted object, a detector for detecting secondary particles or reflected particles from the contacted object, a calculating device which calculates, from a detection signal from the detector, a feature quantity of a shadow of the mechanical probe projected on the contacted object, and a control device which controls the operation of the mechanical probe. The calculating device calculates, as the feature quantity of the shadow of the mechanical probe, a shadow depth S(x, y), and obtains an evaluation value J(z), showing a distance between the contacted object and the mechanical probe, based on the shadow depth S(x, y).

Abstract: A test system that provides an output signal for analysis without requiring the test hardware to be idle during a settling interval. The test system includes a preprocessor that identifies the near-DC drift that occurs in the output signal and then adjusts the output signal to remove the near-DC drift. A set of values representing the near-DC drift at each of multiple times during the acquisition of a signal for analysis may be computed and used to model a settling profile of the signal by fitting a curve to the set of values. The model of the settling profile may then be subtracted from samples representing the output signal to provide an adjusted signal for further analysis.

Abstract: Method and apparatus for electrically charactering an integrated circuit (IC) are described. In an example, a data line in conductive interconnect of the IC is identified that is failing. First and second vertical trenches are milled in the IC along the data line to expose respective first and second cross-sections of the conductive interconnect having the data line. First and second probes are placed in contact with the data line in the first and second vertical trenches, respectively. A determination is made whether the data line is open or shorted between the first and second vertical trenches using an electrical measurement device coupled to the first and second probes.

Abstract: In an embodiment, a chuck to support a solar cell in hot spot testing is provided. This embodiment of the chuck comprises a base portion and a support portion disposed above the base portion. The support portion is configured to support the solar cell above the base portion and to define a space between a bottom surface of the solar cell and the base portion that thermally separates a portion of the bottom surface of the solar cell from the base portion.

Abstract: A probe card assembly can comprise a first source of compliance and a second source of compliance. The probe card assembly can further comprise a controller, which can be configured to apportion a total compliance demand placed on the probe card assembly between the first source of compliance and the second source of compliance.

Abstract: Embodiments of the invention describe forming a set of probes using semiconductor regions each including a plurality of vias. A first set of probe segments may be formed from a first set of vias on a first semiconductor region. A second set of probe segments may be formed from a second set of vias on a second semiconductor region and bonded to the first set of probe segments. At least one spring comprising a dielectric material may be formed to couple the first set of probe segments, while a set of metal tips disposed on the second set of probe segments.

Abstract: An exemplary die carrier is disclosed. In some embodiments, the die carrier can hold a plurality of singulated dies while the dies are tested. The dies can be arranged on the carrier in a pattern that facilities testing the dies. The carrier can be configured to allow interchangeable interfaces to different testers to be attached to and detached from the carrier. The carrier can also be configured as a shipping container for the dies.

Abstract: A test-signal detection system provides a probe, a first transmission line and a measuring device. The probe is connected to the measuring device by the first transmission line. The first transmission line transmits broadband test signals to the measuring device. The test-signal detection system provides at least one further transmission line. The probe is additionally connected to the measuring device at least indirectly by the at least one further transmission line. The at least one further transmission line transmits DC-voltage test signals to the measuring device.

Abstract: A voltage compensation assembly adapted for apparatus having a prober for contacting the electronic elements on a substrate is described. The voltage compensation assembly includes a controller connected to the prober and adapted for active voltage compensation, and a voltage measuring unit connected to the controller and for measuring a voltage on the substrate.

Abstract: The present invention discloses a pad structure and a method for testing a integrated circuit. The structure includes the first pads and the second pads, where the first pads are distributed over a peripheral portion of the integrated circuit and connected with lead-out wires of the integrated circuit, and the second pads are connected with a metal line at a circuit portion in the integrated circuit and are sized larger than the minimum characteristic dimension of the metal line and of the integrated circuit and smaller than the size of the first pads. The pad structure and method can position a test portion with improved efficiency. Correspondingly, a probe can be used to position the test portion with improved accuracy as well.

Abstract: The present disclosure provides a semiconductor test system. The semiconductor test system includes a wafer stage to hold a wafer having a plurality of light emitting devices (LEDs); a probe test card operable to test each test field of the wafer; and a light detector integrated with the probe test card to collect light from a LED of the wafer.

Abstract: An integrated circuit chip includes a mainline function logic path communicatively connected to a first input/output (I/O) pin, a test logic path communicatively connected to the first I/O pin, a latch disposed between the communicative connection between the test logic function path and the first I/O pin, a second I/O pin communicatively connected to the latch, the second I/O pin operative to send a signal operative to change a state of the latch.

Abstract: A probe is made to contact an electrode terminal in an electric circuit or an electronic part for an electric measurement of the electric circuit or the electronic part. The probe includes a terminal portion which is brought in contact with the electrode terminal at one end of the probe, a spring portion in which U-shaped unit portions are arrayed in a zigzag formation, and a housing portion which surrounds the spring portion. The probe is formed of a sheet of a sheet-metal plate which is bent multiple times, the sheet-metal plate having a predetermined configuration in which a portion corresponding to the terminal portion, a portion corresponding to the spring portion, and a portion corresponding to the housing portion are continuously linked together.

Abstract: A socket for electrically connecting conductive patterns of a circuit board and electrodes of an integrated circuit, the socket includes a main body, a plurality of hollow probes that connect conductive patterns of the circuit board and electrodes of the integrated circuit, the plurality of hollow probes provided to the main body, and an outlet that discharges a refrigerating medium passing through each of the hollow probes, the outlet provided on a side of the main body.

Abstract: A method of topside only dual-side testing of an electronic assembly includes providing a singulated through substrate via (TSV) die flip chip attached to a die support including a package substrate. The TSVs on the TSV die extend from its frontside to contactable TSV tips on its bottomside. The TSVs on the frontside of the TSV die are coupled to embedded topside substrate pads on a top surface of the ML substrate. The die support includes lateral coupling paths between at least a portion of the embedded topside substrate pads and lateral topside pads on a topside surface of the die support lateral to the die area. The contactable TSV tips are contacted with probes to provide a first topside connection to the TSVs, and the lateral topside pads are contacted with probes to provide a second topside connection. Dual-side testing across the electronic assembly is performed using the first and second topside connections.

Abstract: A pair of signal transmission lines includes an aggressor line, a victim line, a first test pad, and a second test pad. The first test pad is in the aggressor line. The victim line is parallel to the aggressor line. A second test pad is in the victim line. The first test pad, on the aggressor line, is misaligned with the second test pad, on the victim line, to reduce the incidence and amplitude of any crosstalk generated.

Abstract: An exemplary voltage testing device includes a testing circuit and an oscillograph. The testing circuit includes a filtering unit, a rectifier unit, and a voltage dividing unit. The filtering unit receives and filters an alternating current (AC) voltage. The rectifier unit receives the filtered AC voltage and rectifies the filtered AC voltage into a first direct current (DC) voltage. The voltage dividing unit receives the first DC voltage, and dividess the first DC voltage into a second DC voltage equaling an effective value of the AC voltage, thereby the second DC voltage is tested and displayed on the oscillograph.

Abstract: A contactor includes: a silicon layer composing a part of beam part with a rear end side provided at a base part and with a front end side sticking out from the base part; SiO2 layer as an insulating layer formed on the silicon layer; and a conductive layer formed on the SiO2 layer.

Abstract: Provided is an active non-contact probe card including a carrier, a support base, a piezoelectric material layer, an active sensor array chip and a control circuit. The support base is disposed on the carrier. The piezoelectric material layer is connected with the support base. The position of the active sensor array chip with respect to the carrier is determined according to the thicknesses of the support base and the thicknesses of the piezoelectric material layer. A control circuit provides a control voltage to the piezoelectric material layer to control the thickness of the piezoelectric material layer, so as to adjust the position of the active sensor array chip with respect to the carrier.

Abstract: A loading card includes a printed circuit board, first and second connection portions. The first connection portion includes first and second voltage pins, and a first ground pin. The second connection portion includes third and fourth voltage pins, and a second ground pin. The loading card also includes a first voltage signal test point connected to the first and third voltage pins, a second voltage signal test point connected to the second and fourth voltage pins, a first ground signal test point connected to the first and second ground signal test points, and a second ground signal test point connected to the first and second ground signal test points.

Abstract: A system for making high frequency measurements on a DUT includes a high frequency measurement instrument; a plurality of DUT probes; a first coaxial cable having a center conductor and a coaxial conductor for connection between the instrument and a first DUT probe; and a second coaxial cable having a center conductor and a coaxial conductor for connection between the instrument and a second DUT probe, at least one of the first and second cables being selectively shortable between the respective center conductor and coaxial conductor at a location near the respective DUT probe.

Abstract: Disclosed is a method for testing multi-chip stacked packages. Initially, one or more substrate-less chip cubes are provided, each consisting of a plurality of chips such as chips stacked together having vertically connected with TSV's where there is a stacked gap between two adjacent chips. Next, the substrate-less chip cubes are adhered onto an adhesive tape where the adhesive tape is attached inside an opening of a tape carrier. Then, a filling encapsulant is formed on the adhesive tape to completely fill the chip stacked gaps. Next, the tape carrier is fixed on a wafer testing carrier in a manner to allow the substrate-less chip cubes to be loaded into a wafer tester without releasing from the adhesive tape. Accordingly, the probers of the wafer tester can be utilized to probe testing electrodes of the substrate-less chip cubes so that it is easy to integrate this testing method in TSV fabrication processes.

Abstract: A probe for testing electronic properties of a circuit board by contacting with a weld bead on the circuit board is provided. The probe includes a main body. The main body includes an end surface, a receiving portion defined on the center of the end surface, and four positioning slots communicating with the receiving portion.

Abstract: A multimeter includes a main body, two probes extending from the main body, a battery unit arranged in the main body, and a charging system arranged in the main body and configured for charging the battery. The charging system includes a microcontroller with an external input voltage sampling circuit, a battery voltage sampling circuit and a voltage regulator circuit each electrically connected the microcontroller. The microcontroller compares sampled signals from the external input voltage sampling circuit and the battery voltage sampling circuit, and controls the voltage regulator circuit to regulate the external input voltage to be applicable to the battery based on the comparison.