Abstract: A testing apparatus includes a test controller configured to output a plurality of chip selection signals for selecting chips to be tested from among a plurality of chips, a plurality of first control signals for controlling supply of a power supply voltage to the chips selected by the chip selection signals, and a plurality of second control signals for controlling receiving of test voltages output from the chips supplied with the power supply voltage, and a probe card including one or more test blocks each having a plurality of signal transmitters configured to respectively transfer the power supply voltage to the corresponding chips in response to the different first control signals and respectively apply the test voltages output from the corresponding chips to the test controller in response to the different second control signals.

Abstract: A test apparatus includes: test modules that communicate with the device under test to test the device under test; additional modules connected between the device under test and the test modules, each additional module performing a communication with the device under test, the communication being at least one of a communication performed at a higher speed and a communication performed with a lower latency, in comparison with a communication performed by the test modules; a test head having a plurality of connectors that connect the test modules and the additional modules, respectively, the test modules and the additional modules are mounted on the test head; a performance board placed on the test head that connects between at least a part of terminals of the plurality of connectors and the device under test. The test modules are connected to the additional modules without through the performance board.

Abstract: In a first slot of a plurality of adjacent slots in alignment with traces on a load board of a tester, first and second conductor layers, each to make electrical contact with both a load board trace and a DUT lead. Each of the first and second contacts receives force from a resilient element extending across the slots and that urges a contact point on the contact against at least one trace and a DUT lead. Insulation between said first and second contacts in the first slot electrically insulates the first and second contacts from each other within the first slot.

Abstract: Carbon nanotube columns each comprising carbon nanotubes can be utilized as electrically conductive contact probes. The columns can be grown, and parameters of a process for growing the columns can be varied while the columns grow to vary mechanical characteristics of the columns along the growth length of the columns. Metal can then be deposited inside and/or on the outside of the columns, which can enhance the electrical conductivity of the columns. The metalized columns can be coupled to terminals of a wiring substrate. Contact tips can be formed at or attached to ends of the columns. The wiring substrate can be combined with other electronic components to form an electrical apparatus in which the carbon nanotube columns can function as contact probes.

Abstract: Test structures and method for detecting defects using the same. A probe-able voltage contrast (VC) comb test structure that includes first, second and third probe pads, a comb-like structure including grounded tines, floating tines between the grounded tines, switching devices coupled with an end portion of each floating tine, and connecting the floating tines to the second probe pad, and the third probe pad being a control pad which controls the switching devices. A probe-able VC serpentine test structure that includes first, second, third and fourth probe pads, a comb-like structure including grounded tines, floating tines between the grounded tines and each floating tine connected together between the second and third probe pads, switching devices connected to an end portion of each floating tine and connecting the floating tines to the second and third probe pads, and the fourth probe pad being a control pad which controls the switching devices.

Abstract: An electrical connection defect detection system to detect whether an electrical connection between an under-test pin of an under-test device and a signal line of a circuit board is normal is provided. The electrical connection defect detection system comprises a signal provider providing a test signal to the under-test pin through the signal line, a detection module, an electrode board and a plurality of grounding paths. The electrode board comprises a detection surface to be adapted to a surface of the under-test device opposite to the under-test pin to make the detection module detect a capacitance value associated with the electrode board, the under-test pin and the signal line larger than a threshold value when their connection is normal. The grounding paths are connected to one of not-under-test pin groups respectively to further connect to the ground potential. An electrical connection defect detection method is disclosed herein as well.

Abstract: A semiconductor integrated circuit includes a bump pad through which data is outputted, a probe test pad having a larger size than the bump pad, a first output drive unit configured to drive the bump pad at a first drivability in response to output data, a second output drive unit configured to drive the probe test pad at a second drivability higher than the first drivability in response to the output data, and a multiplexing unit configured to transfer the output data to the first output drive unit or the second output drive unit in response to a test mode signal.

Abstract: A probe module for testing an electronic device comprises at least two contacts, each contact including a first end portion extending in a first direction along a first line, a second end portion extending linearly in a second direction opposite from the first direction and along a second line, and a third curved portion extending between the first end portion and the second end portion. The first line is spaced apart from and in parallel with the second line, and the at least two contacts are spaced apart from each other in a direction perpendicular to the first line and the second line. Methods for making such a probe module are also taught.

Abstract: Disclosed is a probe needle material used for producing a probe needle which is used in contact with an inspection object to inspect electrical characteristics of the inspection object, comprising not less than 0.1% by volume but not more than 3.5% by volume of at least one compound selected from the group consisting of titanium boride, zirconium boride, hafnium boride, niobium boride, tantalum boride, chromium boride, titanium carbide, zirconium carbide, hafnium carbide, vanadium carbide, niobium carbide, tantalum carbide, zirconium oxide, hafnium oxide and chromium oxide and the balance of a tungsten alloy mainly consisting of tungsten.

Abstract: An inspecting apparatus for a solar cell and an inspecting method are provided. The inspecting apparatus for the solar cell includes a head unit having a plurality of probe units, a rotation unit rotating the head unit according to an interval of cells of the solar cell, a controller controlling a rotation angle of the head unit by controlling the rotation unit, and a wire unit connected to the head unit to be electrically connected to the probe units.

Abstract: An embodiment of a cartridge is proposed for testing integrated circuits on a wafer with the wafer that has a wafer front surface with a plurality of terminals of the integrated circuits. The cartridge includes a probe card, which has a card front surface with a plurality of probes for contacting the terminals of the integrated circuits electrically, and a card back surface opposite the card front surface. Locking means is provided for locking the wafer on the probe card. The locking means includes one or more through-holes that cross the probe card from the card front surface to the card back surface; sealing means is arranged on the card front surface around the probes and the through-holes. In this way, a substantially airtight chamber is defined by the probe card, the sealing means and the wafer when the wafer front surface abuts against the sealing means. Coupling means is arranged on the card back surface.

Abstract: A hybrid probe card and methods are provided. A plurality of uniform sized probe pins are provided in a probe card for performing wafer probe testing. The probe card also includes at least one enlarged probe pin having a current carrying capacity that is at least 25% greater than the current carrying capacity of the uniform sized probe pins. The enlarged probe pins are provided, e.g., to prevent damage to the probe pins caused by large current flow. Methods for identifying the probe pin locations where the enlarged probe pins should be deployed are described.

Abstract: An improved system for capacitive testing electrical connections in a low signal environment. The system includes features that increase sensitivity of a capacitive probe. One feature is a spacer positioned to allow the probe to be partially inserted into the component without contacting the pins. The spacer may be a collar on the probe that contacts the housing of the component, contacts the substrate of the circuit assembly, or both. In some other embodiments, the spacer may be a riser extending beyond the surface of the sense plate that contacts the component, a riser portion of the component, or a combination of both. The spacer improves sensitivity by establishing a small gap between a sense plate of the probe and pins under test without risk of damage to the pins. A second feature is a guard plate of the probe with reduced capacitance to a sense plate of the probe. Reducing capacitance also increases the sensitivity of the probe.

Abstract: There is provided a material having an excellent conductivity and oxidation resistance as well as a sufficient hardness for probe pins. The present invention provides a probe pin material including Au, Ag, Pd and Cu, wherein the concentration of Au is 40 to 55% by weight, the concentration of Ag is 15 to 30% by weight and the total concentration of Pd and Cu is 15 to 40% by weight. This material can further include 0.6 to 5% by weight of any one element from among Ni, Zn and Co. Furthermore, this alloy can be precipitation-hardened by being heated at 300 to 500° C., enabling provision of a material having a higher hardness.

Abstract: A sensing probe for measuring device performance electrically at a delivery inspection is disclosed. The probe comprises a plunger, a barrel and a coil spring. The plunger provides a groove in an outer surface thereof, while, the inner surface of the barrel provides a projection. The groove comprises a plurality of unit patterns including a front groove and a rear groove. The projection slides in the front groove as the plunger is pulled into the barrel, while, it slides in the rear groove as the plunger is pushed out from the barrel. Moreover, the plunger rotates in the barrel as the projection slides in the front and rear grooves, which makes an area of the plunger coming in contact with the barrel always fresh and lowers the contact resistance between them.

Abstract: A semiconductor integrated circuit includes first and second bump pads configured to output data, a probe test pad coupled to the first bump pad, and a pipe latch unit configured to selectively transfer data loaded on first and second data lines to one of the first and second bump pads in response to a pipe output dividing signal during a normal mode, and sequentially transfer the data loaded on the first and second data lines to the probe test pad in response to the pipe output dividing signal during a test mode.

Abstract: A test probe includes a filtering unit and a contact unit. The filtering unit includes an inductive component, a capacitive component, and an insulation component insulates the inductive component from the capacitive component. The contact unit contacts a test point to get a test signal. The filtering unit filters noise from the test signal. The test probe can be assembled and disassembled easily, and parameters of the filtering unit can be changed by changing structure of each component.

Abstract: Provision of a probe device, a processing device and a probe test capable of performing an efficient wafer probe test. A probe device, comprising a plurality of measuring stages to which a plurality of probe cards for inspecting semiconductor wafers are connected, respectively; a first conveying portion for conveying a semiconductor wafer to a first measuring stage to which a first probe card is connected; a first inspection control portion for controlling the inspection of the semiconductor wafer by the first probe card; a receiving portion for receiving stage information including information showing nonuse of the first measuring stage from a processing device; a second conveying portion for conveying the semiconductor wafer to a second measuring stage, to which a second probe card different from the first probe card is connected, according to the received stage information; and a second inspection control portion for controlling the inspection of the semiconductor wafer by the second probe card.

Abstract: Analyzing a device under test (“DUT”) at higher frequencies. A phase shifter varies the phase of a standing wave on a transmission line coupled to the DUT. The standing wave magnitude is sampled at each of the phase shifts and one or more DUT characteristics are determined as a function of the sampled magnitudes and phase shifts. Further aspects include a related phase shifter comprising a waveguide having a plurality of sub-resonant slots formed therein and having active elements for loading the slots to control the phase shift applied to the signal.

Abstract: One embodiment provides a method of locating a short circuit in a printed circuit board. Test signals may be injected at different test points on the circuit board. The distance between each test point and the short circuit may be determined according to how long it takes for a signal reflection at the short circuit to propagate back to each test point. The distances between the various test points and the short circuit can be used to narrow the possible locations of the short circuit or even to pinpoint the location of the short circuit.

Abstract: A probe head for testing semiconductor wafers has a probe contactor substrate have a first side and a second side. A plurality of probe contactor tips are coupled to the first side and the plurality of tips lie in a first plane. A plurality of mounting structures are coupled to the second side with each of the mounting structures each having a top surface lying in a second plane, wherein the first plane is substantially parallel to the second plane.

Abstract: The invention discloses a testing system and a testing method, suitable for testing a DUT with double-sided signal pins. The testing system includes a testing platform and a pick-and-place device. The testing platform includes an electromagnetic shielding chamber and a test-bench module. The electromagnetic shielding chamber has an opening. The test-bench module is disposed in-between the electromagnetic shielding chamber. The pick-and-place device is movably disposed above the testing platform. The pick-and-place device includes an electromagnetic shielding cap and a signal transmission structure. When the pick-and-place device places the DUT on the test-bench module, the electromagnetic shielding cap cooperates with the electromagnetic shielding chamber of the testing platform to form an isolated space for isolating the DUT, and furthermore, the signal pin disposed on an upper surface of the DUT can be electrically connected to the test-bench module through the signal transmission structure.

Abstract: A probe head assembly for testing a device under test includes a plurality of test probes and a probe head structure. The probe head structure includes a guide plate and a template and supports a plurality of test probes that each includes a tip portion with a tip end for making electrical contact with a device under test, a curved compliant body portion and a tail portion with a tail end for making electrical contact with the space transformer. Embodiments of the invention include offsetting the position of the tail portions of the test probes with respect to the tip portions of the test probes so that the tip portions of the test probes are biased within the apertures of the guide plate, using hard stop features to help maintain the position of the test probes with respect to the guide plate and probe ramp features to improve scrubbing behavior.

Abstract: This invention relates to a semiconductor device for testing and analyzing integrated circuits (1) on a first side and a second side. The semiconductor device (1) having a first surface (A1) and a second surface (A2) both sides having a set of contacts (P3a, P3b, P3a?, P3b?). The sets of contacts on are symmetrically located on positions relative to a first fictitious plane of symmetry (S1) and a second fictitious plane of symmetry (S2). The semiconductor device (1) has at least a first position of use and a second position of use, whereby the second position of use is obtained by rotating the semiconductor device (1) in the first position of use 180° around a fictitious axis (M). This axis (M) is defined by the crossing of the first fictitious plane of symmetry (S1) and the second fictitious plane of symmetry (S2). The semiconductor device thus obtained provides a flexible and generic solution for testing and analyzing integrated circuits on both sides.

Abstract: A method includes providing a plurality of failure dies, and performing a chip probing on the plurality of failure dies to generate a data log comprising electrical characteristics of the plurality of failure dies. An automatic net tracing is performed to trace failure candidate nodes in the failure dies. A failure layer analysis is performed on results obtained from the automatic net tracing. Physical failure analysis (PFA) samples are selected from the plurality of failure dies using results obtained in the step of performing the failure layer analysis.

Abstract: A probing apparatus can comprise a substrate, conductive signal traces, probes, and electromagnetic shielding. The substrate can have a first surface and a second surface opposite the first surface, and the electrically conductive first signal traces can be disposed on the first surface of the first substrate. The probes can be attached to the first signal traces, and the electromagnetic shielding structures can be disposed about the signal traces.

Abstract: A probe group can include multiple probes for testing devices having contact pads. The probes can comprise beams, contact tip structures, and mounting portions. The beams can provide for controlled deflection of the probes. The contact tip structures can be connected to the beams and can include contact portions for contacting with the devices. The mounting portions of the beams can be attached to support structures, which can be arranged in a staggered pattern. The beams located in a first row of the staggered pattern can include narrowing regions that lie substantially in line with the mounting portions of a second row of the beams.

Abstract: A method is disclosed for the measurement of a power device in a prober, which serves the examination and testing of such components. In the process, a power device is held by a chuck, and at least one electric probe is held by a probe holder, and optionally, the power device or the probe is positioned each relative to the other using a positioning device with an electrical drive, and contacts the power device. At the same time, an electrical connection remains between the probe to a signal unit with which a power signal is sent out or received, is blocked and only unblocked when it is determined that the contact between probe 26 and contact area is established.

Abstract: An auto probe device used in a method of testing a plurality of signal lines of a liquid crystal panel includes a printed circuit board having a shorting bar, a flexible printed circuit board having a plurality of connection patterns electrically connected to the shorting bar of the printed circuit board, and a plurality of contact pins contacting the plurality of pads formed in a non-display area of the liquid crystal panel. Such an auto probe device reduces a defect generation rate in a lighting test of the liquid crystal panel so that accuracy of the lighting test may be improved.

Abstract: Probe pins related to the present invention are formed from a material which consists essentially of one or more elements selected from the group consisting of platinum, iridium, ruthenium, osmium, palladium and rhodium. A material obtained by adding one or more elements selected from the group consisting of tungsten, nickel and cobalt to this metal may also be used.

Abstract: Embodiments of the present invention are directed to adjustable test probe tips that are indexable. In one embodiment a mechanism is coupled to a probe tip so that the mechanism may be used to index the probe tip to a plurality of particular positions. A label portion may be provided to communicate to a user that the length of the exposed probe tip is less than a particular length, such as the maximum length an exposed probe tip may be for a particular application.

Abstract: A probing apparatus includes a set of conductors configured to contact a surface of a workpiece simultaneously. A processor activates subsets of the conductors to determine a four-point-probe parameter, wherein the subset is less than the set of conductors. Another subset determines another four-point-probe parameter. The set of conductors remain in contact with the surface of the workpiece during and between activating each subset. A process of forming a probe head includes a probe substrate and associated conductive leads. An insulating layer is formed over the probe substrate and patterned to expose the leads. Conductors, connected to the leads, are formed over the insulating layer and define a probing area of a least 250 cm2.A process of forming an electronic device includes contacting a surface of a workpiece using conductors. Subset of the conductors are activated to determine four-point-probe parameters at different areas of the workpiece.

Abstract: An object of the present invention is to obtain a clear absorbed current image without involving the difference in gain of amplifier between inputs, from absorbed currents detected by using a plurality of probes and to improve measurement efficiency. In the present invention, a plurality of probes are brought in contact with a specimen. While irradiating the specimen with an electron beam, currents flowing in the probes are measured. Signals from at least two probes are input to a differential amplifier. An output of the differential amplifier is amplified. On the basis of the amplified output and scanning information of the electron beam, an absorbed current image is generated. According to the invention, a clear absorbed current image can be obtained without involving the difference in gain of amplifier between inputs. Thus, measurement efficiency in a failure analysis of a semiconductor device can be improved.

Abstract: Systems and methods for simultaneous optical testing of a plurality of devices under test. These systems and methods may include the use of an optical probe assembly that includes a power supply structure that is configured to provide an electric current to a plurality of devices under test (DUTs) and an optical collection structure that is configured to simultaneously collect electromagnetic radiation that may be produced by the plurality of DUTs and to provide the collected electromagnetic radiation to one or more optical detection devices. The systems and methods also may include the use of the optical probe assembly in an optical probe system to evaluate one or more performance parameters of each of the plurality of DUTs.

Abstract: Installed in a probe device is a holding member for inspection which can be mounted on a chuck. The holding member for inspection includes a support plate capable of mounting thereon a chip in which the power device is formed; pins for positioning the chip mounted on the support plate; and a metal film formed on a surface of the support plate in a range from a mounting area on which the chip is mounted to an exposed area on which the chip is not mounted. When inspecting the power device, the chip is fixed onto the mounting area in the holding member for inspection, one probe pin is brought into contact with a terminal on a top surface of the chip; and another probe pin is brought into contact with the metal film in the exposed area.

Abstract: Exemplary embodiments provide interconnects and methods for interconnecting an electrical device array with a flexible circuit by filling a chemically-etched or laser-ablated integral stencil with conductive materials.

Abstract: A method and system for testing a semiconductor package. At least some of the illustrative embodiments are methods comprising testing a semiconductor package unit (150, 420) by electrically coupling a top printed circuit board (208, 420) to a top-side of a semiconductor package unit (150, 420), the coupling using electrically conductive top-side pogo pins (201A, 420), and a pair of adjacent top-side pogo pins (201A, 420) bridged using an electrically conductive path (302, 420), electrically coupling a bottom printed circuit board (210, 430) to a bottom-side of the semiconductor package unit (150, 430), the coupling using electrically conductive bottom-side pogo pins (201B, 430), said top-side pogo pins (201A, 430) and said bottom-side pogo pins are of substantially equal height (201B, 430), and transmitting test signals from the bottom printed circuit board to the semiconductor device package by way of the bottom-side pogo pins (210, 440).

Abstract: A voltage regulator includes an input terminal for receiving a power input having a first voltage level, and an output terminal for generating a power output. A reference signal having a second voltage level is derived from the first voltage level adjusted with a predetermined offset value for controlling the power output to be at a third voltage level proportional to the second voltage level.

Abstract: A method for assembling a probe card for wafer level testing of a plurality of semiconductor devices simultaneously is disclosed. The probe card may include a circuit board including wafer level testing circuitry, a partially flexible silicon substrate, a plurality of test probes disposed at least partially in the substrate for engaging a plurality of corresponding electrical contacts in a wafer under test, and a compressible underfill coupling the substrate to the circuit board. The method includes aligning and assembling the foregoing components, and curing the underfill. The probe card may be used for wafer level burn-in testing. In some embodiments, the probe card may include active test control circuitry embedded in the silicon substrate for conducting wafer level high frequency testing.

Abstract: A probe card includes probes that come into contact with a semiconductor wafer to receive or output an electric signal; a probe head that holds the probes; a substrate that has a wiring pattern corresponding to a circuit structure for generating a signal for a test; a reinforcing member that reinforces the substrate; an interposer that is stacked on the substrate and includes a housing having connection terminals resilient in an axial direction thereof and hole portions each housing one of the connection terminals; and a space transformer that is stacked between the interposer and the probe head and transforms intervals among the wires.

Abstract: A composite spring contact structure includes a structural component and a conduction component distinct from each other and having differing mechanical and electrical characteristics. The structural component can include a group of carbon nanotubes. A mechanical characteristic of the composite spring contact structure can be dominated by a mechanical characteristic of the structural component, and an electrical characteristic of the composite spring contact structure can be dominated by an electrical characteristic of the conduction component. Composite spring contact structures can be used in probe cards and other electronic devices. Various ways of making contact structures are also disclosed.

Abstract: A probe card includes a probe head that holds a plurality of probes; a flat wiring board that has a wiring pattern corresponding to a circuit structure; an interposer that is stacked on the wiring board and relays wirings of the wiring board; a space transformer that is placed between the interposer and the probe head, transforms a space between the wirings relayed by the interposer, and leads the transformed wirings out to a surface facing the probe head; and a plurality of post members that are formed in a substantially columnar shape with a height larger than a sum of a thickness of the wiring board and a thickness of the interposer, and embedded to pierce through the wiring board and the interposer in a thickness direction such that one of end surfaces of each post member comes into contact with the space transformer.

Abstract: A method for producing a defect card for individual dies located on a wafer, comprising: producing first and second defect cards, where the defective individual dies whose adjoining individual dies form an environment having a defect density up to a first value (?1) are classified as defective on the first defect card, and where the defective individual dies which are not considered upon the production of the first defect card are classified as defective on the second defect card; producing a third defect card by classifying additional individual dies on the second defect card as defective, where adjoining individual dies of the additional defective individual dies form an environment having at least one defect density of a second value (?2), which second value is less than the first value (?1); and producing a fourth defect card by unifying the third defect card with the first defect card.

Abstract: The invention relates to a probe card assembly comprising a stiffener (1), comprising a PCB (2) disposed in the stiffener (1), and comprising a spider (3) supported by the stiffener and the PCB (2), said spider comprising at least one probe (30) to test a wafer (5). This probe card assembly of the PCB (2) is supported in a loosely decoupled manner in the stiffener (1) to prevent transmission of high thermally-induced warping effects.

Abstract: According to one embodiment, a substrate inspection apparatus includes a probe socket, a probe pin, and an adaptor. The probe socket is fixed to an inspection jig on which a substrate is provided, one end of the probe socket being connected to a processor. The probe pin is attached to the other end portion of the probe socket, includes a tip shape conforming to an inspection point of the substrate with which the probe pin is in contact, and including at least one of a projection and a groove designed to specify the tip shape on a side on which the probe pin is attached to the probe socket. The adaptor is attached to the other end portion of the probe socket, and including a through hole formed in conformity with the shape of the side on which the probe pin is attached to the probe socket.

Abstract: A probe for high frequency signal transmission includes a metal pin, and a metal line spacedly arranged on and electrically insulated from the metal pin and electrically connected to grounding potential so as to maintain the characteristic impedance of the probe upon transmitting high frequency signal. The maximum diameter of the probe is substantially equal to or smaller than two times of the diameter of the metal pin. Under this circumstance, a big amount of probes can be installed in a probe card for probing a big amount of electronic devices, so that a wafer-level electronic test can be achieved efficiently and rapidly.

Abstract: A socketless integrated circuit (IC) contact connector is provided with an electrically conductive support post. An electrically conductive spring has a first end connected to the post, and a second end. An electrically conductive first wire has a first end connected to the spring second end, and a second end. An electrically conductive loop with a loop neck is connected to the first wire second end. Typically, the loop is formed in the first wire second end. The spring and loop work in cooperation to engage an IC contact.

Abstract: A test and measurement instrument including a port including a plurality of connections; an impedance sense circuit configured to sense an impedance coupled to a connection of the plurality of connections; and a controller configured to setup the test and measurement instrument in response to a sensed impedance from the impedance sense circuit.

Abstract: An apparatus for adjusting a differential probe includes a regulator arranged therein capable of adjusting a distance between two tips of the probe. The probe is supported on the apparatus. The apparatus includes a rotatable shaft and a rotatable disk. The rotatable shaft engages with the regulator of the probe. The rotatable disk is mounted surrounding the rotatable shaft and rotatable together with the rotatable shaft. An angular ruler or a radian ruler is described on an outer surface of the rotatable disk to indicate a rotation angle or a rotation radian of the rotatable shaft, therefore the distance between the two tips of the probe are accurately adjusted.

Abstract: A test probe for a finger tester for the testing of non-componented circuit boards has a test needle with a probe tip which may be brought into contact with a circuit board test point, and which may be pivotably attached to a mount by means of at least two flexible sprung retaining arms. It is distinguished by the fact that at least one of the retaining arms is made of an electrically conductive material and is electrically connected to the test needle. In a corresponding finger tester, the test probe is driven by a linear motor.