Abstract: A manufacturing method for an edge illuminated type photodiode has: a process of forming an impurity-doped layer of a first conductivity type in each of device forming regions in a semiconductor substrate; a process of forming an impurity-doped layer of a second conductivity type in each of the device forming regions; a process of forming a trench extending in a direction of thickness of the semiconductor substrate from a principal surface, at a position of a boundary between adjacent device forming regions, by etching to expose side faces of the device forming regions; a process of forming an insulating film on the exposed side faces of the device forming regions; a process of forming an electrode for each corresponding impurity-doped layer on the principal surface side of the semiconductor substrate; and a process of implementing singulation of the semiconductor substrate into the individual device forming regions.

Abstract: An organic light-emitting display device and a method of manufacturing the organic light-emitting display device are provided. The organic light-emitting display device includes a plurality of pixels each including: a first region including a light-emitting region for emitting light, a first electrode and an emission layer covering the first electrode being located in the light-emitting region; and a second region including a transmissive region for transmitting external light through the display device. The display device also includes: a third region between the pixels; a first auxiliary layer in the first and third regions; a second electrode on the first auxiliary layer in the first and third regions; a second auxiliary layer covering the second electrode and located in the first and second regions and not in the third region; and a third electrode on the second electrode in the third region.

Abstract: A method for manufacturing a solid-state imaging device in which: photo sensor portions are formed in a silicon layer over a substrate, a first conductivity type region being included in the photo sensor portions and a second conductivity type region being formed in the silicon layer implanted from a rear-surface of the solid-state imaging device by ion implantation; a wiring portion is formed above the silicon layer; and a supporting substrate is bonded to the wiring portion, wherein, the solid-state imaging device is configured for receiving incident light via the rear-surface of the solid-state imaging device.

Abstract: A method is provided for fabricating thin-film transistors (TFTs) for an LCD having an array of pixels. The method includes depositing a first photoresist layer over a portion of a TFT stack that includes a conductive gate layer, and a semiconductor layer. The method also includes doping the exposed semiconductor layer with a first doping dose. The method further includes etching a portion of the conductive gate layer to expose a portion of the semiconductor layer, and doping the exposed portion of the semiconductor layer with a second doping dose. The method also includes depositing a second photoresist layer over a first portion of the doped semiconductor layer in an active area of the pixels to expose a second portion of the doped semiconductor layer in an area surrounding the active area, and doping the second portion of the doped semiconductor layer with a third doping dose.

Abstract: A method of protecting a substrate during fabrication of semiconductor, MEMS devices. The method includes application of a protective thin film which typically has a thickness ranging from 3 angstroms to about 1,000 angstroms, wherein precursor materials used to deposit the protective thin film are organic-based precursors which include at least one fluorine-comprising functional group at one end of a carbon back bone and at least one functional bonding group at the opposite end of a carbon backbone, and wherein the carbon backbone ranges in length from 4 carbons through about 12 carbons. In many applications at least a portion of the protective thin film is removed during fabrication of the devices.

Abstract: A display device includes: a substrate; a signal line on the substrate; a signal input line on the substrate and connected to a driver; a first insulating layer between the signal line and the signal input line; a second insulating layer on the signal line, the signal input line and the first insulating layer; an organic layer on the second insulating layer; a first contact hole defined in the organic layer, the first insulating layer and the second insulating layer and exposing the signal line; a second contact hole defined in the organic layer and the second insulating layer and exposing the signal input line; and a connecting member on the organic layer, and connecting the signal line and the signal input line to each other through the first contact hole and the second contact hole, respectively.

Abstract: Provided is a method for manufacturing a light emitting device comprising a light emitting element and an optical part, the method comprising the steps of (i) forming a hydroxyl film on a bonding surface of each of the light emitting element and the optical part by an atomic layer deposition, and (ii) bonding the bonding surfaces of the light emitting element and the optical part with each other, each of the bonding surfaces having the hydroxyl film formed thereon, wherein a substep is repeated at least one time in the step (i), in which substep a first raw material gas and a second raw material gas are sequentially supplied onto the bonding surfaces of the light emitting element and the optical part, and wherein the bonding of the bonding surfaces in the step (ii) is performed without a heating treatment.

Abstract: It is an object to provide a highly reliable semiconductor device including a thin film transistor whose electric characteristics are stable. In addition, it is another object to manufacture a highly reliable semiconductor device at low cost with high productivity. In a semiconductor device including a thin film transistor, a semiconductor layer of the thin film transistor is formed with an oxide semiconductor layer to which a metal element is added. As the metal element, at least one of metal elements of iron, nickel, cobalt, copper, gold, manganese, molybdenum, tungsten, niobium, and tantalum is used. In addition, the oxide semiconductor layer contains indium, gallium, and zinc.

Abstract: A method of forming a semiconductor device is disclosed. Provided is a substrate having at least one MOS device, at least one metal interconnection and at least one MOS device formed on a first surface thereof. A first anisotropic etching process is performed to remove a portion of the substrate from a second surface of the substrate and thereby form a plurality of vias in the substrate, wherein the second surface is opposite to the first surface. A second anisotropic etching process is performed to remove another portion of the substrate from the second surface of the substrate and thereby form a cavity in the substrate, wherein the remaining vias are located below the cavity. An isotropic etching process is performed to the cavity and the remaining vias.

Abstract: Disclosed is an ultrasonic probe comprising: CMUT cells (13) that mutually convert ultrasonic waves and electrical signals; a semiconductor substrate (15) that has a plurality of the CMUT cells (13) formed on the surface thereof; an acoustic lens (3) that is provided on the front face side of the CMUT cells (13); and a backing layer (5) that is provided on the rear face side of the semiconductor substrate (15). The backing layer (5) is formed by a first backing layer (27) that makes contact with the semiconductor substrate, and a second backing layer (29) that is provided on the rear face side of the backing layer (27). The acoustic impedance of the backing layer (27) is set based on the sheet thickness of the semiconductor substrate (15). The backing layer (29) is formed by attenuating material capable of attenuating ultrasonic waves transmitted through the backing layer (27).

Abstract: An optical proximity sensor module includes a substrate, a light emitter mounted on a first surface of the substrate, the light emitter being operable to emit light at a first wavelength, and a light detector mounted on the first surface of the substrate, the light detector being operable to detect light at the first wavelength. The module includes an optics member disposed substantially parallel to the substrate, and a separation member disposed between the substrate and the optics member. The separation member may surround the light emitter and the light detector, and may include a wall portion that extends from the substrate to the optics member and that separates the light emitter and the light detector from one another. The separation member may be composed, for example, of a non-transparent polymer material containing a pigment, such as carbon black.

Abstract: The present invention relates a CMOS (Complementary Metal Oxide Semiconductor) image sensor capable of improving dynamic range by using an additional driver transistor. The CMOS image sensor according to the present invention has a pixel array which has a plurality of unit pixels each of which includes a photodiode and a fist transistor to act as a source follower buffer amplifier to amplify photogenerated charges accumulated in the photodiode. Also, the CMOS image sensor includes a second transistor for a buffer amplifier to amplify and output a gate input voltage in the unit pixel, wherein an output signal of the first transistor is applied to a gate of the second.

Abstract: A method of forming an electrode is disclosed. A carbon nanotube is deposited on a substrate. A section of the carbon nanotube is removed to form at least one exposed end defining a first gap. A metal is deposited at the at least one exposed end to form the electrode that defines a second gap.

Abstract: Methods for forming a buried p-n junction and avalanche photodiodes incorporating same are disclosed. The method includes forming a well in a semiconductor layer, wherein a depth of the well is selected as a function of the desired shape of the p-n junction in the edge region of the avalanche photodiode. A diffusion mask is then formed on the semiconductor layer, wherein the diffusion mask includes at least two openings per APD formed, wherein one opening is a diffusion window and the other is a diffusion sink. The depth of the p-n junction in the active region of the APD is based, in part, on an attribute of the diffusion mask relating to the diffusion sink.

Abstract: An optoelectronic semiconductor component includes a semiconductor layer sequence having at least one active layer, and a photonic crystal that couples radiation having a peak wavelength out of or into the semiconductor layer sequence, wherein the photonic crystal is at a distance from the active layer and formed by superimposition of at least two lattices having mutually different reciprocal lattice constants normalized to the peak wavelength.

Abstract: A stack of a first anti-reflective coating (ARC) layer and a titanium layer is formed on a front surface of a semiconductor substrate including a p-n junction, and is subsequently patterned so that a semiconductor surface is physically exposed in metal contact regions of the front surface of the semiconductor substrate. The remaining portion of the titanium layer is converted into a titania layer by oxidation. A metal layer is plated on the metal contact regions, and a copper line is subsequently plated on the metal layer or a metal semiconductor alloy derived from the metal layer. A second ARC layer is deposited over the titania layer and the copper line, and is subsequently patterned to provide electrical contact to the copper line.

Abstract: A method of forming a MEMS device provides first and second wafers, where at least one of the first and second wafers has a two-dimensional array of MEMS devices. The method deposits a layer of first germanium onto the first wafer, and a layer of aluminum-germanium alloy onto the second wafer. To deposit the alloy, the method deposits a layer of aluminum onto the second wafer and then a layer of second germanium to the second wafer. Specifically, the layer of second germanium is deposited on the layer of aluminum. Next, the method brings the first wafer into contact with the second wafer so that the first germanium in the aluminum-germanium alloy contacts the second germanium. The wafers then are heated when the first and second germanium are in contact, and cooled to form a plurality of conductive hermetic seal rings about the plurality of the MEMS devices.

Abstract: A substrate having a pattern of magnetic properties may be formed by forming a magnetically inactive layer on the substrate, forming a magnetic precursor on the magnetically inactive layer, and forming magnetically active domains separated by magnetically inactive domains in the magnetic precursor by applying thermal energy to the magnetic precursor. The thermal energy may be applied using a laser, which may be pulsed. Forming the magnetically active domains may include crystallizing portions of the magnetic precursor.

Abstract: A micro-electro-mechanical microphone and manufacturing method thereof are provided. The micro-electro-mechanical microphone includes a diaphragm, which is formed on a surface of one side of a semiconductor substrate, exposed to the outside surroundings, and can vibrate freely under the pressure generated by sound waves; an electrode plate with air holes, which is under the diaphragm; an isolation structure for fixing the diaphragm and the electrode plate; an air gap cavity between the diaphragm and the electrode plate, and a back cavity under the electrode plate and in the semiconductor substrate; and a second cavity formed on the surface of the same side of the semiconductor substrate and in an open manner The air gap cavity is connected with the back cavity through the air holes of the electrode plate The back cavity is connected with the second cavity through an air groove formed in the semiconductor substrate.

Abstract: An acetone gas sensor apparatus, including: a chamber, used for containing a gas sample taken from a breath of a person; and an acetone gas sensor, placed in the chamber for generating an output current in response to an acetone concentration of the gas sample, the acetone gas sensor including: a substrate; a buffer layer, deposited on the substrate; an InN epilayer, deposited on the buffer layer for providing a current path for the output current; a first conductive contact, deposited on the InN epilayer for providing a drain contact; and a second conductive contact, deposited on the InN epilayer for providing a source contact.

Abstract: In an organic light-emitting display device and a method of manufacturing the organic light-emitting display device, the method includes forming thin film transistors (TFTs) on a substrate; and forming organic light emitting diodes (OLEDs), each of the OLEDs including a first electrode having a portion exposed by a pixel defining layer (PDL) on the TFTs, an organic layer on the exposed portion of the first electrode and including an emission layer (EML) configured to emit light having a respective one of a plurality of colors, and a second electrode on the organic layer. The EML is formed in each of a sub-pixel region with one color and other sub-pixel regions with other colors that are formed by forming openings in the PDL. A solution supply unit for sub-pixel region that communicates with the sub-pixel region with one color is formed in the sub-pixel region with one color.

Abstract: A method of fabricating electrical connections in an integrated MEMS device is disclosed. The method comprises forming a MEMS wafer. Forming a MEMS wafer includes forming one cavity in a first semiconductor layer, bonding the first semiconductor layer to a second semiconductor layer with a dielectric layer disposed between the first semiconductor layer and the second semiconductor layer, and etching at least one via through the second semiconductor layer and the dielectric layer and depositing a conductive material on the second semiconductor layer and filling the at least one via. Forming a MEMS wafer also includes patterning and etching the conductive material to form one standoff and depositing a germanium layer on the conductive material, patterning and etching the germanium layer, and patterning and etching the second semiconductor layer to define one MEMS structure. The method also includes bonding the MEMS wafer to a base substrate.

Abstract: An electromechanical resonator produced on a substrate, and a method of producing thereof, including: a suspended structure produced at least partly from the substrate, configured to have a vibration imparted to it such that it resonates at least one natural resonance frequency of the suspended structure; an anchor structure to anchor the suspended structure, by at least one area of its periphery, to the remainder of the substrate, and dimensioned to resonate at the resonance frequency; a mechanism to excite the suspended structure, to cause it to vibrate at the resonance frequency; and a mechanism to detect the vibration frequency of the suspended structure.

Abstract: A photosensitive imaging device and a method for forming a semiconductor device are provided. The method includes: providing a first device layer formed on a first substrate, wherein a conductive top bonding pad layer is formed on the first device layer; providing a continuous second device layer formed on a second substrate, wherein a continuous conductive adhesion layer is formed on the continuous second device layer; bonding the first device layer with the second device layer, where the top bonding pad layer on the first device layer is directly connected with the conductive continuous adhesion layer on the continuous second device layer; removing the second substrate; selectively etching the continuous second device and the continuous conductive adhesion layer to form a groove array; and filling up the groove array with an insulation material to form a plurality of second devices. Alignment accuracy may be improved.

Abstract: A thin film transistor element includes a gate electrode, an insulating layer formed on the gate electrode, and partition walls formed on the insulating layer and defining a first aperture above the gate electrode. The thin film transistor element further includes, at a bottom portion of the first aperture, a source electrode and a drain electrode that are in alignment with each other with a gap therebetween, a liquid-philic layer, and a semiconductor layer that covers the source electrode, the drain electrode, and the liquid-philic layer as well as gaps therebetween. The liquid-philic layer has higher liquid philicity than the insulating layer, and in plan view of the bottom portion of the first aperture, a center of area of the liquid-philic layer is offset from a center of area of the bottom portion of the first aperture.

Abstract: Technologies are generally described for operating and manufacturing optomechanical accelerometers. In some examples, an optomechanical accelerometer device is described that uses a cavity resonant displacement sensor based on a zipper photonic crystal nano-cavity to measure the displacement of an integrated test mass generated by acceleration applied to the chip. The cavity-resonant sensor may be fully integrated on-chip and exhibit an enhanced displacement resolution due to its strong optomechanical coupling. The accelerometer structure may be fabricated in a silicon nitride thin film and constitute a rectangular test mass flexibly suspended on high aspect ratio inorganic nitride nano-tethers under high tensile stress. By increasing the mechanical Q-factors through adjustment of tether width and tether length, the noise-equivalent acceleration (NEA) may be reduced, while maintaining a large operation bandwidth. The mechanical Q-factor may be improved with thinner (e.g., <1 micron) and longer tethers (e.

Abstract: To provide a highly reliable semiconductor device which includes a transistor including an oxide semiconductor, in a semiconductor device including a staggered transistor having a bottom-gate structure provided over a glass substrate, a gate insulating film in which a first gate insulating film and a second gate insulating film, whose compositions are different from each other, are stacked in this order is provided over a gate electrode layer. Alternatively, in a staggered transistor having a bottom-gate structure, a protective insulating film is provided between a glass substrate and a gate electrode layer. A metal element contained in the glass substrate has a concentration lower than or equal to 5×1018 atoms/cm3 at the interface between the first gate insulating film and the second gate insulating film or the interface between the gate electrode layer and a gate insulating film.

Abstract: An rf MEMS system has a semiconductor substrate, e.g., silicon. The system also has a control module provided overlying one or more first regions of the semiconductor substrate according to a specific embodiment. The system also has a base band module provided overlying one or more second regions of the semiconductor substrate and an rf module provided overlying one or more third regions of the semiconductor substrate. The system also has one or more MEMS devices integrally coupled to at least the rf module.

Abstract: Described herein is an assembly for a MEMS sensor device, which envisages: a first body made of semiconductor material, integrating a micromechanical detection structure at a first main face thereof; a cap element, set stacked on the first main face of the first body, above the micromechanical detection structure; and an adhesion structure set between the first body and the cap element, defining a gap in a position corresponding to the micromechanical detection structure. At least one first opening is defined through the adhesion structure in fluidic communication with the gap.

Abstract: A method for fabricating a substrate having transferable chiplets includes forming a photo-sensitive adhesive layer on a process side of a source substrate including active components or on a patterned side of a transparent intermediate substrate. The intermediate substrate is brought into contact with the source substrate to adhere the active components on the process side to the patterned side of the intermediate substrate via the photo-sensitive adhesive layer therebetween. Portions of the source substrate opposite the process side thereof are removed to singulate the active components. Portions of the photo-sensitive adhesive layer are selectively exposed to electromagnetic radiation through the intermediate substrate to alter an adhesive strength thereof. Portions of the photo-sensitive adhesive layer having a weaker adhesive strength are selectively removed to define breakable tethers comprising portions of the adhesive layer having a stronger adhesive strength.

Abstract: An array substrate for a liquid crystal display (LCD) and manufacturing method thereof are provided. The array substrate for a liquid crystal display (LCD) includes: a substrate, including: a gate electrode, a pixel electrode, and a common electrode, a gate pad formed on the substrate, and connected to the gate electrode, a gate insulating layer formed on the gate pad, a first protective layer formed on the gate insulating layer, a second protective layer formed on the first protective layer, a first metal layer formed on the second protective layer, and connected to the gate pad through a first contact hole which exposes the gate pad, a third protective layer formed on the first metal layer and the second protective layer, and a second metal layer formed on the third protective layer, and connected to the first metal layer through a second contact hole which exposes the first metal layer.

Abstract: A method for providing a semiconductor structure includes forming a sacrificial structure by etching a plurality of trenches from a first main surface of a substrate. The method further includes covering the plurality of trenches at the first main surface with a cover material to define cavities within the substrate, removing a part of the substrate from a second main surface opposite to the first main surface to a depth at which the plurality of trenches are present, and etching away the sacrificial structure from the second main surface of the substrate.

Abstract: A method of forming an ohmic contact and electron reflector on a surface of a CdTe containing compound film as may be found, for example in a photovoltaic cell. The method comprises forming a Cd-deficient, Te-rich surface region at a surface of the CdTe containing compound film; exposing the Cd-deficient surface region to an electron reflector forming material; forming the electron reflector; and laying down a contact layer over the electron reflector layer. The solar cell so produced has a Cd-deficient region which is converted to an electron reflector layer on the surface of a CdTe absorber layer, and an ohmic contact. A Cd/Te molar ratio within the Cd-deficient region decreases from 1 at an interface with the CdTe absorber layer to a value less than 1 towards the ohmic contact.

Abstract: An integrated circuit device includes a first layer comprising at least two partial cavities, an intermediate layer bonded to the first layer, the intermediate layer formed to support at least two Micro-electromechanical System (MEMS) devices, and a second layer bonded to the intermediate layer, the second layer comprising at least two partial cavities to complete the at least two partial cavities of the first layer through the intermediate layer to form at least two sealed full cavities. The at least two full cavities have different pressures within.

Abstract: A radiation dosimeter includes a semiconductor substrate and a buried insulator layer disposed on the semiconductor substrate. The buried insulator layer has a plurality of charge traps. A semiconductor layer is disposed on the buried insulator layer. The semiconductor layer has an emitter, an intrinsic base, and a collector laterally arranged with respect to one another. In response to radiation exposure by the radiation dosimeter, positive charges are trapped in the plurality of charge traps in the buried insulator layer, the amount of positive charge trapped being used to determine the amount of radiation exposure.

Abstract: The present invention is a photodiode or photodiode array having improved ruggedness for a shallow junction photodiode which is typically used in the detection of short wavelengths of light. In one embodiment, the photodiode has a relatively deep, lightly-doped P zone underneath a P+ layer. By moving the shallow junction to a deeper junction in a range of 2-5 ?m below the photodiode surface, the improved device has improved ruggedness, is less prone to degradation, and has an improved linear current.

Abstract: The present invention provides an ultra-violet light sensing device. The ultra-violet light sensing device includes a first conductivity type substrate, a second conductivity type region, and a first conductivity type high density region. The first conductivity type substrate includes a light incident surface. The second conductivity type region is disposed in the first conductivity type substrate and adjacent to the light incident surface. The first conductivity type high density region is disposed under the second conductivity type region. The present invention also provides another ultra-violet light sensing device, which further includes a first conductivity type high density shallow region which is sandwiched between the light incident surface and the second conductivity type region. Manufacturing methods for these ultra-violet light sensing devices are also disclosed in the present invention.

Abstract: An improved microwave mixer manufactured using multilayer processing includes an integrated circuit that is electrically connected to a top metal layer of a substrate. The microwave mixer includes: a first metal layer; a dielectric substrate on the first metal layer; a second metal layer directly on the substrate, at least two passive circuits arranged on the second metal layer and a top layer metal; a thin dielectric layer on the second metal layer, wherein the top layer metal is directly on the thin dielectric layer; an integrated circuit (IC) attached to the second metal layer, wherein the IC includes at least one combination of non-linear devices, and wherein the IC is directly connected to the passive circuits on the second metal layer; and a protection layer on the IC.

Abstract: A method for making light emitting diode, the method includes the following steps. First, a substrate having an epitaxial growth surface is provided. Second, a carbon nanotube layer is suspended above the epitaxial growth surface. Third, a first semiconductor layer, an active layer and a second semiconductor layer are grown on the epitaxial growth surface in that order, wherein the first semiconductor layer includes a buffer layer, an intrinsic semiconductor layer, and a doped semiconductor layer stacked in that order. Fourth, the doped semiconductor layer is exposed by removing the substrate, the buffer layer, and the intrinsic semiconductor layer. Fifth, a first electrode is prepared on the first semiconductor layer and a second electrode is prepared on the second semiconductor layer.

Abstract: A device and a method of forming the same are disclosed. The device comprises a substrate and a thin film. The substrate is characterized by a first coefficient of thermal expansion. The thin film is attached to a surface of the substrate, and is characterized by a second coefficient of thermal expansion. The thin film includes first and second layers in states of compression, and a third layer in a state of tension, the third layer being positioned between the first and second layers. The thin film is in a net state of tension within a temperature range.

Abstract: A photodetector with a bandwidth-tuned cell structure is provided. The photodetector is fabricated from a semiconductor substrate that is heavily doped with a first dopant. A plurality of adjoining cavities is formed in the semiconductor substrate having shared cell walls. A semiconductor well is formed in each cavity, moderately doped with a second dopant opposite in polarity to the first dopant. A layer of oxide is grown overlying the semiconductor wells and an annealing process is performed. Then, metal pillars are formed that extend into each semiconductor well having a central axis aligned with an optical path. A first electrode is connected to the metal pillar of each cell, and a second electrode connected to the semiconductor substrate. The capacitance between the first and second electrodes decreases in response to forming an increased number of semiconductor wells with a reduced diameter, and forming metal pillars with a reduced diameter.

Abstract: A thin film transistor according to an example embodiment includes: a substrate body; a semiconductor layer formed on the substrate body and comprising a polycrystalline silicon film having a surface resistance from about 2000 ohm/sq to about 8000 ohm/sq; and a source electrode and a drain electrode each contacted with the semiconductor layer and comprising a metallic material having a resistance from about 350 to about 2000 ohm.

Abstract: A display panel is provided, which includes a transparent substrate, a first thin film transistor (TFT), a second TFT, a transparent bottom electrode, a capacitance layer, a transparent top electrode, an opposite substrate and a display medium layer. The transparent substrate has a display region and a peripheral region. The display region has sub-pixel regions, and at least one sub-pixel region at least includes a capacitance region and a transistor region. The first and the second TFTs are disposed on the transistor region of the transparent substrate. The transparent bottom electrode, the capacitance layer and the transparent top electrode are sequentially disposed on the capacitance region of transparent substrate, in which the transparent bottom electrode is connected to a source/drain electrode of the first TFT, and the transparent top electrode is connected to a source/drain electrode of the second TFT.

Abstract: A method includes providing an LED element including a substrate and a gallium nitride (GaN) layer disposed on the substrate. The GaN layer is treated. The treatment includes performing an ion implantation process on the GaN layer. The ion implantation process may provide a roughened surface region of the GaN layer. In an embodiment, the ion implantation process is performed at a temperature of less than approximately 25 degrees Celsius. In a further embodiment, the substrate is at a temperature less than approximately zero degrees Celsius during the ion implantation process.

Abstract: The present invention provides a module structure of substrate inside type comprising a first substrate with a concave structure. A chip is configured on the concave structure of the first substrate, with a first contact pad and a sensing area. A second substrate is disposed on the first substrate, with at least one through hole structure and a second contact pad. The first contact is coupled to the second contact pad via a wire. The second substrate includes a first portion embedded into the module structure, and a second portion extended to outside of the module structure. A lens holder is disposed on the second substrate, and a lens is located on the top of the lens holder. A transparent material is disposed within the lens holder or the second substrate. The lens is substantially aligning to the transparent material and the sensing area.

Abstract: A micromechanical component including a first composite of a plurality of semiconductor chips, the first composite having a first front and back surfaces, a second composite of a corresponding plurality of carrier substrates, the second composite having a second front and back surfaces; wherein the first front surface and the second front surface are connected via a structured adhesion promoter layer in such a way that each semiconductor chip is connected, essentially free of cavities, to a corresponding carrier substrate corresponding to a respective micromechanical component.

Abstract: An electronic system for selectively detecting and identifying a plurality of chemical species, which comprises an array of nanostructure sensing devices, is disclosed. Within the array, there are at least two different selectivities for sensing among the nanostructure sensing devices. Methods for fabricating the electronic system are also disclosed. The methods involve modifying nanostructures within the devices to have different selectivity for sensing chemical species. Modification can involve chemical, electrochemical, and self-limiting point defect reactions. Reactants for these reactions can be supplied using a bath method or a chemical jet method. Methods for using the arrays of nanostructure sensing devices to detect and identify a plurality of chemical species are also provided.

Abstract: A wafer stack that is diced to produce a multitude of micro-optoelectronic devices includes a first wafer including a semiconductor material; a second wafer including an optically transparent material; a multitude of light sensor arrangements in the semiconductor material of the first wafer for each of the micro-optical devices; the second wafer structured to form a multitude of micro-optical elements therein for each of the micro-optoelectronic devices; and a wafer stack produced wafer bonding, the wafer stack including the first wafer and the second wafer arranged above same, each of the micro-optical elements arranged and structured such that different portions of light incident on the micro-optical element are directed onto different light sensor elements of a light sensor arrangement at least partly arranged below the micro-optical element.

Abstract: A programmable memory element can include an insulating layer formed over a bottom structure; an opening formed in the insulating layer; a sidewall structure formed next to side surfaces of the opening; a tapered structure formed within the opening adjacent to the sidewall structure; and a solid electrolyte forming at least a portion of a structure selected from: the bottom structure, the sidewall structure, and the tapered structure.

Abstract: A mechanism for reducing stiction in a MEMS device by decreasing an amount of carbon from TEOS-based silicon oxide films that can accumulate on polysilicon surfaces during fabrication is provided. A carbon barrier material film is deposited between one or more polysilicon layer in a MEMS device and the TEOS-based silicon oxide layer. This barrier material blocks diffusion of carbon into the polysilicon, thereby reducing accumulation of carbon on the polysilicon surfaces. By reducing the accumulation of carbon, the opportunity for stiction due to the presence of the carbon is similarly reduced.