Abstract: A solid-state imaging device that includes a pixel including a photoelectric conversion section, and a conversion section that converts an electric charge generated by photoelectric conversion into a pixel signal. In the solid-state imaging device, substantially only a gate insulation film is formed on a substrate corresponding to an area under a gate electrode of at least one transistor in the pixel.

Abstract: A solar cell includes a base layer; an emitter layer disposed on one side of the base layer; a first electrode in electrical communication with the base layer; and a second electrode in electrical communication with the emitter layer, wherein the base layer has a higher doping concentration with increasing distance from the interface between the base layer and the emitter layer, and the base layer has a doping concentration change slope that is further decreased with increasing distance from the interface between the base layer and the emitter layer.

Abstract: The present invention provides a Group III nitride semiconductor light-emitting device exhibiting improved emission performance and high electrostatic breakdown voltage. The Group III nitride semiconductor light-emitting device has a layered structure in which an n-type contact layer, an ESD layer, an n-type cladding layer, a light-emitting layer, a p-type cladding layer, and a p-type contact layer are deposited on a sapphire substrate. The ESD layer has a pit. The n-type cladding layer and the light-emitting layer are formed without burying the pit. The pit has a diameter of 110 nm to 150 nm at an interface between the n-type cladding layer and the light-emitting layer. The barrier layer of the light-emitting layer is formed of AlGaN having an Al composition ratio of 3% to 7%.

Abstract: A semiconductor apparatus including a substrate, a pixel array on the substrate, first and second conductive pads between which the substrate locates is provided. The apparatus also comprises an insulating layer arranged between the substrate and the first conductive pad; a third conductive pad arranged between the substrate and the insulating layer; a first conductive member which passes through the insulating layer and connects the first and third conductive pads to each other; and a second conductive member which passes through the substrate and connects the second and third conductive pads to each other. The pixel array further comprises a conductive line connected to circuit elements included in pixels aligned in a row or column direction. The first conductive pad is connected to the conductive line in an interval between the pixels.

Abstract: Methods of forming electro-micromechanical resonators provide passive temperature compensation of semiconductor device layers used therein. A first substrate is provided that includes a first electrically insulating temperature compensation layer on a first semiconductor device layer. A step is performed to bond the first electrically insulating temperature compensation layer to a second substrate containing the second electrically insulating temperature compensation layer therein, to thereby form a relatively thick temperature compensation layer. A piezoelectric layer is formed on the first electrically insulating temperature compensation layer and at least a first electrode is formed on the piezoelectric layer.

Abstract: The present invention provides a MEMS structure comprising confined sacrificial oxide layer and a bonded Si layer. Polysilicon stack is used to fill aligned oxide openings and MEMS vias on the sacrificial layer and the bonded Si layer respectively. To increase the design flexibility, some conductive polysilicon layer can be further deployed underneath the bonded Si layer to form the functional sensing electrodes or wiring interconnects. The MEMS structure can be further bonded to a metallic layer on top of the Si layer and the polysilicon stack.

Abstract: A sensor device includes a semiconductor chip. The semiconductor chip has a sensing region sensitive to mechanical loading. A pillar is mechanically coupled to the sensing region.

Abstract: A method for forming a magnetic tunnel junction cell includes forming a pinning layer, a pinned layer, a dielectric layer and a free layer over a first electrode, forming a second electrode on the free layer, etching the free layer and the dielectric layer using the second electrode as an etch barrier to form a first pattern, forming a prevention layer on a sidewall of the first pattern, and etching the pinned layer and the pinning layer using the second electrode and the prevention layer as an etch barrier to form a second pattern.

Abstract: A compact sensor with which particles floating in the air can be easily detected. A sensor having a microstructure which detects a detection object by contact is used. A microstructure has an opening to be a detection hole corresponding to the size of a detection object, and a pair of electrodes having a bridge structure are provided thereabove or thereunder so as to partially contact with each other.

Abstract: A multilayered stack including alternating layers of sacrificial material layers and semiconductor material layers is formed on a base substrate. The thickness of each sacrificial material layer of the stack increases upwards from the sacrificial material layer that is formed nearest to the base substrate. Because of this difference in thicknesses, each sacrificial material layer etches at different rates, with thicker sacrificial material layers etching faster than thinner sacrificial material layers. An etch is performed that first removes the thickest sacrificial material layer of the multilayered stack. The uppermost semiconductor device layer within the multilayered stack is accordingly first released. As the etch continues, the other sacrificial material layers are removed sequentially, in the order of decreasing thickness, and the other semiconductor device layers are removed sequentially.

Abstract: According to one embodiment, an information recording and reproducing device includes a stacked body. The stacked body includes a first layer, a second layer and a recording layer provided between the first layer and the second layer. The recording layer includes a phase-change material and a crystal nucleus. The phase-change material is capable of reversely changing between a crystal state and an amorphous state by a current supplied via the first layer and the second layer. The crystal nucleus is provided in contact with the phase-change material and includes a crystal nucleus material having a crystal structure identical to a crystal structure of the crystal state of the phase-change material, and a crystal nucleus coating provided on a surface of the crystal nucleus material and having a composition different from a composition of the crystal nucleus material.

Abstract: The present disclosure provides a method for fabricating a MEMS device including multiple bonding of substrates. In an embodiment, a method includes providing a micro-electro-mechanical systems (MEMS) substrate including a first bonding layer, providing a semiconductor substrate including a second bonding layer, and providing a cap including a third bonding layer. The method further includes bonding the MEMS substrate to the semiconductor substrate at the first and second bonding layers, and bonding the cap to the semiconductor substrate at the second and third bonding layers to hermetically seal the MEMS substrate between the cap and the semiconductor substrate. A MEMS device fabricated by the above method is also provided.

Abstract: An improved diode energy converter for chemical kinetic electron energy transfer is formed using nanostructures and includes identifiable regions associated with chemical reactions isolated chemically from other regions in the converter, a region associated with an area that forms energy barriers of the desired height, a region associated with tailoring the boundary between semiconductor material and metal materials so that the junction does not tear apart, and a region associated with removing heat from the semiconductor.

Abstract: A sensing unit package with reduced size and improved thermal sensing capabilities. An exemplary package includes a printed circuit board with a plurality of electrical traces, an application-specific integrated circuit (Analog ASIC) chip, and a micromachined sensor formed on a microelectromechanical system (MEMS) die. The Analog ASIC chip is electrically and mechanically attached to the printed circuit board. The MEMS die is in direct electrical communication with only a portion of the electrical traces of the printed circuit board and is mechanically and thermally attached directly to the Analog ASIC chip. A thermally conducting compound is located between the MEMS die and the Analog ASIC chip. One or more solder balls electrically attach the Analog ASIC chip to the printed circuit board and one or more solder traces electrically attach the MEMS die to the printed circuit board.

Abstract: A transistor device includes a magnetic field source adapted to deflect a flow of free electron carriers within a channel of the device, between a source region and a drain region thereof. According to preferred configurations, the magnetic field source includes a magnetic material layer extending over a side of the channel that is opposite a gate electrode of the transistor device.

Abstract: The present invention is a front-side contact, back-side illuminated (FSC-BSL) photodiode arrays and front-side illuminated, back-side contact (FSL-BSC) photodiode arrays having improved characteristics, including high production throughput, low-cost manufacturing via implementation of batch processing techniques; uniform, as well as high, photocurrent density owing to presence of a large continuous homogeneous, heavily doped layer; and back to front intrachip connections via the homogenous, heavily doped layers on the front and back sides of the substrate.

Abstract: A method for making light emitting diode, the method includes the following steps. First, a substrate having an epitaxial growth surface is provided. Second, a carbon nanotube layer is suspended above the epitaxial growth surface. Third, a first semiconductor layer, an active layer and a second semiconductor layer are grown on the epitaxial growth surface in that order. Fourth, a portion of the second semiconductor layer and the active layer is etched to expose a portion of the first semiconductor layer. Fifth, a first electrode is prepared on the first semiconductor layer and a second electrode is prepared on the second semiconductor layer.

Abstract: A method is disclosed to fabricate an electro-mechanical device such as a MEMS or NEMS switch. The method includes providing a silicon layer disposed over an insulating layer that is disposed on a silicon substrate; releasing a portion of the silicon layer from the insulating layer so that it is at least partially suspended over a cavity in the insulating layer; depositing a metal (e.g., Pt) on at least one surface of at least the released portion of the silicon layer and, using a thermal process, fully siliciding at least the released portion of the silicon layer using the deposited metal. The method eliminates silicide-induced stress to the released Si member, as the entire Si member is silicided. Furthermore no conventional wet chemical etch is used after forming the fully silicided material thereby reducing a possibility of causing corrosion of the silicide and an increase in stiction.

Abstract: A semiconductor device includes a substrate including a cavity and a first material layer over at least a portion of sidewalls of the cavity. The semiconductor device includes an oxide layer over the substrate and at least a portion of the sidewalls of the cavity such that the oxide layer lifts off a top portion of the first material layer toward a center of the cavity.

Abstract: A solid-state imaging device with a semiconductor substrate; a pixel formation region in the substrate and including a pixel made of a photoelectric conversion element; and an element isolation portion in the substrate and including an element isolation insulating layer and an impurity element isolation region. The element isolation insulating layer is positioned in a surface of the substrate. The impurity element isolation region is positioned under the element isolation insulating layer and within the substrate. The impurity element isolation region has at least a portion with a width that is narrower than that of the element isolation insulating layer. The photoelectric conversion element extends to a position under the element isolation insulating layer of the element isolation portion.

Abstract: Methods and systems for measuring the concentration of an analyte in a blood sample and, more particularly, to methods of chemistry patterning reagent layers for multiple well biosensors. A first capillary is first configured to receive a dispensed reagent layer such that the reagent layer is distributed in a substantially uniform manner within the first capillary. The first capillary may also configured to isolate the first capillary from other capillaries present in the biosensor. After the reagent layer has been dispensed and dried, the first capillary may then be reconfigured to allow the first capillary to receive a blood sample.

Abstract: A method of forming at least one Micro-Electro-Mechanical System (MEMS) includes patterning a wiring layer to form at least one fixed plate and forming a sacrificial material on the wiring layer. The method further includes forming an insulator layer of one or more films over the at least one fixed plate and exposed portions of an underlying substrate to prevent formation of a reaction product between the wiring layer and a sacrificial material. The method further includes forming at least one MEMS beam that is movable over the at least one fixed plate. The method further includes venting or stripping of the sacrificial material to form at least a first cavity.

Abstract: The invention provides transient devices, including active and passive devices that electrically and/or physically transform upon application of at least one internal and/or external stimulus. Materials, modeling tools, manufacturing approaches, device designs and system level examples of transient electronics are provided.

Abstract: A method of forming a MEMS device includes forming a sacrificial layer over a substrate. The method further includes forming a metal layer over the sacrificial layer and forming a protection layer overlying the metal layer. The method further includes etching the protection layer and the metal layer to form a structure having a remaining portion of the protection layer formed over a remaining portion of the metal layer. The method further includes etching the sacrificial layer to form a movable portion of the MEMS device, wherein the remaining portion of the protection layer protects the remaining portion of the metal layer during the etching of the sacrificial layer to form the movable portion of the MEMS device.

Abstract: A method for manufacturing a semiconductor device is provided, which includes the step of forming a microstructure comprising a layer containing silicon over a first substrate, the step of forming an interlayer insulating layer over the microstructure, the step of forming a connection conductive layer over the interlayer insulating layer, and the step of separating the microstructure from the first substrate.

Abstract: A method for forming a photodetector device includes forming waveguide feature on a substrate, and forming a photodetector feature including a germanium (Ge) film, the Ge film deposited on the waveguide feature using a plasma enhanced chemical vapor deposition (PECVD) process, the PECVD process having a deposition temperature from about 500° C. to about 550° C., and a deposition pressure from about 666.612 Pa to about 1066.579 Pa.

Abstract: The present disclosure provides an image sensor device and a method of forming the image sensor device. In an example, an image sensor device includes a substrate having a front surface and a back surface; a sensor element disposed at the front surface of the substrate, the sensor element being operable to sense radiation projected toward the back surface of the substrate; and a transparent conductive layer disposed over the back surface of the substrate, the transparent conductive layer at least partially overlying the sensor element. The transparent conductive layer is configured for being electrically coupled to a bottom portion of the sensor element.

Abstract: Disclosed herein an image sensor chip, including a substrate having at least one via extending through at least one inter layer dielectric (ILD); a first conductive layer over the ILD, wherein the first conductive layer has a first thickness; a second conductive layer over the first conductive layer, wherein the second conductive layer has a second thickness of less than the first thickness; a polymer layer over the second conductive layer, the polymer layer including a cavity; a plurality of cavity components in the cavity; and an optically transparent layer contacting the polymer layer and covering the cavity.

Abstract: In a control device of a plasma processing system, a communication unit is configured to receive processing information related to a carrier of a next processing lot. A determination unit is configured to determine whether the processing information received by the communication unit has pre-treatment information related to one of the plasma processing devices. When it is determined that the processing information has the pre-treatment information by the determination unit, a generation unit is configured to generate an object for declaring execution of the pre-treatment for the carrier of a next processing lot if a desired condition of transferring of the carrier is satisfied. In addition, if the object is generated by the generation unit, a process executing control unit is configured to start the pre-treatment for the target object in the carrier of a next processing lot without any notification that the carrier reaches a destination plasma processing device.

Abstract: A first sealing layer having a frame-like shape and a first contact layer are formed on a back surface of a frame portion of a sensor substrate. The first contact layer is separated from the first sealing layer, extends through a functional member and an insulation layer, and is electrically connected to the functional member and a first base member. A second sealing layer and a second contact layer are formed on a surface of a wiring substrate. The second sealing layer faces the first sealing layer. The second contact layer is separated from the second sealing layer, extends through the insulation layer, and is electrically connected to the second base member. The sealing layers are eutectically bonded to each other. The contact layers are electrically connected to each other, and thereby the first and second base members and the frame portion have the same potential.

Abstract: Vibration beams are provided on a substrate in parallel with the substrate and in parallel with each other, and provided in vacuum chambers formed by a shell and the substrate. Each of vibration beams has a sectional shape with a longer sectional thickness in a direction perpendicular to a surface of the substrate than a sectional thickness in a direction parallel to the surface of the substrate. A first electrode plate is provided in parallel with the surface of the substrate and connected to one end of each of the vibration beams. A second electrode plate is provided in parallel with the surface of the substrate and between the vibration beams. Third and fourth electrode plates are provided on opposite sides of the vibration beams. Asperities are provided in opposed side wall portion surfaces of the vibration beams and the second, third and fourth electrode plates.

Abstract: A system and method providing for the detection of an input signal, either optical or electrical, by using a single independent discrete amplifier or by distributing the input signal into independent signal components that are independently amplified. The input signal can either be the result of photoabsorption process in the wavelengths greater than 950 nm or a low-level electrical signal. The discrete amplifier is an avalanche amplifier operable in a non-gated mode while biased in or above the breakdown region, and includes a composite dielectric feedback layer monolithically integrated with input signal detection and amplification semiconductor layers.

Abstract: A method of flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die. The non-volatile RAM is formed of stacks of magnetic memory cells arranged in three-dimensional form for higher density and lower costs.

Abstract: A method of fabricating an electrophoretic display device includes forming a gate line along a direction, a gate electrode extending from the gate line, a common line parallel to the gate line, and a first storage electrode extending from the common line on a substrate, forming a gate insulating layer on an entire surface of the substrate including the gate line, the gate electrode, the common line and the first storage electrode, forming a semiconductor layer, a data line, and source and drain electrodes through a mask process, wherein the semiconductor layer is disposed over the gate electrode, the data line crosses the gate line to define a pixel region, the source electrode extends from the data line, and the drain electrode is spaced apart from the source electrode over the semiconductor layer.

Abstract: The present disclosure provides methods for manufacturing a radio frequency (RF) powder including a plurality of RF particles, each of which includes a circuit element. A plurality of circuit elements, each corresponding to a different RF particle, may be formed on a first surface of a substrate. Grooves may be etched into the first surface of the substrate between the plurality of circuit elements. A protection film may be formed on each of the plurality of circuit elements and a portion of the substrate between a second, opposite surface of the substrate and bottoms of the grooves may be removed so that each of the plurality of circuit elements is associated with the remaining portion of the substrate.

Abstract: A packaged semiconductor device with a cavity formed by a cover or lid mounted to a substrate. The lid covers one or more semiconductor sensor dies mounted on the substrate. The dies are coated with a gel or spray on coating, and the lid is encapsulated with a mold compound. A hole or passage may be formed through the cover and mold compound to expose the sensor dies to selected environmental conditions.

Abstract: A method and system for providing a magnetic junction usable in a magnetic device are described. The magnetic junction includes a pinned layer, a nonmagnetic spacer layer, and a free layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction. At least one of the pinned layer and the free layer includes a magnetic substructure. The magnetic substructure includes at least two magnetic layers interleaved with at least one insertion layer. Each insertion layer includes at least one of Cr, Ta, Ti, W, Ru, V, Cu, Mg, aluminum oxide, and MgO. The magnetic layers are exchange coupled.

Abstract: A structure and a process for a microelectromechanical system (MEMS)-based sensor are provided. The structure for a MEMS-based sensor includes a substrate chip. A first insulating layer covers a top surface of the substrate chip. A device layer is disposed on a top surface of the first insulating layer. The device layer includes a periphery region and a sensor component region. The periphery region and a sensor component region have an air trench therebetween. The component region includes an anchor component and a moveable component. A second insulating layer is disposed on a top surface of the device layer, bridging the periphery region and a portion of the anchor component. A conductive pattern is disposed on the second insulating layer, electrically connecting to the anchor component.

Abstract: An object of an embodiment of the disclosed invention is to provide a semiconductor device including a photoelectric conversion element with excellent characteristics. An object of an embodiment of the disclosed invention is to provide a semiconductor device including a photoelectric conversion device with excellent characteristic through a simple process. A semiconductor device is provided, which includes a light-transmitting substrate; an insulating layer over the light-transmitting substrate; and a photoelectric conversion element over the insulating layer.

Abstract: One embodiment of the present invention provides a process for obtaining high-quality boundaries for individual multilayer structures which are fabricated on a trench-partitioned substrate. During operation, the process receives a trench-partitioned substrate wherein the substrate surface is partitioned into arrays of isolated deposition platforms which are separated by arrays of trenches. The process then forms a multilayer structure, which comprises a first doped layer, an active layer, and a second doped layer, on one of the deposition platforms. Next, the process removes sidewalls of the multilayer structure.

Abstract: An organic light emitting display includes a gate electrode on a substrate, an active layer insulated from the gate electrode, source and drain electrodes that are insulated from the gate electrode and contact the active layer, an insulating layer between the active layer and the source and drain electrodes, a light blocking layer that is on the active layer and that blocks light of a predetermined wavelength from the active layer, and an organic light emitting device that is electrically connected to one of the source and drain electrodes.

Abstract: A back side illumination image sensor reduced in chip size has a capacitor disposed in a vertical upper portion of a pixel region in the back side illumination image sensor in which light is illuminated from a back side of a subscriber, thereby reducing a chip size, and a method for manufacturing the back side illumination image sensor. The capacitor of the back side illumination image sensor reduced in chip size is formed in the vertical upper portion of the pixel region, not in the outside of a pixel region, so that the outside area of the pixel region for forming the capacitor is not required, thereby reducing a chip size.

Abstract: Methods for Implementation of a Switching Function in a Microscale Device and for Fabrication of a Microscale Switch. According to one embodiment, a method is provided for implementing a switching function in a microscale device. The method can include providing a stationary electrode and a stationary contact formed on a substrate. Further, a movable microcomponent suspended above the substrate can be provided. A voltage can be applied between the between a movable electrode of the microcomponent and the stationary electrode to electrostatically couple the movable electrode with the stationary electrode, whereby the movable component is deflected toward the substrate and a movable contact moves into contact with the stationary contact to permit an electrical signal to pass through the movable and stationary contacts. A current can be applied through the first electrothermal component to produce heating for generating force for moving the microcomponent.

Abstract: A method for the formation of buried cavities within a semiconductor body envisages the steps of: providing a wafer having a bulk region made of semiconductor material; digging, in the bulk region, trenches delimiting between them walls of semiconductor material; forming a closing layer for closing the trenches in the presence of a deoxidizing atmosphere so as to englobe the deoxidizing atmosphere within the trenches; and carrying out a thermal treatment such as to cause migration of the semiconductor material of the walls and to form a buried cavity. Furthermore, before the thermal treatment is carried out, a barrier layer that is substantially impermeable to hydrogen is formed on the closing layer on top of the trenches.

Abstract: Methods for fabrication of microfluidic systems on printed circuit boards (PCB) are described. The PCB contains layers of insulating material and a layer or layers of metal buried within layers of insulating material. The metal layers are etched away, leaving fully enclosed microfluidic channels buried within the layers of insulating material.

Abstract: The invention provides a semiconductor device manufactured with a plurality of photodiodes so that it does not short circuit, and includes an opening without leakage. A second semiconductor layer (12, 16) of second conductivity type is formed on a main surface of a first semiconductor layer (10, 11) of the first conductivity type. Element-separating regions (13, 14, 15, 17) are formed at least on the second semiconductor layer to separate the device into the regions of photodiodes (PD1-PD4). A conductive layer (18) is formed on the second semiconductor layer 16 in a divided pattern that provides a segment for each photodiode and is connected to the second semiconductor layer (16) along the an outer periphery with respect to all photodiodes. An insulation layer (19, 21) is formed on the entire surface to cover conductive layer (18). An opening, which reaches the second semiconductor layer (16), is formed in the insulation layer (19, 21) in the region inside the pattern of conductive layer (18).

Abstract: A means of forming unevenness for preventing specular reflection of a pixel electrode, without increasing the number of process steps, is provided. In a method of manufacturing a reflecting type liquid crystal display device, the formation of unevenness (having a radius of curvature r in a convex portion) in the surface of a pixel electrode is performed by the same photomask as that used for forming a channel etch type TFT, in which the convex portion is formed in order to provide unevenness to the surface of the pixel electrode and give light scattering characteristics.

Abstract: Image sensors include a pixel region and a logic region. Pixel isolation regions in the pixel region include pixel isolation region walls that are less sloped than logic isolation region walls in the logic region. An impurity layer also may be provided adjacent at least some of the pixel isolation region walls, wherein at least some of the logic isolation region walls are free of the impurity layer. The impurity layer and/or the less sloped logic isolation region walls may also be provided for NMOS devices in the logic region but not for PMOS devices in the logic region. Doped sacrificial layers may be used to fabricate the impurity layer.

Abstract: A sensor having a monolithically integrated structure for detecting thermal radiation includes: a carrier substrate, a cavity, and at least one sensor element for detecting thermal radiation. Incident thermal radiation strikes the sensor element via the carrier substrate. The sensor element is suspended in the cavity by a suspension.

Abstract: In a process for fabrication of an optical slot waveguide on silicon, a thin single-crystal silicon film is deposited on a substrate covered with an insulating buried layer; a local thermal oxidation is carried out over the entire depth of the thin single-crystal silicon film in order to form an insulating oxidized strip extending along the desired path of the waveguide; an insulating or semi-insulating layer is deposited on the silicon film; two openings having vertical sidewalls are excavated over the entire thickness of this insulating or semi-insulating layer, said openings being separated by a narrow gap constituting an insulating or semi-insulating vertical wall that will be the material of the slot; single-crystal silicon is grown in the openings and right to the edges of the insulating or semi-insulating wall; and then the upper part of the silicon is etched in order to complete the geometry of the waveguide.