Abstract: Pixel sensor cells, e.g., CMOS optical imagers, methods of manufacturing and design structures are provided with isolation structures that prevent carrier drift to diffusion regions. The pixel sensor cell includes a photosensitive region and a gate adjacent to the photosensitive region. The pixel sensor cell further includes a diffusion region adjacent to the gate. The pixel sensor cell further includes an isolation region located below a channel region of the gate and about the photosensitive region, which prevents electrons collected in the photosensitive region to drift to the diffusion region.

Abstract: A preferred method of optimizing a Ga-nitride device material structure for a frequency multiplication device comprises: determining the amplitude and frequency of the input signal being multiplied in frequency; providing a Ga-nitride region on a substrate; determining the Al percentage composition and impurity doping in an AlGaN region positioned on the Ga-nitride region based upon the power level and waveform of the input signal and the desired frequency range in order to optimize power input/output efficiency; and selecting an orientation of N-face polar GaN or Ga-face polar GaN material relative to the AlGaN/GaN interface so as to orient the face of the GaN so as to optimize charge at the AlGaN/GaN interface. A preferred embodiment comprises an anti-serial Schottky varactor comprising: two Schottky diodes in anti-serial connection; each comprising at least one GaN layer designed based upon doping and thickness to improve the conversion efficiency.

Abstract: A first sealing layer having a frame-like shape and a first contact layer are formed on a back surface of a frame portion of a sensor substrate. The first contact layer is separated from the first sealing layer, extends through a functional member and an insulation layer, and is electrically connected to the functional member and a first base member. A second sealing layer and a second contact layer are formed on a surface of a wiring substrate. The second sealing layer faces the first sealing layer. The second contact layer is separated from the second sealing layer, extends through the insulation layer, and is electrically connected to the second base member. The sealing layers are eutectically bonded to each other. The contact layers are electrically connected to each other, and thereby the first and second base members and the frame portion have the same potential.

Abstract: The sensor assembly comprises a substrate (1), such as a flexible printed circuit board, and a sensor chip (2) flip-chip mounted to the substrate (1), with a first side (3) of the sensor chip (2) facing the substrate (1). A sensing area (4) and contact pads (5) are integrated on the first side (3) of the sensor chip (2) and located in a chamber (17) between the substrate (1) and the sensor chip (2). Chamber (17) is bordered along at least two sides by a dam (16). Underfill (18) and/or solder flux is arranged between the sensor chip (2) and the substrate (1), and the dam (16) prevents the underfill from entering the chamber (17). An opening (19) extends from the chamber to the environment and is located between the substrate (1) and the sensor chip (2) or extends through the sensor chip (2).

Abstract: A method for manufacturing open cavity integrated circuit packages, the method comprising: placing a wire-bound integrated circuit in a mold; forcing a pin to contact a die of the wire-bound integrated circuit by applying a force between the pin and the mold; injecting plastic into the mold; allowing the plastic to set around the integrated circuit to form a package having an open cavity defined by the pin; and removing the open cavity integrated circuit package from the mold. A mold for forming a package for an integrated circuit sensor device, comprising: a bottom part for supporting an integrated circuit die; a top part that is operable to be placed on top of said bottom part to form a cavity into which a plastic material can be injected to form the package, wherein the top part of the mold comprises a spring-loaded pin arrangement comprising a cover that covers a sensor area on the integrated circuit die and provides for an opening when the plastic material is injected.

Abstract: A solid state imaging device includes a photoelectric conversion portion in which the shape of potential is provided such that charge is mainly accumulated in a vertical direction.

Abstract: Methods of forming micromechanical resonators include forming first and second substrates having first and second semiconductor layers of first and second conductivity type therein, respectively. The first semiconductor layer of first conductivity type is bonded to the second semiconductor layer of second conductivity type to thereby define a first rectifying junction at an interface of the bonded semiconductor layers. A piezoelectric layer is formed on the first rectifying junction and at least a first electrode is formed on the piezoelectric layer.

Abstract: A method and system provide a magnetic junction usable in a magnetic device. The magnetic junction includes a reference layer, a nonmagnetic spacer layer, and a free layer. The nonmagnetic spacer layer is between the reference layer and the free layer. The free layer has an engineered perpendicular magnetic anisotropy. The engineered PMA includes at least one of an insulating insertion layer induced PMA, a stress induced PMA, PMA due to interface symmetry breaking, and a lattice mismatch induced PMA. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction.

Abstract: A method and structure for adding mass with stress isolation to MEMS. The structure has a thickness of silicon material coupled to at least one flexible element. The thickness of silicon material can be configured to move in one or more spatial directions about the flexible element(s) according to a specific embodiment. The apparatus also includes a plurality of recessed regions formed in respective spatial regions of the thickness of silicon material. Additionally, the apparatus includes a glue material within each of the recessed regions and a plug material formed overlying each of the recessed regions.

Abstract: Disclosed herein is a device package that comprises a device having a top substrate that is disposed on a supporting surface of a package substrate. A package frame contacts the top surface of the top substrate and top surface of the package substrate, and hermetically seals the device between the top surfaces of the top substrate and package substrate. The device can be a semiconductor device, a microstructure such as a microelectromechanical device, or other devices.

Abstract: Avalanche photodiodes having special lateral doping concentration that reduces dark current without causing any loss of optical signals and method for the fabrication thereof are described. In one aspect, an avalanche photodiode comprises: a substrate, a first contact layer coupled to at least one metal contract of a first electrical polarity, an absorption layer, a doped electric control layer having a central region and a circumferential region surrounding the central region, a multiplication layer having a partially doped central region, and a second contract layer coupled to at least one metal contract of a second electrical polarity. Doping concentration in the central section of the electric control layer is lower than that of the circumferential region. The absorption layer can be formed by selective epitaxial growth.

Abstract: A thin film transistor array is disclosed. The thin film transistor array includes plural gate electrodes formed on an insulation substrate, plural source electrodes formed above or under the gate electrodes via a gate insulation film so that the source electrodes cross the gate electrodes in a planar view, plural drain electrodes formed at corresponding positions surrounded by the gate electrodes and the source electrodes in a planar view in the same layer as that of the source electrodes, semiconductor layers formed via the gate insulation film to face the gate electrodes for forming corresponding channel regions between the source electrodes and the drain electrodes. The plural gate electrodes are linearly formed, and the channel regions are disposed to face the gate electrodes.

Abstract: A display substrate is provided that can prevent the opening of an upper conduction layer. The display substrate comprises a semiconductor layer pattern formed on a substrate, a data interconnection pattern formed on the semiconductor layer pattern, a protection layer formed on the substrate and the data interconnection pattern, contact holes formed on the substrate to expose at least a portion of an upper surface of the semiconductor pattern and at least a portion of an upper surface of the data interconnection pattern, and contact electrodes formed in the contact holes to be in contact with the exposed upper surfaces of the data interconnection pattern and the semiconductor layer pattern.

Abstract: A method for manufacturing a layer arrangement in accordance with various embodiments may include: providing a first layer having a side; forming one or more nanoholes in the first layer that are open towards the side of the first layer; depositing a second layer over the side of the first layer.

Abstract: The present invention discloses a MEMS sensing device which comprises a substrate, a MEMS device region, a film, an adhesive layer, a cover, at least one opening, and a plurality of leads. The substrate has a first surface and a second surface opposite the first surface. The MEMS device region is on the first surface, and includes a chamber. The film is overlaid on the MEMS device region to seal the chamber as a sealed space. The cover is mounted on the MEMS device region and adhered by the adhesive layer. The opening is on the cover or the adhesive layer, allowing the pressure of the air outside the device to pressure the film. The leads are electrically connected to the MEMS device region, and extend to the second surface.

Abstract: A method for manufacturing thin film solar cells, includes forming a light permeable first electrode layer in the back light surface of a glass substrate, and formed in the first electrode layer a plurality of first openings for exposing a part of the back light surface therefrom; forming a photoelectric conversion layer on the first electrode layer and the exposed back light surface, and forming a plurality of second openings in the photoelectric conversion layer for exposing a part of the first electrode layer therefrom; and forming a glistening second electrode layer having a plurality of third openings formed therein, wherein the second electrode layer comprises a conductive colloid comprised of non-diffractive fillings and polymeric base material.

Abstract: The invention provides a technique to manufacture a display device with high image quality and reliability at low cost with high yield. According to the invention, a spacer is provided over a pixel electrode layer in a pixel region. Moreover, a surface of an insulating layer which functions as a partition which covers the periphery of the pixel electrode layer is formed at a high position from the surface of the pixel electrode due to stacked layers under the insulating layer. These spacer and insulator which function as a spacer support a mask used for selectively forming a light emitting material over a pixel electrode layer, thereby preventing the mask from contacting the pixel electrode layer due to a twist and deflection of the mask. Accordingly, such a damage as a crack does not occur in the pixel electrode layer which results in having no defect in shape. Therefore, a display device which performs a high resolution display with high reliability can be manufactured.

Abstract: A method of forming a magnetic tunnel junction device is disclosed that includes forming a trench in a substrate, the trench including a plurality of sidewalls and a bottom wall. The method includes depositing a first conductive material within the trench proximate to one of the sidewalls and depositing a second conductive material within the trench. The method further includes depositing a material to form a magnetic tunnel junction (MTJ) structure within the trench. The MTJ structure includes a fixed magnetic layer having a magnetic field with a fixed magnetic orientation, a tunnel junction layer, and a free magnetic layer having a magnetic field with a configurable magnetic orientation. The method further includes selectively removing a portion of the MTJ structure to create an opening in the MTJ structure.

Abstract: An electrically actuated device includes a first electrode, a second electrode, and an active region disposed between the first and second electrodes. The device further includes at least one of dopant initiators or dopants localized at an interface between i) the first electrode and the active region, or ii) the second electrode and the active region, or iii) the active region and each of the first and second electrodes.

Abstract: A center region of conductive material/s may be disposed or “sandwiched” between transition regions of relatively lower conductivity materials to provide substantially low defect density interfaces for the sandwiched material. The center region and surrounding transition regions may in turn be disposed or sandwiched between dielectric insulative material to form a sandwiched and transitioned device structure. The center region of such a sandwiched structure may be implemented, for example, as a device layer such as conductive microbolometer layer for a microbolometer detector structure.

Abstract: A method of forming a MEMS device by encapsulating a MEMS element with a sacrificial layer portion deposited over a substrate arrangement, the portion defining a cavity for the MEMS element, forming at least one strip of a further sacrificial material extending outwardly from the portion, forming a cover layer portion over the sacrificial layer portion, the cover layer portion terminating on the at least one strip, removing the sacrificial layer portion and the at least one strip, the removal of the at least one strip defining at least one vent channel extending laterally underneath the cover layer portion and sealing the at least one vent channel. A device including such a packaged micro electro-mechanical structure.

Abstract: A method of forming an integrated photonic semiconductor structure having a photonic device and a CMOS device may include depositing a first silicon nitride layer having a first stress property over the photonic device, depositing an oxide layer having a stress property over the deposited first silicon nitride layer, and depositing a second silicon nitride layer having a second stress property over the oxide layer. The deposited first silicon nitride layer, the oxide layer, and the second silicon nitride layer encapsulate the photonic device.

Abstract: A magnetic field sensor has a plurality of vertical Hall elements arranged in at least a portion of a polygonal shape. The magnetic field sensor includes an electronic circuit to process signals generated by the plurality of vertical Hall elements to identify a direction of a magnetic field. A corresponding method of fabricating the magnetic field sensor is also described.

Abstract: Provided are a dual-side micro gas sensor and a method of fabricating the same. The sensor may include an elastic layer, a heat-generating resistor layer on the elastic layer, an interlayered insulating layer on the heat-generating resistor layer, an upper sensing layer on the interlayered insulating layer, and a lower sensing layer provided below the elastic layer to face the heat-generating resistor layer, thereby reducing heat loss of the heat-generating resistor layer.

Abstract: The disclosed technology generally relates to a sensor and methods for making and using the same, and more particularly relates to a sensor configured to sense the presence of at least one fluidum. In one aspect, a sensor for sensing a fluidum in a space adjoining the sensor comprises a two-dimensional electron gas (2DEG) layer stack. The sensor additionally comprises a gate lying adjacent to at least part of the 2DEG layer stack and configured to electrostatically control the electron density of a two-dimensional electron gas (2DEG) in the 2DEG layer stack. The sensor further comprises a source electrode contacting the 2DEG layer stack for electrically contacting the 2DEG.

Abstract: According to one embodiment, a method of manufacturing a camera module includes, disposing a first member on the image sensor, the first member includes a first non-conductor, a first metal film covering the first non-conductor, and a first insulation film covering the first metal film, disposing a second member on or above the first member, the second member includes a second non-conductor, a second metal film covering the second non-conductor, and a second insulation film covering the second metal film, and applying a predetermined voltage between the first member and the second member or between the image sensor and the second member, thereby breaking at least parts of the first insulation film and the second insulation film.

Abstract: A bispectral detector comprising upper and lower semiconductor layers of a first conductivity type in order to absorb a first and a second electromagnetic spectrum, separated by an intermediate layer that forms a barrier; semiconductor zones of a second conductivity type implanted in upper layer and lower layer and each implanted at least partially in the bottom of an opening that passes through upper layer and intermediate layer; and conductor elements connected to semiconductor zones. At least that part of each opening that passes through upper layer is separated from the latter by a semiconductor cap layer: whereof the concentration of dopants of the second conductivity type is greater than 1017 cm?3; and whereof the thickness is chosen as a function of said concentration so that it exceeds the minority carrier diffusion length in the cap layer.

Abstract: A solid-state imaging device includes an element forming region on the surface of a substrate, element isolating parts that isolate pixels, each of which is formed with a trench and a buried film, an opto-electric conversion element, and a buried-channel MOS transistor. The buried-channel MOS transistor includes a source region and a drain region, formed in the element forming region, that have a conductivity type opposite to that of the element forming region, a channel region having first and second impurity diffusion regions, which have a conductivity type opposite to that of the element forming region, and a gate electrode. Each first impurity diffusion region is formed between the source region and drain region on a side adjacent to one element isolating part. The second impurity diffusion region is formed across the region between the source region and drain region.

Abstract: A touch sensor integrated type display device includes a plurality of gate lines, a plurality of data lines crossing over the plurality of the gate lines, a plurality of pixel electrodes formed in areas defined by crossing over the gate lines and the data lines, a plurality of first electrodes formed between pixel electrodes which are neighbored to each other with a gate line therebetween, a plurality of second electrodes, each of the second electrodes formed to overlap with at least one portion of the pixel electrode and arranged in parallel with the gate line, wherein one of the first and second electrodes serve as common electrodes for driving the display device.

Abstract: The invention relates to linear time-delay and integration sensors (or TDI sensors). According to the invention, adjacent pixels of the same rank comprise, alternately, at least one photodiode and one transfer gate adjacent to the photodiode, the photodiodes comprising a common reference region of a first conductivity type, in which an individual region of opposite conductivity type is formed, itself covered by a individual surface region of the first conductivity type, characterized in that the surface regions of two photodiodes located on either side of a transfer gate are electrically separated so as to be able to be brought to different potentials in order to create potential wells and potential barriers allowing accumulation and transfer of charges as desired.

Abstract: An AlGaN/GaN-HEMT has a structure including: compound semiconductor layers formed on a substrate; a gate electrode, a gate pad that has a current path formed between the gate electrode and itself, and a semiconductor layer that is spontaneously polarized and piezoelectrically polarized, which are formed on the compound semiconductor layer; and a gate electrode connection layer formed on the semiconductor layer, wherein the gate electrode connection layer and the gate electrode are electrically connected with each other. This structure which is relatively simple allows the AlGaN/GaN-HEMT to realize an intended normally-off operation without causing such inconveniences as increase in a sheet resistance, increase in an on-resistance, and increase in a leakage current.

Abstract: The manufacturing method of the light-emitting device is provided in which an auxiliary electrode in contact with an electrode formed using a transparent conductive film of a light-emitting element is formed using a mask, and direct contact between the auxiliary electrode and an EL layer is prevented by oxidizing the auxiliary electrode. Further, the light-emitting device manufactured according to the method and the lighting device including the light-emitting device are provided.

Abstract: A first conductive film overlapping with an oxide semiconductor film is formed over a gate insulating film, a gate electrode is formed by selectively etching the first conductive film using a resist subjected to electron beam exposure, a first insulating film is formed over the gate insulating film and the gate electrode, removing a part of the first insulating film while the gate electrode is not exposed, an anti-reflective film is formed over the first insulating film, the anti-reflective film, the first insulating film and the gate insulating film are selectively etched using a resist subjected to electron beam exposure, and a source electrode in contact with one end of the oxide semiconductor film and one end of the first insulating film and a drain electrode in contact with the other end of the oxide semiconductor film and the other end of the first insulating film are formed.

Abstract: An array substrate for a liquid crystal display device includes a gate line on a substrate; a gate electrode connected to the gate line; a gate insulating layer on the gate line and the gate electrode and including a gate opening; an active layer on the gate insulating layer and overlapping the gate electrode; an ohmic contact layer on the active layer; a source electrode on the ohmic contact layer; a drain electrode on the ohmic contact layer and spaced apart from the source electrode, wherein one end of the drain electrode is disposed in the gate opening; a data line on the gate insulating layer and connected to the source electrode, the data line crossing the gate line; a passivation layer on the data line and the source and drain electrodes and including a pixel opening, wherein the pixel opening exposes the drain electrode in the gate opening and a portion of the gate insulating layer; and a pixel electrode on the gate insulating layer and in the pixel opening, the pixel electrode contacting the one end

Abstract: A MEMS structure incorporating multiple joined substrates and a method for forming the MEMS structure are disclosed. An exemplary MEMS structure includes a first substrate having a bottom surface and a second substrate having a top surface substantially parallel to the bottom surface of the first substrate. The bottom surface of the first substrate is connected to the top surface of the second substrate by an anchor, such that the anchor does not extend through either the bottom surface of the first substrate or the top surface of the second substrate. The MEMS structure may include a bonding layer in contact with the bottom surface of the first substrate, and shaped to at least partially envelop the anchor.

Abstract: Epitaxial growth methods and devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice mismatch between an epitaxial material and the substrate. Devices formed by the methods described exhibit better interfacial adhesion and lower defect density than devices formed without texture. Silicon substrates are shown with gallium nitride epitaxial growth and devices such as LEDs are formed within the gallium nitride.

Abstract: The present disclosure provides a bio-field effect transistor (BioFET) device and methods of fabricating a BioFET and a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a gate structure disposed on a first surface of a substrate and an interface layer formed on a second surface of the substrate. The substrate is thinned from the second surface to expose a channel region before forming the interface layer.

Abstract: An embodiment of the invention provides a chip package, which includes: a semiconductor substrate having a device region; a package layer disposed on the semiconductor substrate; a spacing layer disposed between the semiconductor substrate and the package layer and surrounding the device region; and an auxiliary pattern having a hollow pattern formed in the spacing layer, a material pattern located between the spacing layer and the device region, or combinations thereof.

Abstract: A gas sensor is disclosed. The gas sensor includes a gas sensing layer, at least one electrode, an adhesion layer, and a response modification layer adjacent to said gas sensing layer and said layer of adhesion. A system having an exhaust system and a gas sensor is also disclosed. A method of fabricating the gas sensor is also disclosed.

Abstract: The sensor assembly comprises a substrate (1), such as a flexible printed circuit board, and a sensor chip (2) flip-chip mounted to the substrate (1), with a first side (3) of the sensor chip (2) facing the substrate (1). A sensing area (4) and contact pads (5) are integrated on the first side (3) of the sensor chip (2). Underfill (18) and/or solder flux is arranged between the sensor chip (2) and the substrate (1). The sensor chip (2) extends over an edge (12) of the substrate (1), with the edge (12) of the substrate (1) extending between the contact pads (5) and the sensing area (4) over the whole sensor chip (2). A dam (16) can be provided along the edge (12) of the substrate (1) for even better separation of the underfill (18) and the sensing area (4). This de sign allows for a simple alignment of the sensor chip on the substrate (1) and prevents underfill (18) from covering the sensing area (4).

Abstract: The image sensor includes a substrate, an insulating structure formed on a first surface of the substrate and including a first metal wiring layer exposed by a contact hole penetrating the substrate, a conductive spacer formed on sidewalls of the contact hole and electrically connected to the first metal wiring layer, and a pad formed on a second surface of the substrate and electrically connected to the first metal wiring layer.

Abstract: A method includes a first bonding step of bonding a first main surface of a first solar cell and one side portion of a first wiring member to each other in such a way that the first main surface of the first solar cell and the one side portion are heated and pressed against each other by heated first and second tools in a state where the first main surface of the first solar cell and the one side portion face each other with the resin adhesive interposed therebetween. The first bonding step is performed with the first tool disposed in such a way that, in an extending direction of the first wiring member, both end portions of the first tool are located outside both ends of a portion of the first wiring member, the portion facing the first solar cell with the resin adhesive interposed therebetween.

Abstract: An APD is provided with a semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side of the first mesa, and in the APD, a total donor concentration of the n-type electric field control layer is lower than a total acceptor concentration of the p-type electric field control laye

Abstract: A method for fabricating a semiconductor structure includes etching a first opening into a substrate; etching a chip singulation trench into the substrate to define a lamella between the first opening and the chip singulation trench; fabricating a sense element for sensing a deflection of the lamella; and singulating the semiconductor structure at the chip singulation trench.

Abstract: A method of component assembly on a substrate, and an assembly of a bound component on a substrate. The method comprises the steps of forming a free-standing component having an optical characteristic; providing a pattern of a first binding species on the substrate or the free standing component; and forming a bound component on the substrate through a binding interaction via the first binding species; wherein the bound component exhibits substantially the same optical characteristic compared to the free-standing component.

Abstract: A protection clamp is provided between a first terminal and a second terminal, and includes a multi-gate high electron mobility transistor (HEMT), a current limiting circuit, and a forward trigger control circuit. The multi-gate HEMT includes a drain/source, a source/drain, a first depletion-mode (D-mode) gate, a second D-mode gate, and an enhancement-mode (E-mode) gate disposed between the first and second D-mode gates. The drain/source and the first D-mode gate are connected to the first terminal and the source/drain and the second D-mode gate are connected to the second terminal. The forward trigger control and the current limiting circuits are coupled between the E-mode gate and the first and second terminals, respectively. The forward trigger control circuit provides an activation voltage to the E-mode gate when a voltage of the first terminal exceeds a voltage of the second terminal by a forward trigger voltage.

Abstract: A semiconductor device contains a photodiode which includes a buried collection region formed by a bandgap well to vertically confine photo-generated minority carriers. the bandgap well has the same conductivity as the semiconductor material immediately above and below the bandgap well. A net average doping density in the bandgap well is at least a factor of ten less than net average doping densities immediately above and below the bandgap well. A node of the photodiode, either the anode or the cathode, is connected to the buried collection region to collect the minority carriers, the polarity of the node matches the polarity of the minority carriers. The photodiode node connected to the buried collection region occupies less lateral area than the lateral area of the buried collection region.

Abstract: A computing system includes at least one functional unit and a magnetic random access memory (MRAM) block coupled to the at least one functional unit. The MRAM block is configured to store a functional state of the at least one functional unit during a power down state of the at least one functional unit.

Abstract: To achieve promotion of stability of operational function of display device and enlargement of design margin in circuit design, in a display device including a pixel portion having a semiconductor element and a plurality of pixels provided with pixel electrodes connected to the semiconductor element on a substrate, the semiconductor element includes a photosensitive organic resin film as an interlayer insulating film, an inner wall face of a first opening portion provided at the photosensitive organic resin film is covered by a second insulating nitride film, a second opening portion provided at an inorganic insulating film is provided on an inner side of the first opening portion, the semiconductor and a wiring are connected through the first opening portion and the second opening portion and the pixel electrode is provided at a layer on a lower side of an activation layer.

Abstract: A method and structure for adding mass with stress isolation to MEMS. The structure has a thickness of silicon material coupled to at least one flexible element. The thickness of silicon material can be configured to move in one or more spatial directions about the flexible element(s) according to a specific embodiment. The apparatus also includes a plurality of recessed regions formed in respective spatial regions of the thickness of silicon material. Additionally, the apparatus includes a glue material within each of the recessed regions and a plug material formed overlying each of the recessed regions.