Abstract: A high resistivity silicon carbide focus ring for use in a plasma etching system is described. The focus ring comprises an upper surface, a lower surface, an inner radial edge, and an outer radial edge, and is configured to surround a substrate on a substrate holder in a plasma processing system. The focus ring comprises high resistivity silicon carbide having a resistivity greater than or equal to about 100 ohm-cm.

Abstract: A slotted conducting cylinder (11) surrounds a reactor chamber body (10) and is in turn surrounded by an antenna (12). The cylinder (11) can be grounded during normal operation of plasma processing apparatus, but when RF driven it serves to enhance capacitive coupling with the plasma causing the inner surface (16) of the body (10) to become charged and hence the plasma will sputter clean the inner surface (16).

Abstract: The invention relates to a method for the laser marking of a support having a body and a cover sheet. A laser beam is used to etch the body of the support through the thickness of the cover sheet. The support is laminated either during or after the laser marking in order to reduce or prevent deformations in the cover sheet resulting from etching.

Abstract: Components of semiconductor processing apparatus are formed at least partially of erosion, corrosion and/or corrosion-erosion resistant ceramic materials. Exemplary ceramic materials can include at least one oxide, nitride, boride, carbide and/or fluoride of hafnium, strontium, lanthanum oxide and/or dysprosium. The ceramic materials can be applied as coatings over substrates to form composite components, or formed into monolithic bodies. The coatings ca protect substrates from physical and/or chemical attack. The ceramic materials can be used to form plasma exposed components of semiconductor processing apparatus to provide extended service lives.

Abstract: A method for etching a layer assembly, the layer assembly including an intermediate layer sandwiched between an etch layer and a stop layer, the method including a step of etching the etch layer using a first etchant and a step of etching the intermediate layer using a second etchant. The first etchant includes a first etch selectivity of at least 5:1 with respect to the etch layer and the intermediate layer. The second etchant includes a second etch selectivity of at least 5:1 with respect to the intermediate layer and the stop layer. The first etchant being different from the second etchant.

Abstract: An apparatus and method are provided for removing contaminate particulate matter from substrate surfaces such as semiconductor wafers. The method and apparatus use a material, preferably a liquid curable polymer, which is applied as a sacrificial coating to the surface of a substrate containing contaminate particulate matter thereon. An energy source is used to dislodge the contaminate particulate matter from the surface of the wafer into the sacrificial coating so that the particles are partially or fully encapsulated and suspended in the sacrificial coating. The sacrificial coating is then removed. The coating is preferably formed into a film to facilitate removal of the coating by pulling (stripping) the film providing a cleaner substrate surface.

Abstract: A plasma chamber having a plasma source coil includes a chamber body, a plasma source coil, and an edge bushing. The chamber body includes a reaction space, which is limited by a sidewall, a lower exterior wall, and an upper dome, and forms plasma. The plasma source coil arranged on the dome includes M unit coils corresponding to an integer greater than “2”. The M unit coils having a predetermined rpm value “n” indicative of a positive integer are extended from a center bushing having a predetermined radius at a center part, and are spirally arranged along a circumference of the center bushing, such that the plasma is formed in the reaction space. The edge bushing arranged between the dome of the chamber body and the plasma source coil, and is configured in the form of a cylindrical shape to overlap with an edge of the wafer arranged in the reaction space.

Abstract: There is disclosed an exhaust processing process of a processing apparatus for processing a substrate or a film, which comprises after the processing of the substrate or the film, introducing a non-reacted gas and/or a by-product into a trap means comprising a filament comprised of a high-melting metal material comprising as a main component at least one of tungsten, molybdenum and rhenium; and processing the non-reacted gas and/or the by-product inside the trap means. This makes it possible to prevent lowering in exhaust conductance, to lengthen the maintenance cycle of the processing apparatus, and to provide a high-quality product (processed substrate or film).

Abstract: A method of fabricating a semiconductor device is disclosed, by which thickness of a gate oxide layer can be controlled for uniformity. Embodiments include sequentially forming a pad oxide layer and a nitride layer over a semiconductor substrate having an epi-layer grown thereon, the semiconductor substrate having a backside over which a backside nitride layer and a backside oxide layer are formed, forming a trench on the semiconductor substrate, depositing an oxide layer over a front side the semiconductor substrate to fill the trench with the oxide layer, selectively etching the oxide layer, performing a chemical mechanical polishing process on the front side of the semiconductor substrate, performing a chemical mechanical polishing process on the backside of the semiconductor substrate, and forming a gate oxide layer over the semiconductor substrate.

Abstract: There is disclosed an exhaust processing process of a processing apparatus for processing a substrate or a film, which comprises after the processing of the substrate or the film, introducing a non-reacted gas and/or a by-product into a trap means comprising a filament comprised of a high-melting metal material comprising as a main component at least one of tungsten, molybdenum and rhenium; and processing the non-reacted gas and/or the by-product inside the trap means. This makes it possible to prevent lowering in exhaust conductance, to lengthen the maintenance cycle of the processing apparatus, and to provide a high-quality product (processed substrate or film).

Abstract: A processing system for producing a negative ion plasma is described, wherein a quiescent plasma having negatively-charged ions is produced. The processing system comprises a first chamber region for generating plasma using a first process gas, and a second chamber region separated from the first chamber region with a separation member. Electrons from plasma in the first region are transported to the second region to form quiescent plasma through collisions with a second process gas. A pressure control system coupled to the second chamber region is utilized to control the pressure in the second chamber region such that the electrons from the first chamber region undergo collision-quenching with the second process gas to form less energetic electrons that produce the quiescent plasma having negatively-charged ions.

Abstract: Mixtures of fluorine and inert gases like nitrogen and/or argon can be used for etching of semiconductors, solar panels and flat panels (TFTs and LCDs), and for cleaning of semiconductor surfaces and plasma chambers. Preferably, fluorine is comprised in an amount of 15 to 25 vol.-% in binary mixtures. The gas mixtures can be used as substitute or drop-in for respective mixtures comprising NF3 and permit a very flexible operation of plasma apparatus. For example, apparatus tuned for NF3/Ar mixtures can be operated without further tuning using fluorine and argon, optionally together with nitrogen. The fluorine content is preferably in the range of 1 to 5 vol.-%, if ternary mixtures of fluorine, nitrogen and argon are used.

Abstract: A processing apparatus includes a process container having a placing table for placing a processing object, an exhaust system having vacuum pumps and a pressure control valve for exhausting atmosphere in the process container. A gas injection unit having a gas ejection hole is provided in the process container, as well as a gas supplying unit for supplying a process gas to the gas injection unit. The entire process apparatus is controlled by a controlling unit. The control unit controls the exhaust system and the gas supplying unit. When starting a predetermined process, the process gas at a flow rate greater than a prescribed flow rate is supplied for a short time while exhausting the atmosphere in the process container by the exhaust system, and then the process gas at a prescribed flow rate is supplied.

Abstract: The present invention provides processes and equipments for safely and easily preparing an F2-containing gas, as well as processes and equipments for surface modification using the F2-containing gas prepared. According to the present invention, a gas containing a fluoro compound that is easier to handle than F2 is supplied and the fluoro compound is excited and decomposed to convert it into F2 gas before surface modification and then used for surface modification. According to the present invention, there is no necessity of providing, storing and transporting a large amount of F2 gas in advance because a necessary amount of F2 gas is obtained immediately before surface modification.

Abstract: Patterning a surface, comprising at least one feature having silicon coupled to a substrate, is described herein. In one embodiment a method is described for patterning a surface which comprises at least one feature having silicon and at least one feature having carbon coupled to a substrate. The surface is coated with 3-(trimethoxysilyl)propyl methacrylate, and a photoresist is applied the 3-(trimethoxysilyl)propyl methacrylate coated surface. The photoresist is imaged and the surface is etched. The photoresist is then removed.

Abstract: A method of evaluating the presence or absence and/or degree of metal contamination of a semiconductor substrate including etching the surface of the semiconductor substrate by SC-1 cleaning and/or a HF cleaning, detecting bright points on the surface of the etched substrate with a foreign matter inspection device, and evaluating the presence or absence and/or degree of metal contamination of the semiconductor substrate based on the distribution pattern of bright points detected on the surface of the substrate. Also disclosed is a method of manufacturing a semiconductor substrate comprising mirror polishing a silicon wafer surface, wherein the mirror polishing is conducted using a slurry having a Cu content of approximately equal to or less than 10 ppb, a Ni content of approximately equal to or less than 10 ppb, and an Fe content of approximately equal to or less than 1,000 ppb, and evaluating the semiconductor substrate as above.

Abstract: The present invention is an apparatus for manufacturing a semiconductor device comprising: a process vessel including a stage on which a substrate is placed, the substrate having a low dielectric constant film with a resist pattern being formed in an upper layer of the low dielectric constant film; an etching-gas supply unit that supplies an etching gas into the process vessel so as to etch the low dielectric constant film; an ashing-gas unit means that supplies an ashing gas into the process vessel so as to ash the resist pattern formed in the upper layer of the low dielectric constant film after the low dielectric constant film has been subjected to an etching process; a plasma generating means that generates a plasma by supplying an energy to the etching gas and the ashing gas in the process vessel; a unit that supplies a dipivaloylmethane gas into the process vessel, after the low dielectric constant film has been subjected to an ashing process, in order to recover a damage layer of the low dielectric con

Abstract: A magnetic field generator which provides greater control over the magnetic field is provided. The magnetic field generator has a plurality of overlapping main magnetic coil sections for forming a magnetic field generally parallel to the top surface of the supporting member. In other embodiments, sub-magnetic coil sections are placed symmetrically around the main magnetic coil sections.

Abstract: Disclosed are a method and a system for processing a semiconductor structure of the type including a substrate, a dielectric layer, and a TaN—Ta liner on the dielectric layer. The method comprises the step of using XeF2 to remove at least a portion of the TaN—Ta liner completely to the dielectric layer. In the preferred embodiments, the present invention uses XeF2 selective gas phase etching as alternatives to Ta—TaN Chemical Mechanical Polishing (CMP) as a basic “liner removal process” and as a “selective cap plating base removal process.” In this first use, XeF2 is used to remove the metal liner, TaN—Ta, after copper CMP. In the second use, the XeF2 etch is used to selectively remove a plating base (TaN—Ta) that was used to form a metal cap layer over the copper conductor.

Abstract: This invention provides a substrate processing method including a step of covering in advance the surface of a substrate W with water (28), a step of holding the substrate W generally horizontally with the surface facing upward and rotating it in a horizontal plane (10), and a step of blowing to the substrate top surface drying gas flow that is thin in area in comparison with the substrate W surface (30, 40), in which the water is removed from the substrate top surface by the rotation in the horizontal plane while blowing the drying gas flow, a substrate processing apparatus for implementing the above method, and a control program for use with the above method and apparatus. With this invention, it is possible to dry a cleaned substrate without locally leaving water droplets.

Abstract: The present invention provides a method for manufacturing a semiconductor device. In the method, a connection hole such as a via hole is formed in an interlayer insulating film by plasma etching with high etching uniformity regardless of the array density of connection holes. In the method, an upper layer film having a mask pattern is formed on the interlayer insulating film present on a substrate. A gas required for dehydration is then supplied to the substrate under the condition that an upper surface of the interlayer insulating film is exposed in order to remove moisture from the interlayer insulating film. A portion of the interlayer insulating film is etched to form a connection hole in which an electrical connection portion is to be embedded.

Abstract: A substrate processing apparatus includes a substrate processing part which processes a substrate and a particle remover which generates an electric field. The particle remover generates the electric field adjacent to a sidewall of a chamber of the substrate processing apparatus, and the electric field guides particles formed during which the substrate is processed, to prevent the particles from being attached onto the sidewall of the chamber. Thus, the substrate processing apparatus prevents defects of the substrate due to the particles, thereby improving product yield and productivity and reducing a manufacturing cost thereof.

Abstract: A structure for independently supporting a wafer and a mask in a processing chamber is provided. The structure includes a set of extensions for supporting the wafer and a set of extensions supporting the mask. The set of extensions for the wafer and the set of extensions for the mask enable independent movement of the wafer and the mask. In one embodiment, the extensions are affixed to an annular ring which is capable of moving in a vertical direction within the processing chamber. A processing chamber, a mask, and a method for combinatorially processing a substrate are also provided.

Abstract: Disclosed is a corrosion resistant member comprising a sintered material having an ?-Al2O3 crystal and an YAG (yttrium-aluminum-garnet) crystal. The corrosion resistant member contains metal elements, 70 to 98% by mass (inclusive) of Al in terms of Al2O3 and 2 to 30% by mass of Y in terms of Y2O3. The corrosion resistant member has a peak intensity ratio I116/I104 within the range from 0.94 to 1.98, preferably. 2.21 or higher, wherein I116 and I104 represent peak intensities attributed to the (116) face and the (104) face, respectively, of an ?-Al2O3 crystal as measured by X-ray diffractometry on its surface layer.

Abstract: A method of producing a catalyst material with nano-scale structure, the method comprising: introducing a starting powder into a nano-powder production reactor, the starting powder comprising a catalyst material; the nano-powder production reactor nano-sizing the starting powder, thereby producing a nano-powder from the starting powder, the nano-powder comprising a plurality of nano-particles, each nano-particle comprising the catalyst material; and forming a catalyst precursor material from the nano-powder, wherein the catalyst precursor material is a densified bulk porous structure comprising the catalyst material, the catalyst material having a nano-scale structure.

Abstract: A ceramic article which is resistant to erosion by halogen-containing plasmas used in semiconductor processing. The ceramic article includes ceramic which is multi-phased, typically including two phase to three phases. The ceramic is formed from yttrium oxide at a molar concentration ranging from about 50 mole % to about 75 mole %; zirconium oxide at a molar concentration ranging from about 10 mole % to about 30 mole %; and at least one other component, selected from the group consisting of aluminum oxide, hafnium oxide, scandium oxide, neodymium oxide, niobium oxide, samarium oxide, ytterbium oxide, erbium oxide, cerium oxide, and combinations thereof, at a molar concentration ranging from about 10 mole % to about 30 mole %.

Abstract: A ceramic article useful in semiconductor processing, which is resistant to erosion by halogen-containing plasmas. The ceramic article is formed from a combination of yttrium oxide and zirconium oxide. In a first embodiment, the ceramic article includes ceramic which is formed from yttrium oxide at a molar concentration ranging from about 90 mole % to about 70 mole %, and zirconium oxide at a molar concentration ranging from about 10 mole % to about 30 mole %. In a second embodiment, the ceramic article includes ceramic which is formed from zirconium oxide at a molar concentration ranging from about 96 mole % to about 94 mole %, and yttrium oxide at a molar concentration ranging from about 4 mole % to about 6 mole %.

Abstract: Systems and methods are described that facilitate integrating ArF core patterning of floating gate structures in a flash memory device followed by KrF periphery gate patterning using a hard mask comprising a material such as amorphous carbon to facilitate core gate construction. The amorphous carbon hard mask can facilitate preparing such core gate structures while protecting periphery gate stacks such that the periphery stacks are ready for immediate KrF lithography upon completion of core gate formation without requiring additional resist deposition between core and periphery etches.

Abstract: An etching method includes preparing a target object such that a first oxide film made of silicon oxide containing at least one of B and P is formed on a substrate, a second oxide film made of silicon oxide containing neither of B and P is formed on the first oxide film, and a contact portion is present below an interface between the first oxide film and the second oxide film. The etching method further includes etching the second oxide film and the first oxide film, thereby forming a hole reaching the contact portion, and etching the first oxide film by a dry process using a gas containing HF, thereby expanding a portion of the hole adjacent to an upper side of the contact portion and inside the first oxide film.

Abstract: A substrate processing system as illustrated at (1). A substrate (2) lies upon a piston (3) shown in both the loading position (3a) and in a processing position (3b). The substrate is loaded via a port (4) through a door (5). The loading area (7a), and/or the hole chamber (7) may be pumped out via a vacuum exhaust pipe (6) connected to a pump (not shown). A linear drive mechanism shown diagrammatically at (8) lifts the piston and the substrate in the chamber such that a process volume (7b) of the chamber is defined with poor gas conduction between the piston and the walls of the chamber.

Abstract: Embodiments of a manufacturing process flow for producing standalone memory devices that can achieve bit cell sizes on the order of 4F2 or 5F2, and that can be applied to common source/drain, separate source/drain, or common source only or common drain only transistor arrays. Active area and word line patterns are formed as perpendicularly-arranged straight lines on a Silicon-on-Insulator substrate. The intersections of the active area and spaces between word lines define contact areas for the connection of vias and metal line layers. Insulative spacers are used to provide an etch mask pattern that allows the selective etching of contact areas as a series of linear trenches, thus facilitating straight line lithography techniques. Embodiments of the manufacturing process remove first layer metal (metal-1) islands and form elongated vias, in a succession of processing steps to build dense memory arrays.

Abstract: To provide a plasma processing equipment that can reduce the particles or contamination in a sample by suppressing the occurrence of an abnormal electric discharge during processing. The plasma processing equipment that employs a plasma process using a halogen-based gas in fabricating a semiconductor device, wherein a plasma sprayed coating film is applied to a surface of a well, such as a wall in a processing chamber, which plasma is in constant with, and wherein a conductor is incorporated into a material of this plasma sprayed coating film, thereby making the plasma sprayed coating film conductive.

Abstract: A plasma processing apparatus comprising a vacuum vessel; a process chamber housed in the vacuum vessel; and a sample stage located in the process chamber, for supporting on its upper surface a disk-like sample to be processed; wherein plural disk-like samples are continuously processed with plasma generated in the process chamber and wherein during the idling time between the successive processes the temperature of the sample stage is adjusted to a predetermined value higher than the temperature at which the samples are processed.

Abstract: A plasma source coil includes a bushing arranged at a center part, and a plurality of unit coils arranged in the form of a concentric circle from a circumference of the bushing on the bases of the bushing. One end of each unit coil and one end of the bushing are commonly connected to a power-supply terminal, and the other end of each unit coil and the other end of the bushing are commonly connected to a ground terminal.

Abstract: The present invention provides a plasma processing apparatus which has the function of removing a deposit adhering to the periphery of the backside of a sample and has high throughput and low cost. That is, a deposit removal unit for removing the deposit on the periphery of the backside of the sample by pulsed laser irradiation is connected to an atmosphere-side transfer chamber of the plasma processing apparatus.

Abstract: A substrate processing apparatus and a substrate processing method are provided wherein an oxide film which is thinner than the conventional films can be formed with uniform thickness when forming an oxide film on the front-side surface of a substrate. A substrate processing apparatus (12) for processing a substrate (W) by feeding a processing liquid comprises: a temperature regulator (133) to regulate the temperature of said processing liquid; and a underplate temperature adjuster (115) to adjust the temperature of an underplate (77) which is placed in proximity to the backside surface of said substrate W.

Abstract: Positional relationships are established in a process chamber. A base is configured with a lower electrode surface to support a wafer, and an upper electrode has a lower surface. A drive mounted on the base has a linkage connected to the upper electrode. A fixture placed on the lower surface moves into a desired orientation of the lower electrode. With the upper electrode loosely connected by the linkage to the drive, the fixture transfers the desired orientation to the upper electrode. The linkage is tightened to maintain the desired orientation, the fixture is removed and a process exclusion insert is mounted to the upper electrode. The drive moves the upper electrode and the insert to define an inactive process zone between the upper electrode and the wafer on the lower electrode to protect a central area of the wafer during etching of a wafer edge environ around the central area.

Abstract: A substrate processing apparatus that can prevent formation of deposit in openings of a plurality of gas supply holes leading into a processing chamber. Each of the gas supply holes is configured to uniformly supply a processing gas, whose molecules are turned into clusters, into the processing chamber and to prevent liquefaction of processing gas when the processing gas is supplied into the processing chamber.

Abstract: A substrate processing method that can selectively remove deposit produced through dry etching of silicon. A substrate has a silicon base material and a hard mask that is made of a silicon nitride film and/or a silicon oxide film and formed on the silicon base material, the hard mask having an opening to which at least part of the silicon base material is exposed. A trench corresponding to the opening is formed in the silicon base material through dry etching using plasma produced from halogenated gas. After the dry etching, the substrate is heated to a temperature of not less than 200° C., and then hydrogen fluoride gas and helium gas are supplied toward the substrate.

Abstract: It is intended to minimize the extent of component deterioration occurring during a dry-cleaning process while maintaining the physical characteristics of the component as a whole. Surface fluoridation processing is executed to substitute fluorine for hydrogen bonded to carbon in a surface layer t of an organic material formed in the shape of a component (e.g., a shield ring) to be disposed inside a processing chamber of a plasma processing apparatus and includes a carbon-hydrogen bond.

Abstract: Provided is a surface-treating apparatus making use of a neutral particle beam, by which a high-quality surface treatment is fundamentally conducted, and a high surface treatment rate is achieved. The surface-treating apparatus serves to conduct a surface treatment of an object to be treated, which is arranged in a vacuum treatment chamber, by a neutral particle beam, and is equipped with a light source for irradiating the object to be treated with light. In the surface-treating apparatus, the light applied to the object to be treated is preferably light including rays having a wavelength of 380 nm or shorter. An illuminance of the rays having a wavelength of 380 nm or shorter on the surface to be treated of the object to be treated is preferably 7 mW/cm2 or higher. The light source is preferably a xenon flash lamp, and an illuminance of the light on the surface to be treated of the object to be treated is preferably 20 mW/cm2 or higher.

Abstract: A method and apparatus for preventing arcing at a port exposed to a plasma in a plasma chamber use circuit components causing a door sealing the port to provide a short circuit path at excitation frequency of the plasma. In one embodiment, the door is a slit valve door sealing a substrate transfer port of an etch chamber.

Abstract: Improvements in an interferometric modulator that cavity defined by two walls.

Abstract: An ultrasonic etching apparatus for chemically-etching a workpiece is disclosed. The apparatus includes an outer tank at least partially filled with an aqueous solution, an inner tank at least partially disposed within the outer tank and in contact with aqueous solution, the inner tank at least partially filled with an etching solution, a lid engaged with the mouth of said inner tank; and an ultrasonic transducer coupled to the outer tank to impart ultrasonic energy to the etching solution in said inner tank. Also disclosed are methods of using the apparatus to etch workpieces.

Abstract: A mechanical pump of the present invention is applied to, for example, a screw pump A for exhausting a gas from a processing chamber. The screw pump comprises a gas-exposed region exposed to the gas and an yttria (Y2O3) film formed on the gas-exposed region.

Abstract: Pre-cleaning tools and semiconductor processing apparatuses using the same are provided. An exemplary pre-cleaning tool comprises a support unit for supporting a substrate, a dome unit for substantially covering the support unit, a first RF unit connected to the support unit and a second RF unit connected to the dome unit. The dome unit is partially ceramic bead-blasted at an inner surface thereof.

Abstract: A vacuum pump exhausts gas within the processing chamber from a lower portion of a sample so as to reduce pressure within a processing chamber. The vacuum pump includes a rotary vane and a fixed vane which are arranged within a case of the vacuum pump and have a plurality of impeller blades in a coaxial manner; an exhausting port for exhausting the gas exhausted from the rotary vane outside the case; and a conducting port arranged along a lower direction of the rotary vane, into which inert gas is conducted, which are provided on a circumference thereof. An MFC (flow rate adjusting device) is arranged between a gas storage unit of the inert gas and the conducting port, for adjusting an amount of the inert gas.

Abstract: Embodiments relate to a method of manufacturing an image sensor which may include forming a gate pattern including a tunnel oxide film, an oxide-nitride-oxide (ONO) film, a floating gate and a control gate over a semiconductor substrate. An oxide film and a nitride film may be formed over the semiconductor substrate including the gate pattern. A photoresist pattern may be formed which covers the oxide film and the nitride film formed over the gate pattern. The nitride film may be etched in a region not covered by the photoresist pattern. The oxide film may be etched to have a predetermined thickness. A deep implant process may deeply implant an N-type dopant into the semiconductor substrate. Ashing and cleaning processes may remove the remaining photoresist pattern.

Abstract: A semiconductor device manufacturing method using a KrF light source is disclosed. Embodiments relate to a method for manufacturing a semiconductor device including forming an oxide film over a semiconductor substrate. A gate conductor may be formed over the oxide film. An antireflective film may be formed over the gate conductor. A photoresist film may be formed over the antireflective film. The photoresist film may be photo-etched, thereby forming a first photoresist film pattern having a first line width. The antireflective film may be etched, using the first photoresist film pattern as a mask, thereby forming an antireflective film pattern. The first photoresist film pattern may be simultaneously laterally etched, thereby forming a second photoresist film pattern having a second line width corresponding to a final design value for the gate conductor.

Abstract: Embodiments relate to an image sensor, and in particular to a manufacturing method of an image sensor for preventing an undercut phenomenon in an etching process so that the salicidation of a pixel area can be prevented. Embodiments relate to a manufacturing method of an image sensor for preventing an undercut according to embodiments including forming plasma-enhanced tetra ethyl ortho silicate (PE-TEOS) films in a non-salicide area and a salicide area defined over a semiconductor substrate using a CVD process. A photoresist pattern may be formed covering the salicide area over the PE-TEOS films. A nitridation process may be performed over the PE-TEOS films formed over the non-salicide area using plasma. The photoresist pattern is removed. The non-nitrided PE-TEOS films of the PE-TEOS films may be removed using an etching process.