Abstract: In a method for forming an image sensor, an interlayer dielectric may be formed over a semiconductor substrate. The interlayer dielectric may include an interconnection. A via hole may be formed through the interlayer dielectric by performing an etching process on the semiconductor substrate. The via hole exposes the interconnection. A first cleaning process and a second cleaning process may be performed on the semiconductor substrate including the via hole. The contact plug may be formed by filing a metal material in the via hole. The image sensing unit, with a first doping layer and a second doping layer stacked therein may be formed over the interlayer dielectric including the interconnection and the contact plug. Here, the first and second cleaning processes include removing residues formed over a sidewall of the via hole through the etching process.

Abstract: A method for fabricating a trench in a SiC or GaN semiconductor wafer is provided. The method may include filling the trench with a conformal layer of electrically and/or optically isolating material. A device is also provided.

Abstract: A ring-shaped member is used in a chamber of a substrate processing apparatus for performing a plasma processing on a substrate by generating a plasma in the chamber. The ring-shaped member includes a plurality of circular arc-shaped members made of single crystalline material and arranged along a circumferential direction of the ring-shaped member. Each of the circular arc-shaped members includes a surface exposed to the plasma when the plasma is generated in the chamber and an easily erodible crystal plane of the single crystalline material is not exposed at the surface.

Abstract: An image sensor according to embodiments may include a semiconductor substrate, photodiodes disposed over the semiconductor substrate, a dielectric layer formed over the photodiodes, a color filter layer formed over the dielectric layer, a planarization layer formed over the color filter layer, a phase change material formed over the planarization layer, and a plurality of microlenses formed over the planarization layer, wherein the phase change material is positioned in the microlens. Further, a method for manufacturing an image sensor according to embodiments may include forming a dielectric layer over a semiconductor substrate with a plurality of photodiodes, sequentially forming a color filter layer and a planarization layer over the dielectric layer, forming a phase change material over the planarization layer, forming a patterned phase change material by partially etching the phase change material, and forming microlenses over the planarization layer and the phase change material.

Abstract: A lower electrode assembly for use in a plasma processing chamber comprises a metal base and upper and lower edge rings. The metal base comprises metal plates brazed together and forming a brazed line on a lower side surface of the base, an edge ring support surface extending horizontally inwardly from the lower side surface and an upper side surface above the edge ring support surface. The upper edge ring comprises a lower surface mounted on the edge ring support surface and the lower edge ring surrounds the lower side surface of the base with a gap between opposed surfaces of the upper and lower edge rings and between the lower edge ring and the outer periphery of the base. The gap has an aspect ratio of total gap length to average gap width sufficient to impede arcing at the location of the braze line.

Abstract: A tool for use in fabricating an electronic component includes a plurality of processing modules and a transfer chamber in communication with each of the plurality of processing modules. The transfer chamber includes a component for transferring a structure to each of the plurality of processing modules. The plurality of processing modules and the transfer chamber are sealed from the surrounding environment and are under a vacuum. The plurality of processing modules includes a first module configured to perform a first process on the structure and a second module configured to perform a second process on the structure. The first process includes performing at least one shaping operation on the structure.

Abstract: A plasma etching apparatus includes a pressure-reducible chamber 1, a placement section 3 for supporting an object to be treated within the chamber 1, a dielectric member 5 for sealing an upper opening of the chamber 1, and a coil 4 provided outside the dielectric member 5. The coil 4 generates a plasma 6 in the chamber 1 by inductive coupling so that the object 2 is subjected to etching. The dielectric member 5 has recess portions 5c discontinuous to one another. Portions of the dielectric member 5 form large-thickness portions 5b. A thickness of the dielectric member 5 in the recess portions 5c is smaller than a thickness of the large-thickness portions 5b. The recess portions 5c are placed according to distribution densities of conductors constituting the coil 4.

Abstract: Disclosed herein is a vacuum processing apparatus for performing a desired process for a substrate after establishing a vacuum atmosphere therein. More particularly, the vacuum processing apparatus includes a vacuum chamber, which is divided into a chamber body and an upper cover. The upper cover is configured to be easily opened away from and closed to the chamber body.

Abstract: A ceramic article which is resistant to erosion by halogen-containing plasmas used in semiconductor processing. The ceramic article includes ceramic which is multi-phased, typically including two phase to three phases. The ceramic is formed from yttrium oxide at a molar concentration ranging from about 50 mole % to about 75 mole %; zirconium oxide at a molar concentration ranging from about 10 mole % to about 30 mole %; and at least one other component, selected from the group consisting of aluminum oxide, hafnium oxide, scandium oxide, neodymium oxide, niobium oxide, samarium oxide, ytterbium oxide, erbium oxide, cerium oxide, and combinations thereof, at a molar concentration ranging from about 10 mole % to about 30 mole %.

Abstract: A plasma processing chamber having a lowered flow equalizer and a lower chamber liner. In an etching process, the processing gases may be unevenly drawn from the processing chamber which may cause an uneven etching of the substrate. By equalizing the flow of the processing gases evacuated from the chamber, a more uniform etching may occur. By electrically coupling the flow equalizer to the chamber liners, the RF return path from the flow equalizer may run along the chamber liners and hence, reduce the amount of plasma drawn below the substrate during processing.

Abstract: A substrate treatment apparatus for treating a substrate on which a plurality of patterns are formed adjacently, has a first chamber which has resistance to a chemical and cleans the substrate with the chemical; a second chamber which is disposed above or below the first chamber, has higher pressure resistance than the first chamber, and supercritically dries the substrate; and a gate unit which is provided between the first and second chambers and can be opened/closed.

Abstract: A focus ring of a ring shape is disposed to surround a target substrate on a lower electrode on which the target substrate is mounted in a process chamber. The process chamber receives the target substrate and subjects the received target substrate to a plasma process. At the point of time when the focus ring is first used for the plasma process, a distance between a lower side of an edge portion of the target substrate and a portion of the focus ring facing the lower side of the edge portion of the target substrate is set to be equal to or greater than about 0.4 mm.

Abstract: Disclosed herein are methods for making high-contrast sub-surface marks in transparent polymeric materials using femtosecond, picosecond or nanosecond pulsed fiber lasers. Systems for making sub-surface marks and transparent materials bearing marks made by the methods are also disclosed.

Abstract: The invention relates to a lifting and supporting device for handling and positioning particularly large-surface elements in the shape of panels, especially in plasma processing installations. Said lifting and supporting device comprises a particularly metallic base plate, on which a plurality of particularly dielectric pins are arranged. Said pins may be set in pin holes especially provided in the base plate. Said panel-shaped element may be positioned on the pin end for the handling thereof or during a plasma processing. Said panel-shaped element may present an electrostatic charge. A small diameter for the pins and pin holes is selected such that, in conformity with the panel-shaped element provided with the electrostatic charge, an undesired electrostatic charge on said panel-shaped element is essentially avoided or, in conformity with the panel-shaped element to be plasma processed, a plasma perturbation in the area of the pin holes or pins is essentially avoided.

Abstract: A substrate processing apparatus includes a bath in which a liquid or a gas is fed, and a mechanism which feeds out a liquid or a gas into the bath. The substrate processing apparatus processes a to-be-processed substrate which is disposed in the bath. The mechanism includes a first feed-out device and a second feed-out device configured to feed out the liquid or gas into the bath, the first feed-in device configured to start/stop the feed-out of the liquid or gas from the first feed-out device, and second feed-in device configured to start/stop the feed-out of the liquid or gas from the second feed-out device.

Abstract: Embodiments relate to a method of manufacturing an image sensor which includes forming a plurality of lower layers over a semiconductor substrate. A first passivation layer may be formed over the lower layers to protect the lower layers. The first passivation layer may be formed in a pixel region and a peripheral region with different thicknesses. A spin-on-glass (SOG) layer may be formed over the first passivation layer. A second passivation layer may be formed over the SOG layer. Array etching may be used to form a concave area in the semiconductor substrate. A plurality of micro lenses may be formed over the bottom surface of the concave area.

Abstract: A method of treating copper sulfide deposits on materials and surfaces that are in contact with electrically insulating oil inside an electrical apparatus. A substantial amount of the electrically insulating oil, normally present in the electrical apparatus, has been removed. The copper sulfide is subjected to treatment with an oxidizing agent which causes a reaction with the copper sulfide deposits. The oxidizing agent can include any compound from the list; chlordioxide, a peroxy acid or ozone.

Abstract: Deposition apparatus for uniformly forming material on a substrate in accordance with an exemplary embodiment is provided. The deposition apparatus includes an energy source, an electrode in a facing, spaced relationship with respect to the substrate, and interface structure joined to the electrode. The interface structure is configured to electrically couple energy from the energy source through and about the interface structure to the electrode for formation of a substantially uniform electric field between the electrode and a predetermined area of the substrate when the interface structure is supplied with energy from the energy source.

Abstract: A reactor for carrying out an etching method for a stack of masked wafers, using an etching gas, preferably chlorotrifluoride (ClF3), wherein the reactor includes a device for carrying out a plasma process. An etching method for masked wafers, using an etching gas, preferably chlorotrifluoride (ClF3), the wafer being pretreated in a plasma process before an etching process, wherein the wafer pretreatment and the etching process for a stack of wafers take place in a reactor chamber.

Abstract: A source gas is supplied into a chamber through a nozzle, and electromagnetic waves are thrown from a plasma antenna into the chamber. The resulting Cl2 gas plasma causes an etching reaction to a plurality of copper protrusions, which are arranged between a substrate and a ceiling member in a discontinuous state relative to the flowing direction of electricity in the plasma antenna, to form a precursor (CuxCly). The precursor (CuxCly) transported toward the substrate controlled to a lower temperature than the temperature of an etched member is converted into only Cu ions by a reduction reaction, and directed at the substrate to form a thin Cu film on the surface of the substrate. The speed of film formation is fast, the cost is markedly decreased, and the resulting thin Cu film is of high quality.

Abstract: A method of cleaning a patterning device, the patterning device having at least organic coating material (OLED material) deposited thereon, comprises the step of providing a cleaning plasma for removing the coating material from the patterning device by means of a plasma etching process. During the step of removing the coating material from the patterning device, the temperature of the patterning device does not exceed a critical temperature causing damage to the patterning device, while maintaining a plasma etching rate of at least 0.2 ?m/min. In order to generate a pulsed cleaning plasma, pulsed energy is provided. The method can be carried out in a direct plasma etching process or in a remote plasma etching process. Different etching processes may be combined or carried out subsequently.

Abstract: An apparatus for processing a substrate is provided which includes a first process window configured to apply a first fluid meniscus between the first process window and a surface of the substrate. The apparatus further includes a second process window configured to generate a second fluid meniscus between the second process window and the surface of the substrate. The apparatus further includes a third process window configured to generate a third fluid meniscus between the third process window and the surface of the substrate. The apparatus is configured to apply the first fluid meniscus, the second fluid meniscus, and the third fluid meniscus to the surface of the substrate in order during an atomic layer deposition operation.

Abstract: A vacuum plasma processor includes a chamber having a grounded wall and an outlet port. Plasma is excited at a first RF frequency in a chamber region spaced from the wall and outlet port. A structure confines the plasma to the region while enabling gas to flow from the region to the outlet port. RF electric power at a second frequency connected to the confining structure causes the confining structure to be at a potential different from ground to increase the size of a sheath between the plasma and confining structure and increase the confining structure effectiveness. The region includes an electrode connected to ground by a circuit that is series resonant to the first frequency and includes capacitance of the sheath.

Abstract: A semiconductor device includes: a semiconductor substrate having a low voltage (LV) region and a high voltage (HV) region; a pad oxide film pattern and a pad nitride film pattern which are formed over the semiconductor substrate. Further, the semiconductor device includes a shallow trench isolation (STI) formed in the LV region and a STI in the HV region, with a step generated therebetween by ions with which the HV region on the semiconductor substrate is doped when an etching process is carried out using the pad oxide film pattern and pad nitride film pattern as a mask.

Abstract: A semiconductor device manufacturing apparatus includes a process chamber, a conveyance chamber, a conveyance robot, a lock chamber, and a heating unit or temperature adjusting unit for reducing adherence of particles onto a substance to be processed by a thermo-phoretic force. The heating unit enables control of a temperature of the substance to be processed to be higher than a temperature of an inner wall or structural body of the process chamber or the conveyance chamber or the conveyance robot or the lock chamber, in conveying the substance to be processed. The temperature adjusting unit enables adjustment of a temperature of an inner wall or structural body of the process chamber or the conveyance chamber or the lock chamber to be lower than a temperature of the substance to be processed, in conveying the substance to be processed.

Abstract: A method and apparatus for processing metal bearing gases involves generating a toroidal plasma in a plasma chamber. A metal bearing gas is introduced into the plasma chamber to react with the toroidal plasma. The interaction between the toroidal plasma and the metal bearing gas produces at least one of a metallic material, a metal oxide material or a metal nitride material.

Abstract: An electrical discharge machining electrode includes a body and one or more shaped teeth. The one or more shaped teeth of the body have a diffuser section and a metering section in electrical communication therewith. The body and the teeth may be formed by a process of photochemically etching a substrate made from an electrically conductive material.

Abstract: A plasma chemical reactor is provided. The reactor includes a chamber, a cathode assembly, and a baffle plate. The chamber forms a plasma reaction space. The cathode assembly includes a cathode support shaft and a substrate support. The cathode support shaft is coupled at one side to a wall surface of the chamber. The substrate support is coupled to the other side of the cathode support shaft and supports the substrate. The baffle plate is out inserted and coupled to the substrate support, and has a plurality of vents arranged to be spaced apart and through formed such that reaction gas can pass through, and the vents asymmetrically arranged and formed to get a vent area smaller at an opposite side than a top side of the cathode support shaft.

Abstract: Components entirely of ceramic with etched surfaces wherein the etched surface has a surface roughness value or at least about 100 microinches (about 2.54 microns) Ra, and methods of forming such.

Abstract: An apparatus for depositing thin films onto a substrate is provided. The apparatus includes a gas exchange plate that is positioned within a reaction chamber having a platform. The gas exchange plate may be positioned above or below the platform and comprises a first plurality of passages and a second plurality of passages machined therein. The first plurality of passages is in fluid communication with a first reactant source and a purge gas source. Similarly, the second plurality of passages is in fluid communication with a second reactant source and a purge gas source. The first and the second plurality of passages are fluidly connected to first and second plurality of apertures that open to the reaction chamber. Gases are removed from the reaction space through third plurality of apertures within the gas exchange plate that are in fluid communication with exhaust space.

Abstract: A plasma processing chamber has a lower liner with an integrated flow equalizer. In an etching process, the processing gases may be unevenly drawn from the processing chamber which may cause an uneven etching of the substrate. The integrated flow equalizer is configured to equalize the flow of the processing gases evacuated from the chamber via the lower liner.

Abstract: A method and an apparatus for forming a structure on a component made of a material composed of silicon oxide, especially of silicate glass, glass ceramic or quartz, wherein in accordance with the process at least a first surface of the component a partial removal of the material by plasma etching takes place and during the plasma etching at least at the surface to be etched a substrate temperature is established which is substantially greater than 90° C. but less than the softening temperature of the material. The apparatus is equipped for this purpose with a heater for generating the substrate temperature.

Abstract: The invention relates to a method for cleaning turbine blades, for example, in a cleaning chamber into which a process gas containing especially fluoride ions is introduced. According to the inventive method, contaminated process gas is directed into an analysis chamber where a plasma is ignited and is analyzed using emission spectroscopy in order to monitor the process, particularly to determine the conditions for stopping the process. The spectrometric measurement can be evaluated in an evaluation unit, the cleaning process being stopped via signal line in case of a characteristic change of the spectrum. Also disclosed is a cleaning device comprising an analysis apparatus with a sample chamber and a plasma generator, an interface being provided for evaluating the result of the analysis.

Abstract: A vacuum plasma generator (VPG) includes an output connector for electrical connection of the VPG to at least one electrode of a plasma chamber. The VPG includes a mains connector for connection of the VPG to a mains power supply, a mains input filter coupled to the mains connector, a voltage converter coupled to the mains input filter for generating an output signal, a voltage converter control input for connection to a voltage converter control, a shield that surrounds at least the voltage converter, the mains power supply, and the mains input filter, and a connection device that provides an electrical connection between the shield and the plasma chamber.

Abstract: Described are methods and chemistries for preparing firepolished quartz parts for use in semiconductor processing. The quartz parts in need of preparation include newly manufactured parts as well as parts requiring refurbishment after previous use in semiconductor processing. The embodiments described avoid methods and chemistries that may damage the surfaces of the quartz parts and render the parts unfit for use in semiconductor processing. A method in accordance with one embodiment minimizes damage by limiting exposure of the quartz parts to hydrofluoric acid. A quartz part for use in semiconductor processing comprises a surface including a surface portion having a surface portion area to expose to a gas, wherein at least 95 percent of the surface portion area is free of defects and wherein the surface portion has less than E12 atoms per centimeter squared of aluminum.

Abstract: A pattern forming method for forming a pattern serving as a mask, includes a process for forming a first pattern 105, a process for trimming a width of the first pattern 105, a process for forming a boundary layer 106 on a surface of the first pattern 105, a process for forming a second mask material layer 107 on a surface of the boundary layer 106, a process for removing a part of the second mask material layer 107 to expose top portions of the boundary layer 106, and a process for exposing the first pattern 105 and forming a second pattern having the second mask material layer 107 at a top portion thereof by etching the boundary layer 106.

Abstract: Provided is a pattern forming method for forming a pattern serving as a mask, which includes: a process for forming a first pattern 105 made of a photoresist; a process for forming a boundary layer 106 at sidewall portions and top portions of the first pattern 105; a process for forming a second mask material layer 107 to cover a surface of the boundary layer 106; a process for removing a part of the second mask material layer 107 to expose top portions of the boundary layer 106; a process for forming a second pattern made of the second mask material layer 107 by etching and removing the boundary layer 106; and a trimming process for reducing a width of the first pattern 105 and a width of the second pattern to predetermined widths.

Abstract: A plasma processing chamber includes a cantilever assembly and at least one vacuum isolation member configured to neutralize atmospheric load. The chamber includes a wall surrounding an interior region and having an opening formed therein. A cantilever assembly includes a substrate support for supporting a substrate within the chamber. The cantilever assembly extends through the opening such that a portion is located outside the chamber. The chamber includes an actuation mechanism operative to move the cantilever assembly relative to the wall.

Abstract: A component (10) for a semiconductor processing apparatus includes a matrix (10a) defining a shape of the component, and a protection film (10c) covering a predetermined surface of the matrix. The protection film (10c) consists essentially of an amorphous oxide of a first element selected from the group consisting of aluminum, silicon, hafnium, zirconium, and yttrium. The protection film (10c) has a porosity of less than 1% and a thickness of 1 nm to 10 ?m.

Abstract: A semiconductor wafer having an active layer is mounted on a carrier with the active layer away from the carrier and at least partially diced on the carrier from a major surface of the semiconductor wafer. The at least partially diced semiconductor wafer is etched on the carrier from the said major surface with a spontaneous etchant to remove sufficient semiconductor material from a die produced from the at least partially diced semiconductor wafer to improve flexural bend strength of the die by removing at least some defects caused by dicing.

Abstract: A plasma processing chamber having a lowered flow equalizer and a lower chamber liner. In an etching process, the processing gases may be unevenly drawn from the processing chamber which may cause an uneven etching of the substrate. By equalizing the flow of the processing gases evacuated from the chamber, a more uniform etching may occur. By electrically coupling the flow equalizer to the chamber liners, the RF return path from the flow equalizer may run along the chamber liners and hence, reduce the amount of plasma drawn below the substrate during processing.

Abstract: A seal mechanism that can prevent the occurrence of corrosion and abnormal discharge. The seal mechanism is disposed between first and second structural members having opposing surfaces. A first seal trench and a second seal trench are formed respectively in a first opposing surface of the first structural member and in a second opposing surface of the second structural member. A first seal member and a second seal member are housed respectively in the first and second seal trenches. The first seal member and the second seal member are brought into pressure contact with each other. These seal trenches have a first seal surface and a second seal surface from which aluminum is exposed, and further have first shut-off surface disposed between the first opposing surface and the first seal surface and a second shut-off surface disposed between the second opposing surface and the second seal surface.

Abstract: The present invention generally comprises a showerhead insulator for electrically isolating a showerhead assembly from a processing chamber wall, a chamber liner assembly for lining a processing chamber, a lower chamber liner for lining an evacuation area of a processing chamber, and a flow equalizer for ensuring a uniform evacuation of a processing chamber. When processing a substrate within an etching chamber, the showerhead needs to be electrically isolated from ground. A showerhead insulator may insulate the showerhead from ground while also preventing plasma from entering the volume that it occupies. A chamber liner may protect the chamber walls from contamination and reduce chamber cleaning. A flow equalizer will permit processing gases to be evenly pulled into the evacuation channel rather than a disproportionate flow into the evacuation channel. A lower liner can aid in uniformly drawing the vacuum and protecting the chamber walls from contamination.

Abstract: A separated MEMS thermal actuator is disclosed which is largely insensitive to creep in the cantilevered beams of the thermal actuator. In the separated MEMS thermal actuator, a inlaid cantilevered drive beam formed in the same plane, but separated from a passive beam by a small gap. Because the inlaid cantilevered drive beam and the passive beam are not directly coupled, any changes in the quiescent position of the inlaid cantilevered drive beam may not be transmitted to the passive beam, if the magnitude of the changes are less than the size of the gap.

Abstract: A process and an apparatus are described for the treatment of wafers, in particular for the thinning of wafers. A wafer with a carrier layer and an interlayer arranged between the carrier layer and the wafer is also described, in which the interlayer is a plasmapolymeric layer that adheres to the wafer and adheres more strongly to the carrier layer than to the wafer.

Abstract: A semiconductor device manufacturing apparatus is disclosed. The semiconductor device manufacturing apparatus applies a process to a semiconductor wafer by supplying a vapor of a corrosive liquid source to a processing container. An electrode is immersed in a storing container which stores the corrosive liquid source. The main material of the electrode is a metal whose ionization tendency is less than that of a metal of the storing container, and a protection current is applied between them by a DC power source. Or another electrode is used. The main material of the electrode is a metal whose ionization tendency is greater than that of the metal of the storing container and the metal of the electrode does not damage the semiconductor wafer. A protection current is applied between the storing container and the electrode by utilizing the difference of the ionization tendency between them.

Abstract: A substrate treating apparatus and a method for transferring a substrate are provided. The substrate treating apparatus includes a first treating unit having a dual layer structure in which a first treating portion performing a coating process and a second treating portion performing a developing process are arranged in a vertical direction, a first buffer unit providing a place where substrates treated at the first treating portion stand by, a second buffer unit providing a place where the substrates treated at the second treating portion stand by, a second treating unit performing an exposing process, and an interface unit transferring the substrates between the first and second buffer units and the second treating unit. The interface unit includes a frame disposed adjacent to the first treating unit and a first substrate receiving portion disposed in the frame and receiving the substrates that are received in the first buffer unit and will be transferred to the second treating unit.

Abstract: In one embodiment, an apparatus for reducing adherence in a micro-electromechanical system (MEMS) device comprises a substrate. A MEMS is disposed outwardly from the substrate. The MEMS comprises structures and corresponding landing pads. Dibs are disposed outwardly from the substrate. Each dib has a surface with depressions. An adherence-reducing material is disposed within each depression. The adherence-reducing material reduces adherence between at least a portion of a structure and a corresponding landing pad.

Abstract: The plasma etching method first forms a coating film on the inner surface of the chamber. Next, an etching process is performed on a wafer under a condition in which the coating film is formed, and thereafter a reaction product adhered onto the coating film in the etching process is removed together with the coating film. Each of these processes is implemented at a frequency in which the condition of the chamber inner surface is nearly always the same at the time of initiating the etching process.

Abstract: A method for etching an etch layer formed on a substrate is provided. A first photoresist (PR) mask with first mask features is provided on the etch layer. A protective coating is provided on the first PR mask by a process including at least one cycle. Each cycle includes (a) a deposition phase for depositing a deposition layer over the surface of the first mask features using a deposition gas, and (b) a profile shaping phase for shaping the profile of the deposition layer using a profile shaping gas. A liquid PR material is applied over the first PR mask having the protective coating. The PR material is patterned into a second mask features, where the first and second mask features form a second PR mask. The etch layer is etched though the second PR mask.