Differential Fluid Etching Apparatus Patents (Class 156/345.1)
  • Patent number: 7892357
    Abstract: A baffle plate assembly for distributing gas flows into an adjacent process chamber containing a semiconductor wafer to be processed includes a planar gas distribution portion having a plurality of apertures therein; a flange surrounding the gas distribution portion; and an impingement device centrally attached to the gas distribution portion, wherein the device includes a cap and a stem, the stem being in thermal contact with the gas distribution portion. Also disclosed herein are plasma reactors employing the baffle plate assembly and methods for reducing recombination of species in a plasma.
    Type: Grant
    Filed: January 12, 2004
    Date of Patent: February 22, 2011
    Assignee: Axcelis Technologies, Inc.
    Inventor: Aseem K. Srivastava
  • Patent number: 7894059
    Abstract: The present invention provides a particle measuring system which is provided in a processing system 40 which generates an atmosphere obtained by exhausting air or a gas in a processing chamber 48 by a vacuum pump 98 and applies a process concerning semiconductor manufacture to a wafer W in the atmosphere, attached to an exhaust pipe 90 which connects an exhaust opening 86 of the processing chamber 48 with the vacuum pump 98, and measures the number of the particles in the exhaust gas, and a measuring method thereof, the system and method providing a processing system and a cleaning method which terminate etching process by determining an end point based on the number of the particles in the exhaust gas and perform cleaning of unnecessary films.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: February 22, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Hayashi Otsuki, Tsukasa Matsuda, Kyoko Ikeda
  • Publication number: 20110039414
    Abstract: An upper electrode 20 according to one embodiment of the present invention includes: a counter portion 22 having a counter face 22A facing a placing face 10A; a periphery portion 24 having a flat face 24A connecting to a periphery of the counter face 22A; and multiple convex portions 26 formed on the counter face 22A. On a projection plane substantially parallel to the placing face 10A, the periphery of the counter portion 22 overlaps the periphery of the lower electrode 10, and a periphery of the periphery portion 24 surrounds a periphery of the counter portion 22.
    Type: Application
    Filed: March 18, 2009
    Publication date: February 17, 2011
    Applicant: SANYO ELECTRIC CO.,LTD.
    Inventor: Youichirou Aya
  • Patent number: 7887323
    Abstract: A method and apparatus for manufacturing a semiconductor device is disclosed. In particular, the application discloses a method that performs a lithography process using a material capable of increasing a depth of focus so as to prevent efficiency of the lithography process from being degraded due to high integration of a semiconductor device, and a pressure-type bake oven as an apparatus for forming a high refractive material on a semiconductor substrate, having advantages of reducing manufacturing costs of a semiconductor manufacturing process and increasing efficiency of the lithography process.
    Type: Grant
    Filed: November 7, 2007
    Date of Patent: February 15, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Hak Joon Kim, Jun Hyung Park
  • Patent number: 7887669
    Abstract: The invention provides a plasma processing apparatus for processing a wafer mounted on a sample stage placed in a vacuum processing chamber using a plasma generated in the vacuum chamber. The plasma processing apparatus comprises a plate placed in the vacuum processing vessel above and opposed to the wafer, the plate having a through hole through which a first processing gas is introduced; a first and second cylindrical member arranged vertically and adjacently; and means communicating with the gap between the first and second cylindrical member for supplying a second processing gas. The wafer is processed while the first processing gas and the second processing gas having different compositions are supplied.
    Type: Grant
    Filed: March 7, 2007
    Date of Patent: February 15, 2011
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Kouhei Satou, Go Miya, Hiroshi Akiyama
  • Publication number: 20110030896
    Abstract: There are proposed a plasma treating apparatus and a plasma treating method using the same capable of improving the durability of site, member and parts in a chamber used for plasma etching in a corrosive gas atmosphere, which are exposed to the plasma atmosphere, and improving the resistance to plasma erosion of a coating formed on the surface of the member or the like in the corrosive gas atmosphere and preventing the occurrence of particles of a corrosion product even under a high plasma power. As a means therefore, in a plasma treating apparatus wherein a surface of a body to be treated in a chamber is subjected to a plasma treatment with an etching gas, at least surfaces of sites of the chamber itself exposing to the plasma atmosphere, or surfaces of a member or parts accommodated in the chamber are covered with a composite layer including a porous layer made from a metal oxide and a secondary recrystallized layer of the metal oxide formed on the porous layer.
    Type: Application
    Filed: September 30, 2010
    Publication date: February 10, 2011
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Yoshiyuki KOBAYASHI
  • Publication number: 20110030898
    Abstract: In a plasma processing apparatus that executes plasma processing on a semiconductor wafer placed inside a processing chamber by generating plasma with a processing gas supplied through a gas supply hole at an upper electrode (shower head) disposed inside the processing chamber, an interchangeable insert member is inserted at a gas passing hole at a gas supply unit to prevent entry of charged particles in the plasma generated in the processing chamber into the gas supply unit. This structure makes it possible to fully prevent the entry of charged particles in the plasma generated inside the processing chamber into the gas supply unit.
    Type: Application
    Filed: September 30, 2010
    Publication date: February 10, 2011
    Inventor: Tetsuji SATO
  • Patent number: 7884028
    Abstract: A method of removing material layer is disclosed. First, a semiconductor substrate is fixed on a rotating platform, where a remnant material layer is included on the surface of the semiconductor substrate. Afterward, an etching process is carried out. In the etching process, the rotating platform is rotated, and an etching solution is sprayed from a center region and a side region of the rotating platform toward the semiconductor substrate until the material layer is removed. Since the semiconductor substrate is etched by the etching solution sprayed from both the center region and the side region of the rotating platform, the etching uniformity of the semiconductor substrate is improved.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: February 8, 2011
    Assignee: United Microelectronics Corp.
    Inventors: Yi-Wei Chen, Chun-Chieh Chang, Tzung-Yu Hung, Yu-Lan Chang, Chao-Ching Hsieh
  • Publication number: 20110027408
    Abstract: A seamless mold manufacturing method of the invention is a seamless mold manufacturing method having the steps of forming a thermal reaction type resist layer on a sleeve-shaped mold, and exposing using a laser and developing the thermal reaction type resist layer and thereby forming a fine mold pattern, and is characterized in that the thermal reaction type resist layer is comprised of a thermal reaction type resist having a property of reacting in predetermined light intensity or more in a light intensity distribution in a spot diameter of the laser.
    Type: Application
    Filed: January 23, 2009
    Publication date: February 3, 2011
    Inventors: Masaru Suzuki, Yoshimichi Mitamura, Masatoshi Maeda
  • Publication number: 20110024040
    Abstract: There are provided a deposit protection cover and a plasma processing apparatus capable of providing a simple solution to deposits adhered to a portion originally considered to be unreachable by plasma without increasing manufacturing cost. The deposit protection cover is detachably installed within a processing chamber for processing a substrate by generating plasma therein so as to cover a preset portion of the processing chamber. The cover includes an aluminum plate having a surface on which an anodic oxidation process is performed. Further, the anodic oxidation process is performed by using an electrode part protruded from a cover main body, an exposed area of an aluminum base surface is reduced by removing the electrode part after the anodic oxidation process is performed, and a cut surface formed after removing the electrode part is positioned at a region that is not directly exposed to the plasma within the processing chamber.
    Type: Application
    Filed: July 26, 2010
    Publication date: February 3, 2011
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Toshihiko Oyama
  • Patent number: 7879179
    Abstract: A processing apparatus of the present invention has a mounted chamber holding a semiconductor wafer and having members for work-processing the substrate under any of heating, plasma and process gas or a combination of them, in which a film of Al2O3 and Y2O3 is formed on an inner wall surface of the chamber and on those exposed surface of the members within the chamber and has a high-corrosion resistance and insulating property and, when the process gas is introduced onto a processing surface of a semiconductor wafer and diffused into it, any product is less liable to be deposited on a plasma generation area and on those members held within the chamber.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: February 1, 2011
    Assignee: Tokyo Electron Limited
    Inventor: Hayashi Otsuki
  • Publication number: 20110017706
    Abstract: A wafer is disposed in a chamber, a plasma generating space is formed in the chamber, plasma processing is performed to the front surface of the processing object while keeping at least the front surface of the processing object in contact with the plasma generating space. The plasma processing is performed with the plasma generating space being kept in contact with at least the peripheral region of the back surface of the processing object.
    Type: Application
    Filed: July 10, 2008
    Publication date: January 27, 2011
    Applicant: Tokyo Electron Limited
    Inventors: Tetsuro Takahashi, Yutaka Fujino, Hiroyuki Toshima, Atsushi Kubo, Song Yun Kang, Peter Ventzek, Sumie Segawa
  • Publication number: 20110020707
    Abstract: An electrode collector manufacturing apparatus (50) includes a chamber (51), the inside of which can be reduced in pressure, a substrate retaining mechanism (55) that retains a conductive substrate (12), and a gas introducing mechanism (54) that introduces a fluorine gas and an inert gas into the chamber (51). Inside the chamber (51) are provided an etching portion (52) that etches a surface of the substrate (12), and carbon film forming portions (56a) and (56b) that form a carbon film on the surface of the etched substrate (12). The gas introducing mechanism (54) is structured to create in the chamber a mixed gas atmosphere in which the fluorine and the inert gas are mixed at a predetermined molar ratio.
    Type: Application
    Filed: March 19, 2009
    Publication date: January 27, 2011
    Inventor: Yozo Uchida
  • Publication number: 20110021031
    Abstract: A method of increasing mean time between cleans of a plasma etch chamber and chamber parts lifetimes is provided. Semiconductor substrates are plasma etched in the chamber while using at least one sintered silicon nitride component exposed to ion bombardment and/or ionized halogen gas. The sintered silicon nitride component includes high purity silicon nitride and a sintering aid consisting of silicon dioxide. A plasma processing chamber is provided including the sintered silicon nitride component. A method of reducing metallic contamination on the surface of a silicon substrate during plasma processing is provided with a plasma processing apparatus including one or more sintered silicon nitride components. A method of manufacturing a component exposed to ion bombardment and/or plasma erosion in a plasma etch chamber, comprising shaping a powder composition consisting of high purity silicon nitride and silicon dioxide and densifying the shaped component.
    Type: Application
    Filed: October 27, 2008
    Publication date: January 27, 2011
    Inventors: Travis R. Taylor, Mukund Srinivasan, Bobby Kadkhodayan, K.Y. Ramanujam, Biljana Mikijelj, Shanghua Wu
  • Publication number: 20110000618
    Abstract: A substrate processing apparatus includes a chamber defining a creation space where radicals are created and a process space where a process is carried out with respect to a substrate, a first supply member configured to supply a first source gas into the creation space, an upper plasma source configured to generate an electric field in the creation space to create the radicals from the first source gas, a second supply member configured to supply a second source gas into the process space, and a lower plasma source configured to generate an electric field in the process space. The upper plasma source includes a first segment and a second segment configured to wrap a side of the chamber. The first and second segments are alternately disposed in the vertical direction of the chamber.
    Type: Application
    Filed: February 20, 2009
    Publication date: January 6, 2011
    Applicant: EUGENE TECHNOLOGY CO., LTD.
    Inventor: Il-Kwang Yang
  • Patent number: 7846310
    Abstract: A electromagnet array structure including multiple electromagnetic coils captured in a rigid encapsulant, for example, of cured epoxy resin, to form a unitary free-standing structure which can be placed around the walls of a plasma processing chamber. A liquid cooling coil may also be captured in the encapsulant between the electromagnetic coils. The structure may additionally include water fittings, locating pins, through tubes for chamber bolts, and lifting brackets.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: December 7, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Andrew Gillard, Anthony Vesci, Keith A. Miller
  • Patent number: 7846291
    Abstract: A processing apparatus of the present invention has a mounted chamber holding a semiconductor wafer and having members for work-processing the substrate under any of heating, plasma and process gas or a combination of them, in which a film of Al2O3 and Y2O3 is formed on an inner wall surface of the chamber and on those exposed surface of the members within the chamber and has a high-corrosion resistance and insulating property and, when the process gas is introduced onto a processing surface of a semiconductor wafer and diffused into it, any product is less liable to be deposited on a plasma generation area and on those members held within the chamber.
    Type: Grant
    Filed: May 27, 2003
    Date of Patent: December 7, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Hayashi Otsuki
  • Publication number: 20100301008
    Abstract: Process and apparatus for fabricating a magnetic device is provided. Magnetic and/or nonmagnetic layers in the device are etched by a mixed gas of a hydrogen gas and an inert gas such as N2 with using a mask of non-organic material such as Ta. As results, in a studied example, a MTJ taper angle is nearly vertical.
    Type: Application
    Filed: May 24, 2010
    Publication date: December 2, 2010
    Applicant: CANON ANELVA CORPORATION
    Inventors: Sanjay Shinde, Yoshimitsu Kodaira, Taroh Furumochi
  • Publication number: 20100300622
    Abstract: A plasma processing apparatus includes a processing chamber the inside of which is maintained in a vacuum; a mounting table configured to mount a target substrate and serve as a lower electrode in the processing chamber; a circular ring-shaped member provided at the mounting table so as to surround a peripheral portion of the target substrate; an upper electrode arranged to face the lower electrode thereabove; and a power feed unit for supplying a high frequency power to the mounting table. The apparatus performs a plasma process on the target substrate by plasma generated in the processing chamber. The circular ring-shaped member includes at least one ring-shaped groove configured to adjust an electric field distribution to a desired distribution in a plasma generation space, and the groove is formed in a surface of the circular ring-shaped member and the surface is on an opposite side to the plasma generation space.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 2, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Koichi Yatsuda, Hideki Mizuno
  • Publication number: 20100304146
    Abstract: This invention relates to a plasma surface modification process (and a corresponding a system) of a solid object (100) comprising creating plasma (104) by a plasma source (106), application of the plasma (104) to at least a part of a surface (314) of the solid object (100), generating ultrasonic high intensity and high power acoustic waves (102) by at least one ultrasonic high intensity and high power acoustic wave generator (101), wherein the ultrasonic acoustic waves are directed to propagate towards said surface (314) of the object (100) so that a laminar boundary layer (313) of a gas or a mixture of gases (500) flow in contact with said solid object (100) is thinned or destructed for at least a part of said surface (314). In this way, the plasma can more efficiently access and influence the surface of the solid object to be treated by the plasma, which speeds the process time up significantly.
    Type: Application
    Filed: May 9, 2008
    Publication date: December 2, 2010
    Applicants: FORCE TECHNOLOGY, TECHNICAL UNIVERSITY OF DENMARK
    Inventors: Niels Krebs, Alexander Bardenshtein, Yukihiro Kusano, Henrik Bindslev, Henrik Junge Mortensen
  • Patent number: 7824519
    Abstract: A plasma processing chamber includes a substrate support having a top surface defined to support a substrate in a substantially horizontal orientation within the chamber. The plasma processing chamber also includes a number of telescopic members disposed within the chamber outside a periphery of the substrate support. The number of telescopic members are also disposed in a concentric manner with regard to a center of the top surface of the substrate support. Each of the number of telescopic members is defined to be independently moved in a substantially vertical direction so as to enable adjustment of an open volume above the top surface of the substrate support, and thereby enable adjustment of a plasma condition within the open volume above the top surface of the substrate support.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: November 2, 2010
    Assignee: Lam Research Corporation
    Inventors: Ing-Yann Albert Wang, Robert Chebi
  • Patent number: 7821655
    Abstract: An apparatus and process for in-situ measurement of thin film thickness, ash rate, and end point generally include generating and measuring shallow angle interference patterns. The apparatus generally includes a chamber having a first viewing port and a second viewing port. The first viewing port includes receiving optics configured to receive light at a shallow angle from a surface of a substrate processed therein. The second port includes a broadband illumination source and is preferably disposed in a sidewall opposite the receiving optics. The process includes calculating the thin film thickness, ash rate, and end point from the interference patterns.
    Type: Grant
    Filed: February 8, 2005
    Date of Patent: October 26, 2010
    Assignee: Axcelis Technologies, Inc.
    Inventors: Alan Janos, Montien Saubhayana
  • Publication number: 20100263795
    Abstract: A device for processing a wire having an outer surface and moving along a given path in a given direction. The device comprises a conductive contact tube surrounding said path and electrically engageable with the wire as it moves along the path and through the tube and a dielectric sleeve adjacent the contact tube and extending in the given direction from the contact tube and around the path to define an annular gas passage between the dielectric sleeve and the wire. An inlet for processing gas is adjacent the contact tube. A conductive electrode sleeve is around the dielectric sleeve so a high frequency, high voltage signal between said electrode sleeve and the contact tube creates a dielectric barrier discharge plasma of the progressing gas in the annular passage.
    Type: Application
    Filed: May 27, 2010
    Publication date: October 21, 2010
    Applicant: LINCOLN GLOBAL, INC.
    Inventor: George D. Blankenship
  • Publication number: 20100255683
    Abstract: A plasma processing apparatus includes a process chamber, a platen positioned in the process chamber for supporting a workpiece, a source configured to generate a plasma in the process chamber having a plasma sheath adjacent to the front surface of the workpiece, and an insulating modifier. The insulting modifier is configured to control a shape of a boundary between the plasma and the plasma sheath so a portion of the shape of the boundary is not parallel to a plane defined by a front surface of the workpiece facing the plasma. Controlling the shape of the boundary between the plasma and the plasma sheath enables a large range of incident angles of particles striking the workpiece to be achieved.
    Type: Application
    Filed: April 3, 2009
    Publication date: October 7, 2010
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES
    Inventors: Ludovic GODET, Timothy J. Miller, Christopher J. Leavitt, Bernard G. Lindsay
  • Publication number: 20100255613
    Abstract: System and method for implementing multi-resolution advanced process control (“APC”) are described. One embodiment is a method for fabricating ICs from a semiconductor wafer comprising performing a first process on the semiconductor wafer; taking a first measurement indicative of an accuracy with which the first process was performed; and using the first measurement to generate metrology calibration data, wherein the metrology calibration data includes an effective portion and a non-effective portion. The method further comprises removing the non-effective portion from the metrology calibration data and modeling the effective portion with a metrology calibration model; combining the metrology calibration model with a first process model to generate a multi-resolution model, wherein the first process model models an input-output relationship of the first process; and analyzing a response of the multi-resolution model and second measurement data to control performance a second process.
    Type: Application
    Filed: April 1, 2009
    Publication date: October 7, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Andy Tsen, Jin-Ning Sung, Po-Feng Tsai, Jong-I Mou
  • Publication number: 20100243165
    Abstract: Disclosed herein is an apparatus for surface-treating a wafer using high-frequency inductively-coupled plasma, including a process chamber including a plasma generation unit into which a reaction gas is introduced and which generates plasma, and a wafer treatment unit in which any one or more selected from among plasma treatment, thin film formation and etching is performed; and a pressure control unit including a vacuum plate, and a pumping port, a two-stage valve, a turbo pump and an APC valve which are organically connected with the vacuum plate, to control a pressure in the process chamber and a pumping rate.
    Type: Application
    Filed: November 1, 2007
    Publication date: September 30, 2010
    Inventor: Pyung-yong Um
  • Publication number: 20100243608
    Abstract: There is provided a plasma processing apparatus capable of varying an AC ratio without installing a largely scaled-up movable unit. An etching apparatus 10, which performs a plasma process on a wafer W within a processing chamber, includes a control member which is installed such that at least a part of the control member is in contact with a plasma region within the processing chamber, and an impedance control circuit 210 which is connected with the control member and adjusts a ground capacitance of the plasma region by controlling an electrical connection state between the control member and a ground plane.
    Type: Application
    Filed: March 31, 2010
    Publication date: September 30, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Chishio Koshimizu
  • Publication number: 20100218894
    Abstract: A method of removing and/or reducing undesirable contaminants removes residues including graphitic layers, fluorinate layers, calcium sulfate (CaSO4) particles, tin oxides and organotin, from a chip passivation layer surface. The method uses a plasma process with an argon and oxygen mixture with optimized plasma parameters to remove both the graphitic and fluorinated layers and to reduce the level of the inorganic/tin oxides/organotin residue from an integrated circuit wafer while keeping the re-deposition of metallic compounds is negligible. This invention discloses the plasma processes that organics are not re-deposited from polymers to solder ball surfaces and tin oxide thickness does not increase on solder balls. The ratio of argon/oxygen is from about 50% to about 99% Ar and about 1% to about 50% O2 by volume. Incoming wafers, after treatment, are then diced to form individual chips that are employed to produce flip chip plastic ball grid array packages.
    Type: Application
    Filed: May 14, 2010
    Publication date: September 2, 2010
    Inventors: Claude Blais, Eric Duchesne, Kang-Wook Lee, Sylvain Ouimet, Gerald J. Scilla
  • Publication number: 20100219160
    Abstract: A method of treating a surface of at least one part by individual sources of an electron cyclotron resonance plasma is characterized by subjecting the part(s) to at least one movement of revolution with regard to at least one fixed linear row of elementary sources. The linear row or rows of elementary sources are disposed parallel to the axis or axes of revolution of the part or parts.
    Type: Application
    Filed: October 9, 2008
    Publication date: September 2, 2010
    Applicant: H.E.F.
    Inventors: Beat Schmidt, Christophe Heau, Philippe Maurin-Perrier
  • Publication number: 20100219159
    Abstract: An atmospheric pressure plasma source includes a body including a distal end, a blade extending from the distal end and terminating at a blade edge, a plasma-generating unit, and a plasma outlet communicating with the plasma-generating unit and positioned at the distal end. The plasma outlet is oriented at a downward angle generally toward the blade edge, wherein the plasma outlet provides a plasma path directed generally toward the blade edge. The plasma may be applied to the coating at an interface between the coating and an underlying substrate. While applying the plasma, the blade is moved into contact with the coating at the interface, wherein the blade assists in separating the coating from the substrate while one or more components of the coating react with energetic species of the plasma.
    Type: Application
    Filed: February 8, 2010
    Publication date: September 2, 2010
    Inventors: Peter Joseph Yancey, Jeffrey Kingsley
  • Publication number: 20100212834
    Abstract: A plasma processing apparatus for processing a subject placed on a subject stage disposed in a processing chamber in a vacuum vessel, by using plasma formed in said processing chamber, includes: an exhaust space communicating with the processing chamber, extending in a horizontal direction, and exhausting gas in the processing chamber; an exhaust port communicating with the exhaust space, the gas being exhausted via the exhaust port; a pump disposed communicating with the exhaust port and exhausting the gas; and a plate member disposed in the exhaust space between a connection portion to the processing chamber and the exhaust port, extending along a direction connecting the connection portion and the exhaust port, and disposed outside a view angle from an upper surface of the subject stage.
    Type: Application
    Filed: February 26, 2009
    Publication date: August 26, 2010
    Inventors: Ryouta Kitani, Nobuhide Nunomura, Yasukiyo Morioka, Motohiko Yoshigai
  • Publication number: 20100216312
    Abstract: This invention provides a resist removing apparatus for removing a resist comprising a deteriorated layer and an undeteriorated layer from a substrate. The apparatus carries out the step of bringing radicals, reduced by subjecting any one of or a mixture of two or more of nitrogen, oxygen, hydrogen, and steam to plasma treatment under a low pressure, into contact with the substrate to remove the resist, and the step of bringing ozone water into contact with the substrate to remove the resist. In the step of removing the resist by radicals, a large part of the undeteriorated layer is allowed to remain by regulating the radical contact time depending upon conditions for the formation of the deteriorated layer on the resist surface. Alternatively, a large part of the undeteriorated layer may be allowed to remain by conducting process control according to the results of analysis of a reactant gas discharged during the removal of the resist.
    Type: Application
    Filed: May 23, 2008
    Publication date: August 26, 2010
    Applicants: SHARP KABUSHIKI KAISHA, AQUA SCIENCE CORPORATION
    Inventors: Hiroaki Yamamoto, Takashi Minamihonoki, Shinji Masuoka, Yoshishige Ninomiya, Kyota Morihira
  • Publication number: 20100213172
    Abstract: Apparatus, systems and methods for plasma etching substrates are provided. The invention achieves dissipation of charge build-up on a substrate being plasma etched to avoid notching or twisting in high aspect ratio contents and similar features. Charge build-up on a substrate being etched by plasma etching can be dissipated by a method for etching a substrate, the method comprising: providing a plasma processing chamber comprising a chamber enclosure and a substrate support adapted to support a substrate within the chamber enclosure; supporting a substrate on the substrate support; forming a plasma within the chamber enclosure such that a surface of the substrate is in contact with the plasma; etching the substrate by generating a negative bias on the substrate surface relative to the plasma; and intermittently changing the bias on the substrate surface to positive relative to the plasma. The present method can be readily integrated into known plasma processing systems.
    Type: Application
    Filed: May 11, 2010
    Publication date: August 26, 2010
    Inventor: Aaron R. Wilson
  • Publication number: 20100213175
    Abstract: There are provided simplified methods for etching diamond, as compared to conventional methods. More particularly, the methods disclosed herein involve contacting at least a portion of the diamond with a metal or metal oxide so that redox etching of the contacted portion of the diamond occurs. Also provided are diamonds polished using the present method, as well as optical windows, heat sinks, cutting tools and electrical components incorporating diamonds polished/etched via the disclosed method.
    Type: Application
    Filed: February 22, 2009
    Publication date: August 26, 2010
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Hongying Peng, Mark Philip D'Develyn, John William Nink
  • Publication number: 20100206845
    Abstract: The invention provides a plasma processing apparatus and a method for purging the apparatus, capable of preventing damage of components caused by pressure difference during purging operation of a vacuum reactor, and capable of preventing residual processing gas from remaining in the vacuum reactor. Inert gas is introduced through an inert gas feed port 233 on a side wall of a depressurized processing chamber (V1) 226 of a plasma processing apparatus, and the interior of the processing chamber (V1) 226 is brought to predetermined pressure by the inert gas, and thereafter, the inert gas is supplied to processing gas supply paths 213 and 216 (V2) communicated to a plurality of through holes 224 for introducing processing gas, so as to introduce the inert gas through the plurality of through holes 224 into the processing chamber (V1) 226.
    Type: Application
    Filed: March 4, 2009
    Publication date: August 19, 2010
    Inventors: Takahisa Hashimoto, Hideki Kihara, Muneo Furuse
  • Publication number: 20100206847
    Abstract: A plasma chamber for activating a process gas, including at least four legs forming a toroidal plasma channel, each leg having a cross-sectional area, and an outlet formed on one leg, the outlet having a greater cross-sectional area than the cross-sectional area of the other legs. The plasma chamber further includes an inlet for receiving the process gas and a plenum for introducing the process gas over a broad area of the leg opposing the outlet to reduce localized high plasma impedance and gas flow instability, wherein the leg opposing the outlet defines a plurality of holes for providing a helical gas rotation in the plasma channel.
    Type: Application
    Filed: October 19, 2007
    Publication date: August 19, 2010
    Inventors: Xing Chen, Andrew Cowe
  • Publication number: 20100206480
    Abstract: Apparatus for safely and easily preparing an F2-containing gas including equipment for handling a gas containing a fluoro compound that is easier to handle than F2, and in which the fluoro compound is excited and decomposed to convert it into F2 gas before surface modification and then used for surface modification. There is no necessity of providing, storing and transporting a large amount of F2 gas in advance because a necessary amount of F2 gas is obtained immediately before surface modification.
    Type: Application
    Filed: April 28, 2010
    Publication date: August 19, 2010
    Applicant: KANTO DENKA KOGYO CO., LTD.
    Inventors: Takashi Tanioka, Katsuya Fukae, Taisuke Yonemura
  • Patent number: 7771535
    Abstract: A semiconductor manufacturing apparatus has a nozzle with a plurality of tiny holes. The nozzle is connected to a vacuum pump through a valve without closing its end so as to be evacuated and purged independently of the reaction chamber.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: August 10, 2010
    Assignee: Elpida Memory, Inc.
    Inventor: Kenichi Koyanagi
  • Publication number: 20100193131
    Abstract: An ashing device that prevents the ashing rate from changing over time. The ashing device ashes organic material on a substrate including an exposed metal in a processing chamber. The ashing device includes a path, which is formed in the processing chamber and through which active species supplied to the processing chamber pass. The path is defined by a surface on which the metal scattered from the substrate by the active species is collectible, with the surface being formed so as to expose a metal that is of the same kind.
    Type: Application
    Filed: October 29, 2008
    Publication date: August 5, 2010
    Applicant: ULVAC, INC.
    Inventors: Masahisa Ueda, Takashi Kurimoto, Kyuzo Nakamura, Koukou Suu, Toshiya Yogo, Kazushige Komatsu, Nobusuke Tachibana
  • Publication number: 20100190341
    Abstract: Provided are an apparatus and method for depositing a thin film, and a method for gap-filling a trench in a semiconductor device. The thin film depositing apparatus includes a plurality of substrates provided on the same space inside a reactor, wherein deposition of the thin film and partial etching of the deposited thin film are repeated to form the thin film on the plurality of substrates by exposing the substrates to two or more source gases and an etching gas supplied together at predetermined time intervals while rotating the substrates. According to exemplary embodiments, it is possible to concurrently or alternatively perform deposition and etching of a thin film, so that a thin film with good gap-fill capability can be deposited.
    Type: Application
    Filed: July 14, 2008
    Publication date: July 29, 2010
    Applicant: IPS LTD.
    Inventors: Sang-Jun Park, Chang-Hee Han, Ho-Young Lee, Seong-Hoe Jeong
  • Publication number: 20100187564
    Abstract: A light emitting diode (“LED”) using an electrical conductive and optical transparent or semi-transparent layer to improve overall light output is disclosed. The device includes a first conductive layer, an active layer, a second conductive layer, an electrical conductive and optical transparent or semi-transparent layer, and electrodes. In one embodiment, the electrical conductive and optical transparent or semi-transparent layer has a first surface and a second surface, wherein the first surface is overlain the second conductive layer. The second surface includes a pattern which contains thick regions and thin regions for facilitating light passage.
    Type: Application
    Filed: January 26, 2009
    Publication date: July 29, 2010
    Inventors: Todd Farmer, Steve Lester
  • Patent number: 7758717
    Abstract: On a hot plate, jigs and wafers are joined by bonding wax. A first transport mechanism, a posture change mechanism, a pusher and a second transport mechanism transport the jigs joined with the wafers from the hot plate to a treating transport mechanism. The treating transport mechanism immerses the jigs joined with the wafers in a treating solution stored in a treating tank. Thus, the wafers may be thinned, or otherwise treated, without a turn table directly contacting and damaging the wafers as in the prior art.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: July 20, 2010
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Koji Hasegawa, Akira Morita, Kenichiro Arai
  • Publication number: 20100176088
    Abstract: To ensure a uniform flow over the surface of a product W, an apparatus is provided for the wet chemical treatment of the product W that is disposed in the apparatus 100. This apparatus comprises at least one flow member 150 that includes respectively at least one paddle-like flow element 155, wherein at least one flow member 155 is disposed situated opposite the surface of the product W and is moveable substantially parallel to the surface of the product W.
    Type: Application
    Filed: June 3, 2008
    Publication date: July 15, 2010
    Applicant: ATOTECH DEUTSCHLAND GMBH
    Inventors: Sebastian Dunnebeil, Heinz Klingl
  • Publication number: 20100173494
    Abstract: We suggest a method of anisotropic etching of the substrates, where ultra-thin and conformable layers of materials are used to passivate sidewalls of the etched features. According to an exemplary embodiment such sidewall passivation layer is a Self-assembled monolayer (SAM) material deposited in-situ etching process from a vapor phase. According to another exemplary embodiment such sidewall passivation layer is an inorganic-based material deposited using Atomic Layer Deposition (ALD) method. SAM or ALD layers deposition can be carried out in a pulsing regime alternating with an sputtering and/or etching processes using process gasses with or without plasma. Alternatively, SAM deposition process is carried out continuously, while etch or sputtering process turns on in a pulsing regime. Alternatively, SAM deposition process and etch or sputtering processes are carried out continuously.
    Type: Application
    Filed: October 1, 2009
    Publication date: July 8, 2010
    Applicant: ROLITH, INC
    Inventor: Boris Kobrin
  • Publication number: 20100163179
    Abstract: [Problem] To provide a substrate processing apparatus capable of preventing adherence of hydrogen fluoride to an inner surface the like of a chamber. [Means for Solving] An apparatus housing and processing a substrate W in a chamber includes a hydrogen fluoride gas supply path 61 for supplying a hydrogen fluoride gas into a chamber 40, wherein a part or whole of an inner surface of the chamber 40 is formed of Al or Al alloy which has not been subjected to surface oxidation treatment. The chamber 40 includes a lid 52 closing an upper opening of a chamber main body 51, and at least an inner surface of the lid 52 is formed of the Al or Al alloy which has not been subjected to alumite treatment.
    Type: Application
    Filed: December 12, 2006
    Publication date: July 1, 2010
    Inventors: Shigeki Tozawa, Yusuke Muraki, Tadashi Iino, Daisuke Hayashi
  • Publication number: 20100167524
    Abstract: In a method for fabricating a metal interconnection of a semiconductor device, a lower interconnection and a lower insulation layer are formed over a semiconductor substrate. An etch stop layer is formed over the lower insulation layer. An upper insulation layer is formed over the etch stop layer. A first via hole is formed to expose the etch stop layer corresponding to the lower interconnection. A second via hole exposing the lower interconnection is formed by a primary etching process that selectively removes the etch stop layer exposed by the first via hole. A chemical cleaning process is performed on the second via hole, wherein polymer is formed over the surface of the lower interconnection during the chemical cleaning process. The polymer is removed from the second via hole by a secondary etching process using vaporized gas.
    Type: Application
    Filed: December 15, 2009
    Publication date: July 1, 2010
    Inventor: Chung-Kyung Jung
  • Publication number: 20100167544
    Abstract: A substrate processing apparatus includes an enclosure defining a reaction chamber, a substrate holder in the reaction chamber, and a door assembly. The door assembly has a substrate entrance with a tunnel extending to the reaction chamber, a door movable with respect to the substrate entrance, and a pattern of features. The features are located along a portion of the substrate entrance defining the tunnel. The features promote sticking of processing byproducts, produced in the reaction chamber, to the substrate entrance. A door mates with the entrance to form a seal that reduces flow through the tunnel to control the amount of byproducts that enter the tunnel.
    Type: Application
    Filed: October 12, 2009
    Publication date: July 1, 2010
    Applicant: STMicroelectronics, Inc.
    Inventor: Justin Broeker
  • Publication number: 20100160143
    Abstract: A solid solution-comprising ceramic article useful in semiconductor processing, which is resistant to erosion by halogen-containing plasmas. The solid solution-comprising ceramic article is formed from a combination of yttrium oxide and zirconium oxide. In a first embodiment, the ceramic article includes ceramic which is formed from yttrium oxide at a molar concentration ranging from about 90 mole % to about 70 mole %, and zirconium oxide at a molar concentration ranging from about 10 mole % to about 30 mole %. In a second embodiment, the ceramic article includes ceramic which is formed from zirconium oxide at a molar concentration ranging from about 96 mole % to about 94 mole %, and yttrium oxide at a molar concentration ranging from about 4 mole % to about 6 mole %.
    Type: Application
    Filed: February 19, 2010
    Publication date: June 24, 2010
    Applicant: Applied Materials, Inc.
    Inventors: Jennifer Y. Sun, Ren-Guan Duan, Jie Yuan, Li Xu, Kenneth S. Collins
  • Patent number: 7740736
    Abstract: Techniques and apparatus for substantially reducing and/or preventing the occurrence of plasma un-confinement events, including one or more of shielding a gap disposed between chamber components and along a RF current path with a dielectric shielding structure, shielding a sharp component structure with a dielectric shielding structure, and keeping the gap between adjacent pairs of plasma confinement rings smaller than the worst-case DeBye length for the plasma.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: June 22, 2010
    Assignee: Lam Research Corporation
    Inventors: Andreas Fischer, Rajinder Dhindsa
  • Publication number: 20100120195
    Abstract: In a method for forming an image sensor, an interlayer dielectric may be formed over a semiconductor substrate. The interlayer dielectric may include an interconnection. A via hole may be formed through the interlayer dielectric by performing an etching process on the semiconductor substrate. The via hole exposes the interconnection. A first cleaning process and a second cleaning process may be performed on the semiconductor substrate including the via hole. The contact plug may be formed by filing a metal material in the via hole. The image sensing unit, with a first doping layer and a second doping layer stacked therein may be formed over the interlayer dielectric including the interconnection and the contact plug. Here, the first and second cleaning processes include removing residues formed over a sidewall of the via hole through the etching process.
    Type: Application
    Filed: November 10, 2009
    Publication date: May 13, 2010
    Inventor: Chung-Kyung Jung